/* Enqueue a series of TSP commands in the TPU to (de)activate the downlink path */
void twl3025_downlink(int on, int16_t at)
{
int16_t bdl_ena = at - TSP_DELAY - 6;
if (on) {
if (bdl_ena < 0)
printf("BDLENA time negative (%d)\n", bdl_ena);
/* calibration should be done just before BDLENA */
tpu_enq_at(bdl_ena - DOWNLINK_DELAY);
/* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY - BDLON_TO_BDLCAL - TSP_DELAY */
twl3025_tsp_write(BDLON);
/* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY - BDLON_TO_BDLCAL */
tpu_enq_wait(BDLON_TO_BDLCAL - TSP_DELAY);
/* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY */
twl3025_tsp_write(BDLON | BDLCAL);
/* bdl_ena - TSP_DELAY - BDLCAL_DURATION */
tpu_enq_wait(BDLCAL_DURATION - TSP_DELAY);
/* bdl_ena - TSP_DELAY */
twl3025_tsp_write(BDLON);
//tpu_enq_wait(BDLCAL_TO_BDLENA) this is only 3.7us == 4 qbits, i.e. less than the TSP_DELAY
tpu_enq_at(bdl_ena);
twl3025_tsp_write(BDLON | BDLENA);
} else {
tpu_enq_at(bdl_ena);
twl3025_tsp_write(BDLON);
//tpu_enq_wait(nBDLENA_TO_nBDLON) this is only 3.7us == 4 qbits, i.e. less than the TSP_DELAY
twl3025_tsp_write(0);
}
}
void tpu_test(void)
{
int i;
/* program a sequence of TSPACT events into the TPU */
for (i = 0; i < 10; i++) {
puts("TSP ACT enable: ");
tsp_act_enable(0x0001);
tpu_enq_wait(10);
puts("TSP ACT disable: ");
tsp_act_disable(0x0001);
tpu_enq_wait(10);
}
tpu_enq_sleep();
/* tell the chip to execute the scenario */
tpu_enable(1);
}
void l1s_reset_hw(void)
{
dsp_api.w_page = 0;
dsp_api.r_page = 0;
dsp_api.r_page_used = 0;
dsp_api.db_w = (T_DB_MCU_TO_DSP *) BASE_API_W_PAGE_0;
dsp_api.db_r = (T_DB_DSP_TO_MCU *) BASE_API_R_PAGE_0;
dsp_api.ndb->d_dsp_page = 0;
/* we have to really reset the TPU, otherwise FB detection
* somtimes returns wrong TOA values. */
tpu_reset(1);
tpu_reset(0);
tpu_rewind();
tpu_enq_wait(5); /* really needed ? */
tpu_enq_sync(l1s.tpu_offset);
tpu_end_scenario();
}
