Ejemplo n.º 1
0
static void hw_bc11_dump_register(void)
{
    battery_log(BAT_LOG_FULL, "Reg[0x%x]=0x%x,Reg[0x%x]=0x%x\n",
        MT6325_CHR_CON20, upmu_get_reg_value(MT6325_CHR_CON20),
        MT6325_CHR_CON21, upmu_get_reg_value(MT6325_CHR_CON21)
        );
}
static kal_uint32 charging_set_cv_voltage(void *data)
{
    kal_uint32 status = STATUS_OK;
    kal_uint16 register_value;

    register_value = charging_parameter_to_value(VBAT_CV_VTH, GETARRAYNUM(VBAT_CV_VTH) ,*(kal_uint32 *)(data));

	cv_voltage=VBAT_CV_VTH[register_value];

/*
    #if 0
    mt6325_upmu_set_rg_vbat_cv_vth(register_value); 
    #else
    //PCB workaround
    if(mt6325_upmu_get_swcid() == PMIC6325_E1_CID_CODE)
    {
        pmic_config_interface(0xEFE,0x0,0xF,1); // [4:1]: RG_VBAT_OV_VTH; Set charger OV=3.9V
        pmic_config_interface(0xEF8,0x3,0x3F,0); // [5:0]: RG_VBAT_CV_VTH; Set charger CV=3.8V
        battery_log(BAT_LOG_CRTI,"[charging_set_cv_voltage] set low CV by 6325 E1\n");
    }
    else
    {
        if(is_mt6311_exist())
        {
            if(mt6311_get_chip_id()==PMIC6311_E1_CID_CODE)
            {
                pmic_config_interface(0xEFE,0x0,0xF,1); // [4:1]: RG_VBAT_OV_VTH; Set charger OV=3.9V
                pmic_config_interface(0xEF8,0x3,0x3F,0); // [5:0]: RG_VBAT_CV_VTH; Set charger CV=3.8V 
                battery_log(BAT_LOG_CRTI,"[charging_set_cv_voltage] set low CV by 6311 E1\n");
            }
            else
            {
                mt6325_upmu_set_rg_vbat_cv_vth(register_value);
            }
        }
        else
        {
            mt6325_upmu_set_rg_vbat_cv_vth(register_value);
        } 
    }  
    #endif
*/

    pmic_set_register_value(PMIC_RG_VBAT_CV_VTH,register_value);

    battery_log(BAT_LOG_CRTI,"[charging_set_cv_voltage] [0x%x]=0x%x, [0x%x]=0x%x\n",
                    0xf54, upmu_get_reg_value(0xf54),
                    0xf4e, upmu_get_reg_value(0xf4e)
                    );

    return status;
}     
void set_usb_dc_in_mode(int is_sw_en, int is_sw_mode)
{
    pmic_config_interface(0x8D1E, is_sw_en,   0x1, 4);
    pmic_config_interface(0x8D2C, is_sw_mode, 0x1, 4);
    
    pmic_config_interface(0x8D1E, is_sw_en,   0x1, 5);
    pmic_config_interface(0x8D2C, is_sw_mode, 0x1, 5);

    battery_xlog_printk(BAT_LOG_CRTI,"[set_usb_dc_in_mode] Reg[0x%x]=0x%x, Reg[0x%x]=0x%x\n", 
        0x8D1E, upmu_get_reg_value(0x8D1E),
        0x8D2C, upmu_get_reg_value(0x8D2C)
        );
}
static void hw_bc12_dump_register(void)
{
    kal_uint32 reg_val = 0;
    kal_uint32 i = MT6332_CORE_CON0;

    reg_val = upmu_get_reg_value(i);
    battery_xlog_printk(BAT_LOG_FULL, "Reg[0x%x]=0x%x \n", i, reg_val);
}
Ejemplo n.º 5
0
static void hw_bc11_dump_register(void)
{
	kal_uint32 reg_val = 0;
	kal_uint32 reg_num = CHR_CON18;
	kal_uint32 i = 0;

	for(i=reg_num ; i<=CHR_CON19 ; i+=2)
	{
		reg_val = upmu_get_reg_value(i);
		battery_xlog_printk(BAT_LOG_FULL, "Chr Reg[0x%x]=0x%x \r\n", i, reg_val);
	}
}
 static kal_uint32 charging_get_current(void *data)
 {
	kal_uint32 status = STATUS_OK;
	kal_uint32 array_size;
	kal_uint32 reg_value;
	
	array_size = GETARRAYNUM(CS_VTH);
	reg_value=upmu_get_reg_value(0x8);	//RG_CS_VTH
	*(kal_uint32 *)data = charging_value_to_parameter(CS_VTH,array_size,reg_value);
	
	return status;
 }  
static void hw_bc11_dump_register(void)
{
	kal_uint32 reg_val = 0;
	kal_uint32 reg_num = MT6328_CHR_CON20;
	kal_uint32 i = 0;

	for(i=reg_num ; i<=MT6328_CHR_CON21 ; i+=2)
	{
		reg_val = upmu_get_reg_value(i);
		battery_log(BAT_LOG_FULL, "Chr Reg[0x%x]=0x%x \r\n", i, reg_val);
	}
}
/* Internal APIs for cable type detection */
static void hw_bc11_dump_register(void)
{
	kal_uint32 reg_val = 0;
	kal_uint32 reg_num = CHR_CON18;
	kal_uint32 i = 0;

	if (Enable_BATDRV_LOG != BAT_LOG_FULL)
		return;

	for(i=reg_num ; i<=CHR_CON19 ; i+=2)
	{
		reg_val = upmu_get_reg_value(i);
		battery_xlog_printk(BAT_LOG_FULL, "[PowerSupply] Chr Reg[0x%x]=0x%x\n", i, reg_val);
	}
}
 static kal_uint32 charging_dump_register(void *data)
 {
 	kal_uint32 status = STATUS_OK;

	kal_uint32 reg_val = 0;
    kal_uint32 reg_num = CHR_CON0;
    kal_uint32 i = 0;

    for(i=reg_num ; i<=CHR_CON29 ; i+=2)
    {
        reg_val = upmu_get_reg_value(i);
        battery_xlog_printk(BAT_LOG_FULL, "Chr Reg[0x%x]=0x%x \r\n", i, reg_val);
    }

	return status;
 }
static void mt_swchr_debug_msg(void)
{
    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x805E, upmu_get_reg_value(0x805E),
        0x8056, upmu_get_reg_value(0x8056),
        0x80E2, upmu_get_reg_value(0x80E2),
        0x8062, upmu_get_reg_value(0x8062),
        0x8178, upmu_get_reg_value(0x8178),
        0x8054, upmu_get_reg_value(0x8054)        
        );
}
static kal_uint32 charging_dump_register(void *data)
{
    kal_uint32 status = STATUS_OK;

    kal_uint32 reg_val = 0;    
    kal_uint32 i = 0;

    for(i=MT6328_CHR_CON0 ; i<=MT6328_CHR_CON40 ; i+=2)
    {
        reg_val = upmu_get_reg_value(i);
        battery_log(BAT_LOG_CRTI, "[0x%x]=0x%x,", i, reg_val);
    }

    battery_log(BAT_LOG_CRTI, "\n");

    return status;
}
void sw_plug_out_check(void)
{
// chr_plug_out_sw_detect    
#if 1 
    if(upmu_is_chr_det_hal()==1) //sync USB device/otg state
    {
        kal_uint32 cv_val = 0;
        kal_uint32 ich_low_val = 0;
        kal_uint32 is_charge_complete = 0;
        
        pmic_read_interface(0x805E, &cv_val, 0x1, 0);
        if(cv_val == 1)
        {
            battery_xlog_printk(BAT_LOG_FULL,"[chr_plug_out_sw_detect] in CV\n");
            pmic_config_interface(0x8074, 0x1, 0x1, 9);
            pmic_config_interface(0x8166, 0x1, 0x1,12);
            pmic_config_interface(0x8D36, 0x3, 0x3,11); //[12:11]=0x3
        }
        else
        {
            battery_xlog_printk(BAT_LOG_FULL,"[chr_plug_out_sw_detect] not in CV\n");            
            pmic_config_interface(0x8074, 0x0, 0x1, 9);
            pmic_config_interface(0x8166, 0x1, 0x1,12);
            pmic_config_interface(0x8D36, 0x0, 0x3,11); //[12:11]=0x0
        }
            
    #if 1            
            battery_xlog_printk(BAT_LOG_FULL,"[chr_plug_out_sw_detect] Reg[0x%x]=0x%x\n", 0x8074, upmu_get_reg_value(0x8074) );

            pmic_read_interface(0x8054, &ich_low_val, 0x1, 1);
            pmic_read_interface(0x805E, &is_charge_complete, 0x1, 10);
            battery_xlog_printk(BAT_LOG_CRTI,"[chr_plug_out_sw_detect] ich_low_val=%d, is_charge_complete=%d\n", 
                ich_low_val, is_charge_complete);
            
            //if( (ich_low_val==1) || (is_charge_complete==1) )
            if(is_chr_det()==1) // for evb
            {
                set_usb_dc_in_mode(0,0);                
                set_usb_dc_in_mode(0,1);                
                battery_xlog_printk(BAT_LOG_CRTI,"[chr_plug_out_sw_detect] Reg[0x%x]=0x%x\n", 0x816C, upmu_get_reg_value(0x816C) );
                //
                msleep(10);
                if(is_chr_det()==1)
                {
                    set_usb_dc_in_mode(0,0);
                }                
            }
            else
            {
                set_usb_dc_in_mode(0,0);                
            }
    #endif
            
        //debug
        swchr_dump_register();
        mt_swchr_debug_msg();

        battery_xlog_printk(BAT_LOG_FULL,"[chr_plug_out_sw_detect] Reg[0x%x]=0x%x, Reg[0x%x]=0x%x, Reg[0x%x]=0x%x\n", 
                0x8D1E, upmu_get_reg_value(0x8D1E), 0x8D2C, upmu_get_reg_value(0x8D2C), 0x816C, upmu_get_reg_value(0x816C) );
    }
    else
    {
        battery_xlog_printk(BAT_LOG_FULL,"[chr_plug_out_sw_detect] no cable\n");
    }
#endif

}
static void swchr_dump_register(void)
{
    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x8052, upmu_get_reg_value(0x8052),
        0x80E0, upmu_get_reg_value(0x80E0),
        0x807A, upmu_get_reg_value(0x807A),
        0x807E, upmu_get_reg_value(0x807E),
        0x8074, upmu_get_reg_value(0x8074),
        0x8078, upmu_get_reg_value(0x8078)
        );

    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x803C, upmu_get_reg_value(0x803C),        
        0x804C, upmu_get_reg_value(0x804C),
        0x806C, upmu_get_reg_value(0x806C),
        0x803A, upmu_get_reg_value(0x803A),
        0x8170, upmu_get_reg_value(0x8170),
        0x8166, upmu_get_reg_value(0x8166)
        );

    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x8080, upmu_get_reg_value(0x8080),
        0x8040, upmu_get_reg_value(0x8040),
        0x8042, upmu_get_reg_value(0x8042),
        0x8050, upmu_get_reg_value(0x8050),
        0x8036, upmu_get_reg_value(0x8036),
        0x805E, upmu_get_reg_value(0x805E)
        );

    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x8056, upmu_get_reg_value(0x8056),
        0x80E2, upmu_get_reg_value(0x80E2),
        0x8062, upmu_get_reg_value(0x8062),
        0x8178, upmu_get_reg_value(0x8178),
        0x8054, upmu_get_reg_value(0x8054),
        0x816A, upmu_get_reg_value(0x816A)
        );
    
    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x8174, upmu_get_reg_value(0x8174),
        0x8D36, upmu_get_reg_value(0x8D36),
        0x8084, upmu_get_reg_value(0x8084),
        0x815E, upmu_get_reg_value(0x815E),
        0x8D30, upmu_get_reg_value(0x8D30), 
        0x8D34, upmu_get_reg_value(0x8D34)
        );

    battery_xlog_printk(BAT_LOG_CRTI,"[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x,[0x%x]=0x%x\n", 
        0x8D1E, upmu_get_reg_value(0x8D1E), 
        0x8D2C, upmu_get_reg_value(0x8D2C), 
        0x816C, upmu_get_reg_value(0x816C),
        0x8082, upmu_get_reg_value(0x8082),
        0x8060, upmu_get_reg_value(0x8060),
        0x8068, upmu_get_reg_value(0x8068)
        );
}
Ejemplo n.º 14
0
//==============================================================================
// PMIC-AUXADC 
//==============================================================================
kal_uint32 PMIC_IMM_GetOneChannelValue(mt6328_adc_ch_list_enum dwChannel, int deCount, int trimd)
{
	kal_int32 ret=0;
	kal_int32 ret_data;    
	kal_int32 r_val_temp=0;   
	kal_int32 adc_result=0;   
	int count;
	kal_uint32 busy;
	/*
	CH0: BATSNS
	CH1: ISENSE
	CH2: VCDT
	CH3: BAT ON
	CH4: PMIC TEMP
	CH5: ACCDET
	CH6:
	CH7: TSX
	CH8:
	CH9:
	CH10:
	CH11:
	CH12:
	CH13:
	CH14:
	CH15:
	BATSNS 3v-4.5v
	ISENSE 1.5-4.5v
	BATON  0-1.8v
	VCDT   4v-14v
	ACCDET 1.8v 
	GPS    1.8v
	
	*/

	if(dwChannel>15)
		return -1;

	upmu_set_reg_value(0x0a44,0x010a);
	upmu_set_reg_value(0x0cec,0x0000);
	upmu_set_reg_value(0x0d00,0x0010);
	upmu_set_reg_value(0x0f14,0x1290);	

	wake_lock(&pmicAuxadc_irq_lock);

	mutex_lock(&pmic_adc_mutex);
	//ret=pmic_config_interface(MT6328_TOP_CLKSQ_SET,(1<<2),0xffff,0);
	ret=pmic_config_interface(MT6328_AUXADC_RQST0_SET,(1<<dwChannel),0xffff,0);
	mutex_unlock(&pmic_adc_mutex);

	busy=upmu_get_reg_value(0E84);
	udelay(50);

	switch(dwChannel){         
	case 0:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH0_BY_AP) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH0_BY_AP); 	
	break;
	case 1:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH1_BY_AP) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH1_BY_AP);		
	break;
	case 2:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH2) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH2);				
	break;
	case 3:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH3) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH3);			
	break;
	case 4:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH4) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH4);				
	break;
	case 5:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH5) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH5);			
	break;
	case 6:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH6) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH6);				
	break;
	case 7:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH7_BY_AP) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH7_BY_AP);				
	break;
	case 8:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH8) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH8);				
	break;
	case 9:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH9) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH9);			
	break;
	case 10:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH10) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH10);			
	break;
	case 11:    
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH11) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH11);			
	break;
	case 12:    
	case 13:    
	case 14:    
	case 15:    		
		while(mt6328_get_register_value(PMIC_AUXADC_ADC_RDY_CH12_15) != 1 )
		{
			msleep(1);
			if( (count++) > count_time_out)
			{
			PMICLOG("[IMM_GetOneChannelValue_PMIC] (%d) Time out!\n", dwChannel);
			break;
			}			
		}
		ret_data = mt6328_get_register_value(PMIC_AUXADC_ADC_OUT_CH12_15);				
	break;
	

	default:
		PMICLOG("[AUXADC] Invalid channel value(%d,%d)\n", dwChannel, trimd);
		wake_unlock(&pmicAuxadc_irq_lock);
	return -1;
	break;
	}

    switch(dwChannel){         
        case 0:                
            r_val_temp = 3;           
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/32768;
            break;
        case 1:    
            r_val_temp = 3;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/32768;
            break;
        case 2:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;
        case 3:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;
        case 4:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;
        case 5:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;
        case 6:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;
        case 7:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/32768;
            break;    
        case 8:    
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;    			
	case 9:    
	case 10:  
	case 11:  
	case 12:
	case 13:    
	case 14:  
	case 15:  
	case 16:		
            r_val_temp = 1;
            adc_result = (ret_data*r_val_temp*VOLTAGE_FULL_RANGE)/4096;
            break;  
        default:
            PMICLOG("[AUXADC] Invalid channel value(%d,%d)\n", dwChannel, trimd);
            wake_unlock(&pmicAuxadc_irq_lock);
            return -1;
            break;
    }

	wake_unlock(&pmicAuxadc_irq_lock);

       PMICLOG("[AUXADC] ch=%d raw=%d data=%d \n", dwChannel, ret_data,adc_result);

	return ret_data;
	//return adc_result;

}
Ejemplo n.º 15
0
//============================================================ //
void get_hw_chip_diff_trim_value(void)
{
#if defined(CONFIG_POWER_EXT)
#else
    kal_int32 reg_val_1 = 0;
    kal_int32 reg_val_2 = 0;

#if 1
    reg_val_1 = upmu_get_reg_value(0x01C4);
    reg_val_1 = (reg_val_1 & 0xE000) >> 13;

    reg_val_2 = upmu_get_reg_value(0x01C6);
    reg_val_2 = (reg_val_2 & 0x0003);

    chip_diff_trim_value_4_0 = reg_val_1 | (reg_val_2 << 3);

    bm_print(BM_LOG_FULL, "[Chip_Trim] Reg[0x%x]=0x%x, Reg[0x%x]=0x%x, chip_diff_trim_value_4_0=%d\n",
             0x01C4, upmu_get_reg_value(0x01C4), 0x01C6, upmu_get_reg_value(0x01C6), chip_diff_trim_value_4_0);

#else
    bm_print(BM_LOG_FULL,, "[Chip_Trim] need check reg number\n");
#endif

    switch(chip_diff_trim_value_4_0) {
    case 0:
        chip_diff_trim_value = 1000;
        bm_print(BM_LOG_FULL, "[Chip_Trim] chip_diff_trim_value = 1000\n");
        break;
    case 1:
        chip_diff_trim_value = 1005;
        break;
    case 2:
        chip_diff_trim_value = 1010;
        break;
    case 3:
        chip_diff_trim_value = 1015;
        break;
    case 4:
        chip_diff_trim_value = 1020;
        break;
    case 5:
        chip_diff_trim_value = 1025;
        break;
    case 6:
        chip_diff_trim_value = 1030;
        break;
    case 7:
        chip_diff_trim_value = 1035;
        break;
    case 8:
        chip_diff_trim_value = 1040;
        break;
    case 9:
        chip_diff_trim_value = 1045;
        break;
    case 10:
        chip_diff_trim_value = 1050;
        break;
    case 11:
        chip_diff_trim_value = 1055;
        break;
    case 12:
        chip_diff_trim_value = 1060;
        break;
    case 13:
        chip_diff_trim_value = 1065;
        break;
    case 14:
        chip_diff_trim_value = 1070;
        break;
    case 15:
        chip_diff_trim_value = 1075;
        break;
    case 31:
        chip_diff_trim_value = 995;
        break;
    case 30:
        chip_diff_trim_value = 990;
        break;
    case 29:
        chip_diff_trim_value = 985;
        break;
    case 28:
        chip_diff_trim_value = 980;
        break;
    case 27:
        chip_diff_trim_value = 975;
        break;
    case 26:
        chip_diff_trim_value = 970;
        break;
    case 25:
        chip_diff_trim_value = 965;
        break;
    case 24:
        chip_diff_trim_value = 960;
        break;
    case 23:
        chip_diff_trim_value = 955;
        break;
    case 22:
        chip_diff_trim_value = 950;
        break;
    case 21:
        chip_diff_trim_value = 945;
        break;
    case 20:
        chip_diff_trim_value = 940;
        break;
    case 19:
        chip_diff_trim_value = 935;
        break;
    case 18:
        chip_diff_trim_value = 930;
        break;
    case 17:
        chip_diff_trim_value = 925;
        break;
    default:
        bm_print(BM_LOG_FULL, "[Chip_Trim] Invalid value(%d)\n", chip_diff_trim_value_4_0);
        break;
    }

    bm_print(BM_LOG_FULL, "[Chip_Trim] %d,%d\n",
             chip_diff_trim_value_4_0, chip_diff_trim_value);
#endif
}