bool bm_get_fifo_free_size(uint16_t* free_size)
{
uint32_t start, length, stop, cmd_id, c;
// Wait for some microseconds in order to avoid fifo overrun
//
delay_ms(20);
usart_enable_tx(BM_USART_USART);
usart_putchar(BM_USART_USART, BM_MSG_START_PATTERN);
usart_putchar(BM_USART_USART, 3 /* length */);
usart_putchar(BM_USART_USART, BM_MCU_GET_FIFO_FREE_SIZE);
usart_putchar(BM_USART_USART, BM_MSG_STOP_PATTERN);
while (!usart_is_tx_empty(BM_USART_USART));
usart_disable_tx(BM_USART_USART);
usart_enable_rx(BM_USART_USART);
// Check first character is start pattern
usart_getchar(BM_USART_USART, &start);
if (start == BM_MSG_STOP_PATTERN) {
usart_getchar(BM_USART_USART, &start);
}
if (start != BM_MSG_START_PATTERN) {
return false;
}
// Check second character is length
usart_getchar(BM_USART_USART, &length);
if (length != 5) {
return false;
}
// Check third character is Current Command
usart_getchar(BM_USART_USART, &cmd_id);
if (cmd_id != BM_MCU_RET_FIFO_FREE_SIZE) {
return false;
}
// Get Fifo free size
usart_getchar(BM_USART_USART, &c);
*free_size = c << 8;
usart_getchar(BM_USART_USART, &c);
*free_size |= c;
// Check last character is stop pattern
usart_getchar(BM_USART_USART, &stop);
if (stop != BM_MSG_STOP_PATTERN) {
return false;
}
usart_disable_rx(BM_USART_USART);
return true;
}
static void usart_handler(uint8_t port)
{
Usart* usart = get_usart(port);
uint32_t sr = usart_get_status(usart);
if (sr & US_CSR_RXRDY) {
// Data received
ui_com_tx_start();
uint32_t value;
bool b_error = usart_read(usart, &value) ||
(sr & (US_CSR_FRAME | US_CSR_TIMEOUT | US_CSR_PARE));
if (b_error) {
usart_reset_rx(usart);
usart_enable_rx(usart);
udi_cdc_multi_signal_framing_error(port);
ui_com_error();
}
// Transfer UART RX fifo to CDC TX
if (!udi_cdc_multi_is_tx_ready(port)) {
// Fifo full
udi_cdc_multi_signal_overrun(port);
ui_com_overflow();
} else {
udi_cdc_multi_putc(port, value);
}
ui_com_tx_stop();
return;
}
if (sr & US_CSR_TXRDY) {
// Data send
if (udi_cdc_multi_is_rx_ready(port)) {
// Transmit next data
ui_com_rx_start();
int c = udi_cdc_multi_getc(port);
usart_write(usart, c);
} else {
// Fifo empty then Stop UART transmission
usart_disable_tx(usart);
usart_disable_interrupt(usart, US_IDR_TXRDY);
ui_com_rx_stop();
}
}
}
/**
* Configure board USART communication with PC or other terminal.
*/
static void configure_usart(void)
{
static uint32_t ul_sysclk;
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Get system clock. */
ul_sysclk = sysclk_get_cpu_hz();
/* Enable peripheral clock. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART. */
usart_init_hw_handshaking(BOARD_USART, &usart_console_settings, ul_sysclk);
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Specify that stdout should not be buffered. */
#if defined(__GNUC__)
setbuf(stdout, NULL);
#else
/* Already the case in IAR's Normal DLIB default configuration: printf()
* emits one character at a time.
*/
#endif
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief Disable transmitter and Enable receiver.
*/
static void func_receiver(void)
{
uint32_t ul_temp;
/* Disable Transmitter. */
usart_disable_tx(BOARD_USART);
/* Configure the TXD pin as PIO. */
pio_configure_pin(PIN_USART_TXD_IDX, PIN_USART_TXD_IO_FLAGS);
pio_set_pin_low(PIN_USART_TXD_IDX);
/* Enable receiver. */
usart_enable_rx(BOARD_USART);
/* Read dummy to make sure that there are no characters in US_THR! */
if (usart_is_rx_ready(BOARD_USART)) {
usart_read(BOARD_USART, &ul_temp);
/* avoid Cppcheck Warning */
UNUSED(ul_temp);
}
}
/**
* \brief Configure USART in synchronous mode.
*
* \param ul_ismaster 1 for master, 0 for slave.
* \param ul_baudrate Baudrate for synchronous communication.
*
*/
static void configure_usart(uint32_t ul_ismaster, uint32_t ul_baudrate)
{
sam_usart_opt_t usart_console_settings = {
0,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
usart_console_settings.baudrate = ul_baudrate;
#if (SAMG55)
/* Enable the peripheral and set USART mode. */
flexcom_enable(BOARD_FLEXCOM);
flexcom_set_opmode(BOARD_FLEXCOM, FLEXCOM_USART);
#else
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
#endif
/* Configure USART in SYNC. master or slave mode. */
if (ul_ismaster) {
usart_init_sync_master(BOARD_USART, &usart_console_settings, sysclk_get_cpu_hz());
} else {
usart_init_sync_slave(BOARD_USART, &usart_console_settings);
}
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief Set up a USART in SPI master mode device.
*
* The returned device descriptor structure must be passed to the driver
* whenever that device should be used as current slave device.
*
* \param p_usart Base address of the USART instance.
* \param device Pointer to usart device struct that should be initialized.
* \param flags USART configuration flags. Common flags for all
* implementations are the usart modes, which should be SPI_MODE_0,
* SPI_MODE_1, SPI_MODE_2, SPI_MODE_3.
* \param baud_rate Baud rate for communication with slave device in Hz.
* \param sel_id Board specific select id.
*/
void usart_spi_setup_device(Usart *p_usart, struct usart_spi_device *device,
spi_flags_t flags, unsigned long baud_rate,
board_spi_select_id_t sel_id)
{
usart_spi_opt_t opt;
/* avoid Cppcheck Warning */
UNUSED(device);
UNUSED(sel_id);
/* Basic usart SPI configuration. */
opt.baudrate = baud_rate;
opt.char_length = US_MR_CHRL_8_BIT;
opt.spi_mode = flags;
opt.channel_mode = US_MR_CHMODE_NORMAL;
/* Initialize the USART module as SPI master. */
usart_init_spi_master(p_usart, &opt, sysclk_get_cpu_hz());
usart_enable_rx(p_usart);
usart_enable_tx(p_usart);
}
/**
* \brief Configure USART in normal (serial rs232) mode, asynchronous,
* 8 bits, 1 stop bit, no parity, 115200 bauds and enable its transmitter
* and receiver.
*/
static void configure_usart(void)
{
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in serial mode. */
usart_init_rs232(BOARD_USART, &usart_console_settings,
sysclk_get_cpu_hz());
/* Enable the receiver and transmitter. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
}
void uart_open(uint8_t port)
{
UNUSED(port);
// IO is initialized in board init
// Enable interrupt with priority higher than USB
NVIC_SetPriority(USART_INT_IRQn, USART_INT_LEVEL);
NVIC_EnableIRQ(USART_INT_IRQn);
// Initialize it in RS232 mode.
USART_PERIPH_CLK_ENABLE();
if (usart_init_rs232(USART_BASE, &usart_options,
sysclk_get_peripheral_bus_hz(USART_BASE))) {
return;
}
// Enable USART
USART_ENABLE();
// Enable both RX and TX
usart_enable_tx(USART_BASE);
usart_enable_rx(USART_BASE);
// Enable interrupts
usart_enable_interrupt(USART_BASE, US_IER_RXRDY | US_IER_TXRDY);
}
platform_result_t platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, wiced_ring_buffer_t* optional_ring_buffer )
{
sam_usart_opt_t settings;
UNUSED_PARAMETER(driver);
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(config);
UNUSED_PARAMETER(optional_ring_buffer);
pdc_packet_t dma_packet;
if ( config->flow_control != FLOW_CONTROL_DISABLED )
{
return WICED_UNSUPPORTED;
}
memset( &settings, 0, sizeof( settings ) );
switch ( config->data_width )
{
case DATA_WIDTH_5BIT:
settings.char_length = US_MR_CHRL_5_BIT;
break;
case DATA_WIDTH_6BIT:
settings.char_length = US_MR_CHRL_6_BIT;
break;
case DATA_WIDTH_7BIT:
settings.char_length = US_MR_CHRL_7_BIT;
break;
case DATA_WIDTH_8BIT:
settings.char_length = US_MR_CHRL_8_BIT;
break;
case DATA_WIDTH_9BIT:
default:
return WICED_UNSUPPORTED;
}
switch ( config->parity )
{
case ODD_PARITY:
settings.parity_type = US_MR_PAR_ODD;
break;
case EVEN_PARITY:
settings.parity_type = US_MR_PAR_EVEN;
break;
case NO_PARITY:
settings.parity_type = US_MR_PAR_NO;
break;
default:
break;
}
switch ( config->stop_bits )
{
case STOP_BITS_1:
settings.stop_bits = US_MR_NBSTOP_1_BIT;
break;
case STOP_BITS_2:
settings.stop_bits = US_MR_NBSTOP_2_BIT;
break;
default:
break;
}
settings.baudrate = config->baud_rate;
settings.channel_mode = US_MR_CHMODE_NORMAL;
driver->peripheral = peripheral;
// /* Initialise TX and RX complete semaphores */
host_rtos_init_semaphore( &driver->tx_dma_complete );
host_rtos_init_semaphore( &driver->rx_dma_complete );
/* Set Tx and Rx pin mode to UART peripheral */
platform_gpio_peripheral_pin_init( peripheral->tx_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( peripheral->rx_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
/* Init CTS and RTS pins (if available) */
if ( peripheral->cts_pin != NULL )
{
platform_gpio_peripheral_pin_init( peripheral->cts_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
}
if ( peripheral->rts_pin != NULL )
{
platform_gpio_peripheral_pin_init( peripheral->rts_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
}
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock( peripheral->peripheral_id );
/* Enable the receiver and transmitter. */
usart_reset_tx( peripheral->peripheral );
usart_reset_rx( peripheral->peripheral );
/* Configure USART in serial mode. */
usart_init_rs232( peripheral->peripheral, &settings, CPU_CLOCK_HZ );
/* Disable all the interrupts. */
usart_disable_interrupt( peripheral->peripheral, 0xffffffff );
/* Enable uart interrupt */
NVIC_SetPriority( platform_uarts_irq_numbers[peripheral->uart_id], 0x06 );
NVIC_EnableIRQ( platform_uarts_irq_numbers[peripheral->uart_id] );
/* Enable PDC transmit */
pdc_enable_transfer( usart_get_pdc_base( peripheral->peripheral ), PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
driver->rx_ring_buffer = optional_ring_buffer;
dma_packet.ul_addr = (uint32_t)driver->rx_ring_buffer->buffer;
dma_packet.ul_size = (uint32_t)driver->rx_ring_buffer->size;
pdc_rx_init( usart_get_pdc_base( peripheral->peripheral ), &dma_packet, &dma_packet );
usart_enable_interrupt( peripheral->peripheral, US_IER_ENDRX | US_IER_RXBUFF | US_IER_RXRDY | US_IER_ENDTX );
/* Enable the receiver and transmitter. */
usart_enable_tx( peripheral->peripheral );
usart_enable_rx( peripheral->peripheral );
return PLATFORM_SUCCESS;
}
/**
* \brief usart_rs485 Application entry point.
*
* Configure USART in RS485 mode. If the application starts earlier, it acts
* as a receiver. Otherwise, it should be a transmitter.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
static uint8_t uc_sync = SYNC_CHAR;
uint32_t time_elapsed = 0;
uint32_t ul_i;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
/* Configure USART. */
configure_usart();
/* Get board USART PDC base address and enable receiver and transmitter. */
g_p_pdc = usart_get_pdc_base(BOARD_USART);
pdc_enable_transfer(g_p_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* 1ms tick. */
configure_systick();
/* Initialize receiving buffer to distinguish with the sent frame. */
memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE);
/*
* Enable transmitter here, and disable receiver first, to avoid receiving
* characters sent by itself. It's necessary for half duplex RS485.
*/
usart_enable_tx(BOARD_USART);
usart_disable_rx(BOARD_USART);
/* Send a sync character XON (0x11). */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
/* Delay until the line is cleared, an estimated time used. */
wait(50);
/* Read the acknowledgement. */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
/* Then enable receiver. */
usart_enable_rx(BOARD_USART);
/* Wait until time out or acknowledgement is received. */
time_elapsed = get_tick_count();
while (!usart_is_rx_buf_end(BOARD_USART)) {
if (get_tick_count() - time_elapsed > TIMEOUT) {
break;
}
}
/* If acknowledgement received in a short time. */
if (usart_is_rx_buf_end(BOARD_USART)) {
/* Acknowledgement. */
if (uc_sync == ACK_CHAR) {
/* Act as transmitter, start transmitting. */
g_state = TRANSMITTING;
puts("-I- Start transmitting!\r");
g_st_packet.ul_addr = (uint32_t)g_uc_transmit_buffer;
g_st_packet.ul_size = PDC_BUF_SIZE;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
/* Enable transmitting interrupt. */
usart_enable_interrupt(BOARD_USART, US_IER_ENDTX);
}
} else {
/* Start receiving, act as receiver. */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
puts("-I- Receiving sync character.\r");
while (!usart_is_rx_buf_end(BOARD_USART)) {
}
/* Sync character is received. */
if (uc_sync == SYNC_CHAR) {
/* SEND XOff as acknowledgement. */
uc_sync = ACK_CHAR;
/*
* Delay to prevent the character from being discarded by
* transmitter due to responding too soon.
*/
wait(100);
pio_set_pin_high(PIN_RE_IDX);
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
g_state = RECEIVING;
puts("-I- Start receiving!\r");
g_st_packet.ul_addr = (uint32_t)g_uc_receive_buffer;
g_st_packet.ul_size = PDC_BUF_SIZE;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
pio_set_pin_low(PIN_RE_IDX);
/* Enable receiving interrupt. */
usart_enable_interrupt(BOARD_USART, US_IER_ENDRX);
}
}
while (g_state != RECEIVED) {
}
ul_i = 0;
/* Print received frame out. */
while ((ul_i < BUFFER_SIZE) && (g_uc_receive_buffer[ul_i] != '\0')) {
if (g_uc_transmit_buffer[ul_i] != g_uc_receive_buffer[ul_i]) {
puts("-E- Error occurred while receiving!\r");
/* Infinite loop here. */
while (1) {
}
}
ul_i++;
}
puts("-I- Received successfully!\r");
while (1) {
}
}
/**
* \brief usart_rs485 Application entry point.
*
* Configure USART in RS485 mode. If the application starts earlier, it acts
* as a receiver. Otherwise, it should be a transmitter.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t uc_receive, uc_send = SYNC_CHAR;
uint32_t time_elapsed = 0;
uint32_t i;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
/* 1ms tick. */
configure_systick();
/* Configure USART. */
configure_usart();
/* Initialize receiving buffer to distinguish with the sent frame. */
memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE);
/*
* Enable transmitter here, and disable receiver first, to avoid receiving
* characters sent by itself. It's necessary for half duplex RS485.
*/
usart_enable_tx(BOARD_USART);
usart_disable_rx(BOARD_USART);
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
/* Send a sync character XON (0x11). */
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
/* Enable transfer PDCA channel */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Delay until the line is cleared, an estimated time used. */
wait(50);
/* Then enable receiver. */
usart_enable_rx(BOARD_USART);
/* Read the acknowledgement. */
pdca_channel_write_load(PDCA_RX_CHANNEL, &uc_receive, 1);
/* Enable PDCA channel */
pdca_channel_enable(PDCA_RX_CHANNEL);
/* Wait until time out or acknowledgement is received. */
time_elapsed = get_tick_count();
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
if (get_tick_count() - time_elapsed > TIMEOUT) {
break;
}
}
/* If acknowledgement received in a short time. */
if (pdca_get_channel_status(PDCA_RX_CHANNEL) ==
PDCA_CH_TRANSFER_COMPLETED) {
/* Acknowledgement. */
if (uc_receive == ACK_CHAR) {
/* Act as transmitter, start transmitting. */
puts("-I- Act as transmitter.\r");
g_state = TRANSMITTING;
puts("-I- Start transmitting!\r");
pdca_channel_write_load(PDCA_TX_CHANNEL, g_uc_transmit_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_TX_CHANNEL, PDCA_TX_Handler,
PDCA_1_IRQn, 1, PDCA_IER_TRC);
while (g_state != TRANSMITTED) {
}
puts("-I- Transmit done!\r");
while (1) {
}
}
} else {
/* Start receiving, act as receiver. */
puts("-I- Act as receiver.\r");
puts("-I- Receiving sync character.\r");
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
}
/* Sync character is received. */
if (uc_receive == SYNC_CHAR) {
puts("-I- Received sync character.\r");
/* SEND XOff as acknowledgement. */
uc_send = ACK_CHAR;
/*
* Delay to prevent the character from being discarded by
* transmitter due to responding too soon.
*/
wait(100);
ioport_set_pin_level(RS485_USART_CTS_PIN, 1);
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
g_state = RECEIVING;
puts("-I- Start receiving buffer!\r");
pdca_channel_write_load(PDCA_RX_CHANNEL, g_uc_receive_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_RX_CHANNEL, PDCA_RX_Handler,
PDCA_0_IRQn, 1, PDCA_IER_TRC);
ioport_set_pin_level(RS485_USART_CTS_PIN, 0);
while (g_state != RECEIVED) {
}
}
}
i = 0;
/* Check received frame. */
while (i < BUFFER_SIZE) {
if (g_uc_transmit_buffer[i] != g_uc_receive_buffer[i]) {
puts("-E- Error occurred while receiving!\r");
/* Infinite loop here. */
while (1) {
}
}
i++;
}
puts("-I- Received buffer successfully!\r");
while (1) {
}
}
/**
* \brief This function opens an USART
*
* \note Opening of the specified USART implies initializing local variables and
* opening required hardware with the following configuration:
* - bauds as specified
* - 8 bits, no parity, 1 stop bit
* - enable interrupts
*
* \param chn Communication channel [0, 1]
* \param bauds Communication speed in bauds
*
* \retval true on success.
* \retval false on failure.
*/
int8_t busart_if_open(uint8_t chn, uint32_t bauds)
{
#if defined(CONF_BOARD_USART0_RXD) || defined(CONF_BOARD_USART1_RXD)
sam_usart_opt_t usart_console_settings;
/* Expected baud rate. */
usart_console_settings.baudrate = bauds;
/* Configure channel mode (Normal, Automatic, Local_loopback or
* Remote_loopback) */
usart_console_settings.channel_mode = US_MR_CHMODE_NORMAL;
/* Initialize value for USART mode register */
usart_console_settings.parity_type = US_MR_PAR_NO;
usart_console_settings.char_length = US_MR_CHRL_8_BIT;
usart_console_settings.stop_bits = US_MR_NBSTOP_1_BIT;
#else
UNUSED(bauds);
#endif
/* check usart and it is close */
if (chn >= 2) {
return false;
}
if (busart_chn_open[chn]) {
return false;
}
switch (chn) {
#ifdef CONF_BOARD_USART0_RXD
case 0:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_USART0);
/* Configure USART. */
usart_init_rs232(USART0, &usart_console_settings,
sysclk_get_peripheral_hz());
/* Assign buffers to pointers */
busart_comm_data_0.puc_tq_buf = ptr_tx_usart_buf0;
busart_comm_data_0.puc_rq_buf = ptr_rx_usart_buf0;
busart_comm_data_0.us_rq_count = 0;
busart_comm_data_0.us_rq_idx = 0;
busart_comm_data_0.us_wq_idx = 0;
/* Get board USART0 PDC base address and enable receiver and
* transmitter. */
g_p_usart_pdc0 = usart_get_pdc_base(USART0);
pdc_enable_transfer(g_p_usart_pdc0,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_usart_rx_packet0.ul_addr = (uint32_t)gs_puc_usart_buf0;
g_st_usart_rx_packet0.ul_size = USART_BUFFER_SIZE;
pdc_rx_init(g_p_usart_pdc0, &g_st_usart_rx_packet0, NULL);
/* Stop transmitting data */
g_st_usart_tx_packet0.ul_addr = (uint32_t)busart_comm_data_0.puc_tq_buf;
g_st_usart_tx_packet0.ul_size = 0;
pdc_tx_init(g_p_usart_pdc0, &g_st_usart_tx_packet0, NULL);
gs_ul_size_usart_buf0 = USART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
usart_disable_interrupt(USART0, US_IDR_RXRDY);
usart_enable_interrupt(USART0, US_IER_RXBUFF);
/* Enable the receiver and transmitter. */
usart_enable_tx(USART0);
usart_enable_rx(USART0);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)USART0_IRQn, USART0_PRIO);
NVIC_EnableIRQ(USART0_IRQn);
busart_chn_open[chn] = true;
num_bytes_rx_usart0 = 0;
/* Configure TC usart */
_configure_TC_usart();
tc_start(TC_USART, TC_USART_CHN);
return true;
}
break;
#endif
#ifdef CONF_BOARD_USART1_RXD
case 1:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_USART1);
/* Configure USART. */
usart_init_rs232(USART1, &usart_console_settings,
sysclk_get_peripheral_hz());
/* Assign buffers to pointers */
busart_comm_data_1.puc_tq_buf = ptr_tx_usart_buf1;
busart_comm_data_1.puc_rq_buf = ptr_rx_usart_buf1;
busart_comm_data_1.us_rq_count = 0;
busart_comm_data_1.us_rq_idx = 0;
busart_comm_data_1.us_wq_idx = 0;
/* Get board USART1 PDC base address and enable receiver and
* transmitter. */
g_p_usart_pdc1 = usart_get_pdc_base(USART1);
pdc_enable_transfer(g_p_usart_pdc1,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_usart_rx_packet1.ul_addr = (uint32_t)gs_puc_usart_buf1;
g_st_usart_rx_packet1.ul_size = USART_BUFFER_SIZE;
pdc_rx_init(g_p_usart_pdc1, &g_st_usart_rx_packet1, NULL);
/* Stop transmitting data */
g_st_usart_tx_packet1.ul_addr = (uint32_t)busart_comm_data_1.puc_tq_buf;
g_st_usart_tx_packet1.ul_size = 0;
pdc_tx_init(g_p_usart_pdc1, &g_st_usart_tx_packet1, NULL);
gs_ul_size_usart_buf1 = USART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
usart_disable_interrupt(USART1, US_IDR_RXRDY);
usart_enable_interrupt(USART1, US_IER_RXBUFF);
/* Enable the receiver and transmitter. */
usart_enable_tx(USART1);
usart_enable_rx(USART1);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)USART1_IRQn, USART1_PRIO);
NVIC_EnableIRQ(USART1_IRQn);
busart_chn_open[chn] = true;
num_bytes_rx_usart1 = 0;
/* Configure TC usart */
_configure_TC_usart();
tc_start(TC_USART, TC_USART_CHN);
return true;
}
break;
#endif
default:
return false;
}
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
int clockid = NC, flexcom = NC;
/*To determine the uart peripheral associated with pins*/
UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT(uart != (UARTName)NC);
if (g_sys_init == 0) {
sysclk_init();
system_board_init();
g_sys_init = 1;
}
pUSART_S(obj) = uart;
pSERIAL_S(obj)->uart_serial_options.baudrate = (9600UL);
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
pSERIAL_S(obj)->actrec = false;
pSERIAL_S(obj)->acttra = false;
/* Configure UART pins */
if(tx != NC) {
pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
ioport_disable_pin(tx);
}
if(rx != NC) {
pin_function(rx, pinmap_find_function(rx, PinMap_UART_RX));
ioport_disable_pin(rx);
}
clockid = get_usart_clock_id(uart);
if (clockid != NC) {
sysclk_enable_peripheral_clock(clockid);
}
flexcom = (int)get_flexcom_id(uart);
#if (!SAM4L)
#if (SAMG55)
/* Configure flexcom for usart */
flexcom_enable((Flexcom* )flexcom);
flexcom_set_opmode((Flexcom* )flexcom, FLEXCOM_USART);
#else
sysclk_enable_peripheral_clock(clockid);
#endif
/* Configure USART */
usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options),
sysclk_get_peripheral_hz());
#endif
#if (SAM4L)
sysclk_enable_peripheral_clock(clockid);
/* Configure USART */
usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options, sysclk_get_peripheral_bus_hz((Usart*)uart));
#endif
/* Disable rx and tx in case 1 line only required to be configured for usart */
usart_disable_tx((Usart*)uart);
usart_disable_rx((Usart*)uart);
/* Enable the receiver and transmitter. */
if(tx != NC) {
usart_enable_tx((Usart*)uart);
}
if(rx != NC) {
usart_enable_rx((Usart*)uart);
}
if(uart == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
OSStatus platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, ring_buffer_t* optional_ring_buffer )
{
pdc_packet_t pdc_uart_packet, pdc_uart_tx_packet;
OSStatus err = kNoErr;
sam_usart_opt_t settings;
bool hardware_shaking = false;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ) && ( peripheral != NULL ) && ( config != NULL ), exit, err = kParamErr);
require_action_quiet( (optional_ring_buffer->buffer != NULL ) && (optional_ring_buffer->size != 0), exit, err = kUnsupportedErr);
driver->rx_size = 0;
driver->tx_size = 0;
driver->rx_ring_buffer = optional_ring_buffer;
driver->last_transmit_result = kNoErr;
driver->last_receive_result = kNoErr;
driver->peripheral = (platform_uart_t*)peripheral;
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore( &driver->tx_complete, 1 );
mico_rtos_init_semaphore( &driver->rx_complete, 1 );
mico_rtos_init_semaphore( &driver->sem_wakeup, 1 );
mico_rtos_init_mutex ( &driver->tx_mutex );
#else
driver->tx_complete = false;
driver->rx_complete = false;
#endif
/* Set Tx and Rx pin mode to UART peripheral */
platform_gpio_peripheral_pin_init( peripheral->tx_pin, ( peripheral->tx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( peripheral->rx_pin, ( peripheral->rx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
/* Init CTS and RTS pins (if available) */
if ( peripheral->cts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
hardware_shaking = true;
platform_gpio_peripheral_pin_init( peripheral->cts_pin, ( peripheral->cts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
}
if ( peripheral->rts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
hardware_shaking = true;
platform_gpio_peripheral_pin_init( peripheral->rts_pin, ( peripheral->rts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
}
/* Enable the clock. */
if( pmc_is_periph_clk_enabled( peripheral->peripheral_id ) == 0 ) {
flexcom_enable( peripheral->flexcom_base );
}
flexcom_set_opmode( peripheral->flexcom_base, FLEXCOM_USART );
/* Enable the receiver and transmitter. */
usart_reset_tx( peripheral->port );
usart_reset_rx( peripheral->port );
/* Disable all the interrupts. */
usart_disable_interrupt( peripheral->port, 0xffffffff );
switch ( config->parity ) {
case NO_PARITY:
settings.parity_type = US_MR_PAR_NO;
break;
case EVEN_PARITY:
settings.parity_type = US_MR_PAR_EVEN;
break;
case ODD_PARITY:
settings.parity_type = US_MR_PAR_ODD;
break;
default:
err = kParamErr;
goto exit;
}
switch ( config->data_width) {
case DATA_WIDTH_5BIT:
settings.char_length = US_MR_CHRL_5_BIT;
break;
case DATA_WIDTH_6BIT:
settings.char_length = US_MR_CHRL_6_BIT;
break;
case DATA_WIDTH_7BIT:
settings.char_length = US_MR_CHRL_7_BIT;
break;
case DATA_WIDTH_8BIT:
settings.char_length = US_MR_CHRL_8_BIT;
break;
case DATA_WIDTH_9BIT:
settings.char_length = US_MR_MODE9;
break;
default:
err = kParamErr;
goto exit;
}
settings.baudrate = config->baud_rate;
settings.stop_bits = ( config->stop_bits == STOP_BITS_1 ) ? US_MR_NBSTOP_1_BIT : US_MR_NBSTOP_2_BIT;
settings.channel_mode= US_MR_CHMODE_NORMAL;
/* Configure USART in serial mode. */
if (!hardware_shaking) {
usart_init_rs232( peripheral->port, &settings, sysclk_get_peripheral_hz());
} else {
usart_init_hw_handshaking( peripheral->port, &settings, sysclk_get_peripheral_hz());
}
/* Enable uart interrupt */
NVIC_SetPriority( platform_flexcom_irq_numbers[peripheral->uart_id], 0x06 );
NVIC_EnableIRQ( platform_flexcom_irq_numbers[peripheral->uart_id] );
/* Enable PDC transmit */
pdc_enable_transfer( usart_get_pdc_base( peripheral->port ), PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS );
pdc_uart_packet.ul_addr = (uint32_t)driver->rx_ring_buffer->buffer;
pdc_uart_packet.ul_size = (uint32_t)driver->rx_ring_buffer->size;
pdc_rx_init( usart_get_pdc_base( peripheral->port ), &pdc_uart_packet, &pdc_uart_packet );
pdc_uart_tx_packet.ul_addr = (uint32_t)0;
pdc_uart_tx_packet.ul_size = (uint32_t)1;
pdc_tx_init( usart_get_pdc_base( driver->peripheral->port ), &pdc_uart_tx_packet, NULL );
usart_enable_interrupt( peripheral->port, US_IER_ENDRX | US_IER_RXBUFF | US_IER_RXRDY | US_IER_ENDTX );
/* Enable the receiver and transmitter. */
usart_enable_tx( peripheral->port );
usart_enable_rx( peripheral->port );
exit:
platform_mcu_powersave_enable( );
return err;
}
void board_init(void)
{
ioport_init();
//SPI interface initialization
#ifdef CONF_SPI
//MISO
ioport_set_pin_peripheral_mode(PIN_PA21, IOPORT_MODE_MUX_A);
//MOSI
ioport_set_pin_peripheral_mode(PIN_PA22, IOPORT_MODE_MUX_A);
//SCK
ioport_set_pin_peripheral_mode(PIN_PA23, IOPORT_MODE_MUX_A);
//CS0
ioport_set_pin_peripheral_mode(PIN_PA24, IOPORT_MODE_MUX_A);
//CS1
ioport_set_pin_peripheral_mode(PIN_PA13, IOPORT_MODE_MUX_C);
//CS2
ioport_set_pin_peripheral_mode(PIN_PA14, IOPORT_MODE_MUX_C);
//CS3
ioport_set_pin_peripheral_mode(PIN_PB12, IOPORT_MODE_MUX_B);
spi_enable_clock(SPI);
spi_disable(SPI);
spi_reset(SPI);
spi_set_master_mode(SPI);
spi_disable_mode_fault_detect(SPI);
spi_disable_loopback(SPI);
spi_set_variable_peripheral_select(SPI);
spi_disable_peripheral_select_decode(SPI);
//spi_set_peripheral_chip_select_value(SPI, SPI_CHSEL);
//spi_set_transfer_delay(SPI, 1, 50, 0);
//spi_set_delay_between_chip_select(SPI, 0);
for(char i = 0; i < 4; i++){
spi_set_bits_per_transfer(SPI, i, 8);
//spi_set_baudrate_div(SPI, i, spi_calc_baudrate_div(1000000, sysclk_get_cpu_hz()));
spi_set_baudrate_div(SPI, i, (sysclk_get_cpu_hz() / 500000));
spi_configure_cs_behavior(SPI, i, SPI_CS_KEEP_LOW);
spi_set_clock_polarity(SPI, i, 0);
spi_set_clock_phase(SPI, i, 0);
}
spi_enable(SPI);
#endif
//USART0 initialization
#ifdef CONF_USART0
//USART0 RXD
ioport_set_pin_peripheral_mode(PIN_PA11, IOPORT_MODE_MUX_A);
#if SAM4L
sysclk_enable_peripheral_clock(USART0);
#endif
//USART0 configuration struct
const sam_usart_opt_t usart0_console_settings = {
CONF_USART_0_BAUDRATE,
CONF_USART_0_CHAR_LENGTH,
CONF_USART_0_PARITY,
CONF_USART_0_STOP_BITS,
US_MR_CHMODE_NORMAL
};
usart_init_rs232(USART0, &usart0_console_settings, sysclk_get_main_hz());
usart_enable_tx(USART0);
usart_enable_rx(USART0);
usart_enable_interrupt(USART0, US_IER_RXRDY);
NVIC_SetPriority(USART0_IRQn, 10);
NVIC_EnableIRQ(USART0_IRQn);
#endif
//USART1 initialization
#ifdef CONF_USART1
//USART1 TXD
ioport_set_pin_peripheral_mode(PIN_PA16, IOPORT_MODE_MUX_A);
//USART1 RXD
ioport_set_pin_peripheral_mode(PIN_PA15, IOPORT_MODE_MUX_A);
#if SAM4L
sysclk_enable_peripheral_clock(USART1);
#endif
//USART1 configuration struct
const sam_usart_opt_t usart1_console_settings = {
CONF_USART_1_BAUDRATE,
CONF_USART_1_CHAR_LENGTH,
CONF_USART_1_PARITY,
CONF_USART_1_STOP_BITS,
US_MR_CHMODE_NORMAL
};
usart_init_rs232(USART1, &usart1_console_settings, sysclk_get_main_hz());
usart_enable_tx(USART1);
usart_enable_rx(USART1);
usart_enable_interrupt(USART1, US_IER_RXRDY);
//NVIC_SetPriority(USART0_IRQn, 10);
NVIC_EnableIRQ(USART1_IRQn);
#endif
#ifdef CONF_TWIMS1
//SDA
ioport_set_pin_peripheral_mode(PIN_PB00, IOPORT_MODE_MUX_A);
//SCL
ioport_set_pin_peripheral_mode(PIN_PB01, IOPORT_MODE_MUX_A);
/* Set TWIM options */
uint32_t cpu_speed = 0;
cpu_speed = sysclk_get_peripheral_bus_hz(EXAMPLE_TWIM);
struct twim_config opts = {
.twim_clk = sysclk_get_cpu_hz(), //Importante
.speed = TWIM_MASTER_SPEED,
.hsmode_speed = 0,
.data_setup_cycles = 0,
.hsmode_data_setup_cycles = 0,
.smbus = false,
.clock_slew_limit = 0,
.clock_drive_strength_low = 0,
.data_slew_limit = 0,
.data_drive_strength_low = 0,
.hs_clock_slew_limit = 0,
.hs_clock_drive_strength_high = 0,
.hs_clock_drive_strength_low = 0,
.hs_data_slew_limit = 0,
.hs_data_drive_strength_low = 0,
};
/* Initialize the TWIM Module */
twim_set_callback(EXAMPLE_TWIM, 0, twim_default_callback, 1);
twim_set_config(EXAMPLE_TWIM, &opts);
#endif
//ADS 1294R initialization
#ifdef CONF_ADS
ADS_ioconfig();
Soft_Reset_ADS1298();
delay_us(50);
Stop_Read_Data_Continuous();
/*Configuration register 1*/
ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_1_REGISTER , SINGLE_BYTE);
ADS1298_SPI_Data(0x06);
/*Configuration register 2*/
ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_2_REGISTER , SINGLE_BYTE);
ADS1298_SPI_Data(0x00);
/*Configuration register 3*/
ADS1298_SPI_Address_Byte_Count(WRITE_CONFIG_3_REGISTER , SINGLE_BYTE);
ADS1298_SPI_Data(0xDC);
/*Channel 1 register*/
ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_1_SET_REGISTER, SINGLE_BYTE);
ADS1298_SPI_Data(0x00);
/*Channel 2 register*/
ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_2_SET_REGISTER , SINGLE_BYTE);
ADS1298_SPI_Data(0x00);
/*Channel 3 register*/
ADS1298_SPI_Address_Byte_Count(WRITE_CHANNEL_3_SET_REGISTER , SINGLE_BYTE);
ADS1298_SPI_Data(0x00);
/*RLD_SENSP register*/
ADS1298_SPI_Address_Byte_Count(WRITE_RIGHT_LEG_DRIVE_SENSE_POSITIVE_REGISTER, SINGLE_BYTE);
ADS1298_SPI_Data(0x0F);
/*RLD_SENSN register*/
ADS1298_SPI_Address_Byte_Count(WRITE_RIGHT_LEG_DRIVE_SENSE_NEGATIVE_REGISTER, SINGLE_BYTE);
ADS1298_SPI_Data(0x0F);
/*Respiration control register*/
//Respiration channel not enabled
#endif
}
/**
* \brief
*
* \param
*
* \return void
*/
void uart_config(void)
{
const sam_uart_opt_t uart_settings = {
.ul_mck = sysclk_get_peripheral_hz(),
.ul_baudrate = 19200,
.ul_mode = UART_MR_PAR_NO
};
sysclk_enable_peripheral_clock(ID_UART);
uart_init( BOARD_UART, &uart_settings );
}
/**
* \brief
*
* \param
*
* \return void
*/
void usart0_config(void)
{
const sam_usart_opt_t usart_0_settings = {
.baudrate = 19200,
.char_length = US_MR_CHRL_8_BIT,
.parity_type = US_MR_PAR_NO,
.stop_bits = US_MR_NBSTOP_1_BIT,
.channel_mode = US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
.irda_filter = 0
};
sysclk_enable_peripheral_clock(BOART_ID_USART0);
usart_init_rs232(BOARD_USART0, &usart_0_settings, sysclk_get_peripheral_hz());
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART0, 0xffffffff);
/* Enable the receiver and transmitter. */
usart_enable_tx(BOARD_USART0);
usart_enable_rx(BOARD_USART0);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART0_IRQn);
usart_enable_interrupt(BOARD_USART0, US_IER_RXRDY);
}
/**
* \brief
*
* \param
*
* \return void
*/
void usart1_config(void)
{
const sam_usart_opt_t usart_1_settings = {
.baudrate = 115200,
.char_length = US_MR_CHRL_8_BIT,
.parity_type = US_MR_PAR_NO,
.stop_bits = US_MR_NBSTOP_1_BIT,
.channel_mode = US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
.irda_filter = 0
};
sysclk_enable_peripheral_clock( BOART_ID_USART1 );
usart_init_rs232( BOARD_USART1, &usart_1_settings, sysclk_get_peripheral_hz() );
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART1, 0xffffffff);
/* Enable the receiver and transmitter. */
usart_enable_tx(BOARD_USART1);
usart_enable_rx(BOARD_USART1);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ( USART1_IRQn );
usart_enable_interrupt( BOARD_USART1, US_IER_RXRDY);
}
/**
* \brief
*
* \param uxPriority
*
* \return void
*/
void vStartUartTaskLauncher( unsigned portBASE_TYPE uxPriority )
{
/* Spawn the Sentinel task. */
xTaskCreate( vUartTask, (const signed portCHAR *)"SPILAUNCH",
TASK_RADIO_STACK_SIZE, NULL, uxPriority,
(xTaskHandle *)NULL );
}
/**
* \brief UART handle task..
*
* \param
* \param
*
* \return None
*/
portTASK_FUNCTION_PROTO( vUartTask, pvParameters )
{
uint8_t i, sms_text[] = "AT\r";
(void)pvParameters;
/* Initialize UART model.*/
uart_config();
usart0_config();
usart1_config();
gpio_set_pin_low( PIO_PA17_IDX );
for (;;)
{
vTaskDelay(1000);
uart_write( BOARD_UART, '1' );
usart_serial_write_packet( BOARD_USART1, sms_text, sizeof(sms_text) );
}
}
/**
* \brief
*
* \param
*
* \return void
*/
void USART0_Handler(void)
{
uint32_t ul_status;
/* Read USART Status. */
ul_status = usart_get_status( BOARD_USART0 );
/* Receive buffer is full. */
if (ul_status & US_CSR_RXRDY)
{
usart_read( BOARD_USART0, (uint32_t *)&gs_ul_read_buffer[0] );
}
}
/**
* \ingroup freertos_usart_peripheral_control_group
* \brief Initializes the FreeRTOS ASF USART driver for the specified USART
* port.
*
* freertos_usart_serial_init() is an ASF specific FreeRTOS driver function. It
* must be called before any other ASF specific FreeRTOS driver functions
* attempt to access the same USART port.
*
* If freertos_driver_parameters->operation_mode equals USART_RS232 then
* freertos_usart_serial_init() will configure the USART port for standard RS232
* operation. If freertos_driver_parameters->operation_mode equals any other
* value then freertos_usart_serial_init() will not take any action.
*
* Other ASF USART functions can be called after freertos_usart_serial_init()
* has completed successfully.
*
* The FreeRTOS ASF driver both installs and handles the USART PDC interrupts.
* Users do not need to concern themselves with interrupt handling, and must
* not install their own interrupt handler.
*
* This driver is provided with an application note, and an example project that
* demonstrates the use of this function.
*
* \param p_usart The USART peripheral being initialized.
* \param uart_parameters Structure that defines the USART bus and transfer
* parameters, such the baud rate and the number of data bits.
* sam_usart_opt_t is a standard ASF type (it is not FreeRTOS specific).
* \param freertos_driver_parameters Defines the driver behavior. See the
* freertos_peripheral_options_t documentation, and the application note that
* accompanies the ASF specific FreeRTOS functions.
*
* \return If the initialization completes successfully then a handle that can
* be used with FreeRTOS USART read and write functions is returned. If
* the initialisation fails then NULL is returned.
*/
freertos_usart_if freertos_usart_serial_init(Usart *p_usart,
const sam_usart_opt_t *const uart_parameters,
const freertos_peripheral_options_t *const freertos_driver_parameters)
{
portBASE_TYPE usart_index;
bool is_valid_operating_mode;
freertos_usart_if return_value;
const enum peripheral_operation_mode valid_operating_modes[] = {USART_RS232};
/* Find the index into the all_usart_definitions array that holds details of
the p_usart peripheral. */
usart_index = get_pdc_peripheral_details(all_usart_definitions,
MAX_USARTS,
(void *) p_usart);
/* Check the requested operating mode is valid for the peripheral. */
is_valid_operating_mode = check_requested_operating_mode(
freertos_driver_parameters->operation_mode,
valid_operating_modes,
sizeof(valid_operating_modes) /
sizeof(enum peripheral_operation_mode));
/* Don't do anything unless a valid p_usart pointer was used, and a valid
operating mode was requested. */
if ((usart_index < MAX_USARTS) && (is_valid_operating_mode == true)) {
/* This function must be called exactly once per supported USART. Check it
has not been called before. */
configASSERT(rx_buffer_definitions[usart_index].next_byte_to_read == NULL);
/* Disable everything before enabling the clock. */
usart_disable_tx(p_usart);
usart_disable_rx(p_usart);
pdc_disable_transfer(all_usart_definitions[usart_index].pdc_base_address,
(PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS));
#if (SAMG55)
/* Enable the peripheral and set USART mode. */
uint32_t temp = (uint32_t)all_usart_definitions[usart_index].peripheral_base_address - 0x200;
Flexcom *p_flexcom = (Flexcom *)temp;
flexcom_enable(p_flexcom);
flexcom_set_opmode(p_flexcom, FLEXCOM_USART);
#else
/* Enable the peripheral clock in the PMC. */
pmc_enable_periph_clk(
all_usart_definitions[usart_index].peripheral_id);
#endif
switch (freertos_driver_parameters->operation_mode) {
case USART_RS232:
/* Call the standard ASF init function. */
usart_init_rs232(p_usart, uart_parameters,
sysclk_get_cpu_hz());
break;
default:
/* Other modes are not currently supported. */
break;
}
/* Disable all the interrupts. */
usart_disable_interrupt(p_usart, MASK_ALL_INTERRUPTS);
/* Create any required peripheral access mutexes and transaction complete
semaphores. This peripheral is full duplex so only the Tx semaphores
are created in the following function. The the Rx semaphores are
created separately. */
create_peripheral_control_semaphores(
freertos_driver_parameters->options_flags,
&(tx_dma_control[usart_index]),
NULL /* The rx structures are not created in this function. */);
/* Is the driver also going to receive? */
if (freertos_driver_parameters->receive_buffer != NULL) {
/* rx_event_semaphore is used to signal the arival of new data. It
must be a counting semaphore for the following reason: If the Rx
DMA places data at the end of its circular buffer it will give the
semaphore to indicate the presence of unread data. If it then
receives more data, it will write this to the start of the circular
buffer, then give the semaphore again. Now, if a task reads data
out of the same circular buffer, and requests less data than is
available, but more than is available between the next read pointer
and the end of the buffer, the actual amount returned will be
capped to that available up to the end of the buffer only. If this
semaphore was a binary semaphore, it would then be 'taken' even
though, unknown to the reading task, unread and therefore available
data remained at the beginning of the buffer. */
rx_buffer_definitions[usart_index].rx_event_semaphore =
xSemaphoreCreateCounting(portMAX_DELAY, 0);
configASSERT(rx_buffer_definitions[usart_index].rx_event_semaphore);
/* Set the timeout to 5ms, then start waiting for a character (the
timeout is not started until characters have started to be
received). */
usart_set_rx_timeout(p_usart,
(uart_parameters->baudrate / BITS_PER_5_MS));
usart_start_rx_timeout(p_usart);
/* The receive buffer is currently empty, so the DMA has control
over the entire buffer. */
rx_buffer_definitions[usart_index].rx_pdc_parameters.ul_addr =
(uint32_t)freertos_driver_parameters->receive_buffer;
rx_buffer_definitions[usart_index].rx_pdc_parameters.ul_size =
freertos_driver_parameters->receive_buffer_size;
pdc_rx_init(
all_usart_definitions[usart_index].pdc_base_address,
&(rx_buffer_definitions[usart_index].rx_pdc_parameters),
NULL);
/* Set the next byte to read to the start of the buffer as no data
has yet been read. */
rx_buffer_definitions[usart_index].next_byte_to_read =
freertos_driver_parameters->receive_buffer;
/* Remember the limits of entire buffer. */
rx_buffer_definitions[usart_index].rx_buffer_start_address =
rx_buffer_definitions[usart_index].rx_pdc_parameters.ul_addr;
rx_buffer_definitions[usart_index].past_rx_buffer_end_address =
rx_buffer_definitions[usart_index].rx_buffer_start_address +
freertos_driver_parameters->receive_buffer_size;
/* If the rx driver is to be thread aware, create an access control
mutex. */
if ((freertos_driver_parameters->options_flags &
USE_RX_ACCESS_MUTEX) != 0) {
rx_buffer_definitions[usart_index].rx_access_mutex =
xSemaphoreCreateMutex();
configASSERT(rx_buffer_definitions[usart_index].rx_access_mutex);
}
/* Catch the DMA running out of Rx space, and gaps in the
reception. These events are both used to signal that there is
data available in the Rx buffer. */
usart_enable_interrupt(p_usart, US_IER_ENDRX | US_IER_TIMEOUT);
/* The Rx DMA is running all the time, so enable it now. */
pdc_enable_transfer(
all_usart_definitions[usart_index].pdc_base_address,
PERIPH_PTCR_RXTEN);
} else {
/* next_byte_to_read is used to check to see if this function
has been called before, so it must be set to something, even if
it is not going to be used. The value it is set to is not
important, provided it is not zero (NULL). */
rx_buffer_definitions[usart_index].next_byte_to_read = RX_NOT_USED;
}
/* Configure and enable the USART interrupt in the interrupt controller. */
configure_interrupt_controller(all_usart_definitions[usart_index].peripheral_irq,
freertos_driver_parameters->interrupt_priority);
/* Error interrupts are always enabled. */
usart_enable_interrupt(
all_usart_definitions[usart_index].peripheral_base_address,
IER_ERROR_INTERRUPTS);
/* Finally, enable the receiver and transmitter. */
usart_enable_tx(p_usart);
usart_enable_rx(p_usart);
return_value = (freertos_usart_if) p_usart;
} else {
return_value = NULL;
}
return return_value;
}
/*! \brief Enable the USART for the specified USART in SPI mode.
*
* \param p_usart Base address of the USART instance.
*/
void usart_spi_enable(Usart *p_usart)
{
usart_enable_tx(p_usart);
usart_enable_rx(p_usart);
}
void uart_config(uint8_t port, usb_cdc_line_coding_t * cfg)
{
Usart* usart = get_usart(port);
uint32_t stopbits, parity, databits;
uint32_t imr;
switch (cfg->bCharFormat) {
case CDC_STOP_BITS_2:
stopbits = US_MR_NBSTOP_2_BIT;
break;
case CDC_STOP_BITS_1_5:
stopbits = US_MR_NBSTOP_1_5_BIT;
break;
case CDC_STOP_BITS_1:
default:
// Default stop bit = 1 stop bit
stopbits = US_MR_NBSTOP_1_BIT;
break;
}
switch (cfg->bParityType) {
case CDC_PAR_EVEN:
parity = US_MR_PAR_EVEN;
break;
case CDC_PAR_ODD:
parity = US_MR_PAR_ODD;
break;
case CDC_PAR_MARK:
parity = US_MR_PAR_MARK;
break;
case CDC_PAR_SPACE:
parity = US_MR_PAR_SPACE;
break;
default:
case CDC_PAR_NONE:
parity = US_MR_PAR_NO;
break;
}
switch(cfg->bDataBits) {
case 5: case 6: case 7:
databits = cfg->bDataBits - 5;
break;
default:
case 8:
databits = US_MR_CHRL_8_BIT;
break;
}
// Options for USART.
usart_options.baudrate = LE32_TO_CPU(cfg->dwDTERate);
usart_options.char_length = databits;
usart_options.parity_type = parity;
usart_options.stop_bits = stopbits;
usart_options.channel_mode = US_MR_CHMODE_NORMAL;
imr = usart_get_interrupt_mask(usart);
usart_disable_interrupt(usart, 0xFFFFFFFF);
usart_init_rs232(usart, &usart_options,
sysclk_get_peripheral_hz());
// Restore both RX and TX
usart_enable_tx(usart);
usart_enable_rx(usart);
usart_enable_interrupt(usart, imr);
}
