void
vchiq_dump_platform_use_state(VCHIQ_STATE_T *state)
{
vchiq_log_info((vchiq_arm_log_level>=VCHIQ_LOG_INFO),"Suspend timer not in use");
}
int __init
vchiq_platform_init(VCHIQ_STATE_T *state)
{
VCHIQ_SLOT_ZERO_T *vchiq_slot_zero;
int frag_mem_size;
int err;
int i;
/* Allocate space for the channels in coherent memory */
g_slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE);
frag_mem_size = PAGE_ALIGN(sizeof(FRAGMENTS_T) * MAX_FRAGMENTS);
err = bus_dma_tag_create(
NULL,
PAGE_SIZE, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
g_slot_mem_size + frag_mem_size, 1, /* maxsize, nsegments */
g_slot_mem_size + frag_mem_size, 0, /* maxsegsize, flags */
NULL, NULL, /* lockfunc, lockarg */
&dma_tag);
err = bus_dmamem_alloc(dma_tag, (void **)&g_slot_mem,
BUS_DMA_COHERENT | BUS_DMA_WAITOK, &dma_map);
if (err) {
vchiq_log_error(vchiq_core_log_level, "Unable to allocate channel memory");
err = -ENOMEM;
goto failed_alloc;
}
err = bus_dmamap_load(dma_tag, dma_map, g_slot_mem,
g_slot_mem_size + frag_mem_size, vchiq_dmamap_cb,
&g_slot_phys, 0);
if (err) {
vchiq_log_error(vchiq_core_log_level, "cannot load DMA map");
err = -ENOMEM;
goto failed_load;
}
WARN_ON(((int)g_slot_mem & (PAGE_SIZE - 1)) != 0);
vchiq_slot_zero = vchiq_init_slots(g_slot_mem, g_slot_mem_size);
if (!vchiq_slot_zero) {
err = -EINVAL;
goto failed_init_slots;
}
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] =
(int)g_slot_phys + g_slot_mem_size;
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] =
MAX_FRAGMENTS;
g_fragments_base = (FRAGMENTS_T *)(g_slot_mem + g_slot_mem_size);
g_slot_mem_size += frag_mem_size;
g_free_fragments = g_fragments_base;
for (i = 0; i < (MAX_FRAGMENTS - 1); i++) {
*(FRAGMENTS_T **)&g_fragments_base[i] =
&g_fragments_base[i + 1];
}
*(FRAGMENTS_T **)&g_fragments_base[i] = NULL;
_sema_init(&g_free_fragments_sema, MAX_FRAGMENTS);
if (vchiq_init_state(state, vchiq_slot_zero, 0/*slave*/) !=
VCHIQ_SUCCESS) {
err = -EINVAL;
goto failed_vchiq_init;
}
bcm_mbox_write(BCM2835_MBOX_CHAN_VCHIQ, (unsigned int)g_slot_phys);
vchiq_log_info(vchiq_arm_log_level,
"vchiq_init - done (slots %x, phys %x)",
(unsigned int)vchiq_slot_zero, g_slot_phys);
vchiq_call_connected_callbacks();
return 0;
failed_vchiq_init:
failed_init_slots:
failed_load:
bus_dmamap_unload(dma_tag, dma_map);
failed_alloc:
bus_dmamap_destroy(dma_tag, dma_map);
bus_dma_tag_destroy(dma_tag);
return err;
}
static int
create_pagelist(char __user *buf, size_t count, unsigned short type,
struct task_struct *task, PAGELIST_T ** ppagelist)
{
PAGELIST_T *pagelist;
struct page **pages;
struct page *page;
unsigned long *addrs;
unsigned int num_pages, offset, i;
char *addr, *base_addr, *next_addr;
int run, addridx, actual_pages;
unsigned long *need_release;
offset = (unsigned int)buf & (PAGE_SIZE - 1);
num_pages = (count + offset + PAGE_SIZE - 1) / PAGE_SIZE;
*ppagelist = NULL;
/* Allocate enough storage to hold the page pointers and the page
** list
*/
pagelist = kmalloc(sizeof(PAGELIST_T) +
(num_pages * sizeof(unsigned long)) +
sizeof(unsigned long) +
(num_pages * sizeof(pages[0])),
GFP_KERNEL);
vchiq_log_trace(vchiq_arm_log_level,
"create_pagelist - %x", (unsigned int)pagelist);
if (!pagelist)
return -ENOMEM;
addrs = pagelist->addrs;
need_release = (unsigned long *)(addrs + num_pages);
pages = (struct page **)(addrs + num_pages + 1);
if (is_vmalloc_addr(buf)) {
for (actual_pages = 0; actual_pages < num_pages; actual_pages++) {
pages[actual_pages] = vmalloc_to_page(buf + (actual_pages * PAGE_SIZE));
}
*need_release = 0; /* do not try and release vmalloc pages */
} else {
down_read(&task->mm->mmap_sem);
actual_pages = get_user_pages(task, task->mm,
(unsigned long)buf & ~(PAGE_SIZE - 1),
num_pages,
(type == PAGELIST_READ) /*Write */ ,
0 /*Force */ ,
pages,
NULL /*vmas */);
up_read(&task->mm->mmap_sem);
if (actual_pages != num_pages) {
vchiq_log_info(vchiq_arm_log_level,
"create_pagelist - only %d/%d pages locked",
actual_pages,
num_pages);
/* This is probably due to the process being killed */
while (actual_pages > 0)
{
actual_pages--;
page_cache_release(pages[actual_pages]);
}
kfree(pagelist);
if (actual_pages == 0)
actual_pages = -ENOMEM;
return actual_pages;
}
*need_release = 1; /* release user pages */
}
pagelist->length = count;
pagelist->type = type;
pagelist->offset = offset;
/* Group the pages into runs of contiguous pages */
base_addr = VCHIQ_ARM_ADDRESS(page_address(pages[0]));
next_addr = base_addr + PAGE_SIZE;
addridx = 0;
run = 0;
for (i = 1; i < num_pages; i++) {
addr = VCHIQ_ARM_ADDRESS(page_address(pages[i]));
if ((addr == next_addr) && (run < (PAGE_SIZE - 1))) {
next_addr += PAGE_SIZE;
run++;
} else {
addrs[addridx] = (unsigned long)base_addr + run;
addridx++;
base_addr = addr;
next_addr = addr + PAGE_SIZE;
run = 0;
}
}
addrs[addridx] = (unsigned long)base_addr + run;
addridx++;
/* Partial cache lines (fragments) require special measures */
if ((type == PAGELIST_READ) &&
((pagelist->offset & (CACHE_LINE_SIZE - 1)) ||
((pagelist->offset + pagelist->length) &
(CACHE_LINE_SIZE - 1)))) {
FRAGMENTS_T *fragments;
if (down_interruptible(&g_free_fragments_sema) != 0) {
kfree(pagelist);
return -EINTR;
}
WARN_ON(g_free_fragments == NULL);
down(&g_free_fragments_mutex);
fragments = (FRAGMENTS_T *) g_free_fragments;
WARN_ON(fragments == NULL);
g_free_fragments = *(FRAGMENTS_T **) g_free_fragments;
up(&g_free_fragments_mutex);
pagelist->type =
PAGELIST_READ_WITH_FRAGMENTS + (fragments -
g_fragments_base);
}
for (page = virt_to_page(pagelist);
page <= virt_to_page(addrs + num_pages - 1); page++) {
flush_dcache_page(page);
}
*ppagelist = pagelist;
return 0;
}
int __init
vchiq_platform_init(VCHIQ_STATE_T *state)
{
VCHIQ_SLOT_ZERO_T *vchiq_slot_zero;
int frag_mem_size;
int err;
int i;
/* Allocate space for the channels in coherent memory */
g_slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE);
frag_mem_size = PAGE_ALIGN(sizeof(FRAGMENTS_T) * MAX_FRAGMENTS);
g_slot_mem = dma_alloc_coherent(NULL, g_slot_mem_size + frag_mem_size,
&g_slot_phys, GFP_ATOMIC);
if (!g_slot_mem) {
vchiq_log_error(vchiq_arm_log_level,
"Unable to allocate channel memory");
err = -ENOMEM;
goto failed_alloc;
}
WARN_ON(((int)g_slot_mem & (PAGE_SIZE - 1)) != 0);
vchiq_slot_zero = vchiq_init_slots(g_slot_mem, g_slot_mem_size);
if (!vchiq_slot_zero) {
err = -EINVAL;
goto failed_init_slots;
}
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] =
(int)g_slot_phys + g_slot_mem_size;
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] =
MAX_FRAGMENTS;
g_fragments_base = (FRAGMENTS_T *)(g_slot_mem + g_slot_mem_size);
g_slot_mem_size += frag_mem_size;
g_free_fragments = g_fragments_base;
for (i = 0; i < (MAX_FRAGMENTS - 1); i++) {
*(FRAGMENTS_T **)&g_fragments_base[i] =
&g_fragments_base[i + 1];
}
*(FRAGMENTS_T **)&g_fragments_base[i] = NULL;
sema_init(&g_free_fragments_sema, MAX_FRAGMENTS);
if (vchiq_init_state(state, vchiq_slot_zero, 0/*slave*/) !=
VCHIQ_SUCCESS) {
err = -EINVAL;
goto failed_vchiq_init;
}
err = request_irq(VCHIQ_DOORBELL_IRQ, vchiq_doorbell_irq,
IRQF_IRQPOLL, "VCHIQ doorbell",
state);
if (err < 0) {
vchiq_log_error(vchiq_arm_log_level, "%s: failed to register "
"irq=%d err=%d", __func__,
VCHIQ_DOORBELL_IRQ, err);
goto failed_request_irq;
}
/* Send the base address of the slots to VideoCore */
dsb(); /* Ensure all writes have completed */
bcm_mailbox_write(MBOX_CHAN_VCHIQ, (unsigned int)g_slot_phys);
vchiq_log_info(vchiq_arm_log_level,
"vchiq_init - done (slots %x, phys %x)",
(unsigned int)vchiq_slot_zero, g_slot_phys);
vchiq_call_connected_callbacks();
return 0;
failed_request_irq:
failed_vchiq_init:
failed_init_slots:
dma_free_coherent(NULL, g_slot_mem_size, g_slot_mem, g_slot_phys);
failed_alloc:
return err;
}
int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state)
{
struct device *dev = &pdev->dev;
VCHIQ_SLOT_ZERO_T *vchiq_slot_zero;
struct resource *res;
void *slot_mem;
dma_addr_t slot_phys;
int slot_mem_size, frag_mem_size;
int err, irq, i;
g_virt_to_bus_offset = virt_to_dma(dev, (void *)0);
/* Allocate space for the channels in coherent memory */
slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE);
frag_mem_size = PAGE_ALIGN(sizeof(FRAGMENTS_T) * MAX_FRAGMENTS);
slot_mem = dmam_alloc_coherent(dev, slot_mem_size + frag_mem_size,
&slot_phys, GFP_KERNEL);
if (!slot_mem) {
dev_err(dev, "could not allocate DMA memory\n");
return -ENOMEM;
}
WARN_ON(((int)slot_mem & (PAGE_SIZE - 1)) != 0);
vchiq_slot_zero = vchiq_init_slots(slot_mem, slot_mem_size);
if (!vchiq_slot_zero)
return -EINVAL;
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] =
(int)slot_phys + slot_mem_size;
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] =
MAX_FRAGMENTS;
g_fragments_base = (FRAGMENTS_T *)(slot_mem + slot_mem_size);
slot_mem_size += frag_mem_size;
g_free_fragments = g_fragments_base;
for (i = 0; i < (MAX_FRAGMENTS - 1); i++) {
*(FRAGMENTS_T **)&g_fragments_base[i] =
&g_fragments_base[i + 1];
}
*(FRAGMENTS_T **)&g_fragments_base[i] = NULL;
sema_init(&g_free_fragments_sema, MAX_FRAGMENTS);
if (vchiq_init_state(state, vchiq_slot_zero, 0) != VCHIQ_SUCCESS)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
g_regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(g_regs))
return PTR_ERR(g_regs);
irq = platform_get_irq(pdev, 0);
if (irq <= 0) {
dev_err(dev, "failed to get IRQ\n");
return irq;
}
err = devm_request_irq(dev, irq, vchiq_doorbell_irq, IRQF_IRQPOLL,
"VCHIQ doorbell", state);
if (err) {
dev_err(dev, "failed to register irq=%d\n", irq);
return err;
}
/* Send the base address of the slots to VideoCore */
dsb(); /* Ensure all writes have completed */
err = bcm_mailbox_write(MBOX_CHAN_VCHIQ, (unsigned int)slot_phys);
if (err) {
dev_err(dev, "mailbox write failed\n");
return err;
}
vchiq_log_info(vchiq_arm_log_level,
"vchiq_init - done (slots %x, phys %pad)",
(unsigned int)vchiq_slot_zero, &slot_phys);
vchiq_call_connected_callbacks();
return 0;
}
