ULONG getVMWareSVGAID(struct HWData *data)
{
ULONG id;
vmwareWriteReg(data, SVGA_REG_ID, SVGA_ID_2);
id = vmwareReadReg(data, SVGA_REG_ID);
if (id == SVGA_ID_2)
return id;
vmwareWriteReg(data, SVGA_REG_ID, SVGA_ID_1);
id = vmwareReadReg(data, SVGA_REG_ID);
if (id == SVGA_ID_1)
return id;
if (id == SVGA_ID_0)
return id;
return SVGA_ID_INVALID;
}
/*
*-----------------------------------------------------------------------------
*
* VMXGetVMwareSvgaId --
*
* Retrieve the SVGA_ID of the VMware SVGA adapter.
* This function should hide any backward compatibility mess.
*
* Results:
* The SVGA_ID_* of the present VMware adapter.
*
* Side effects:
* ins/outs
*
*-----------------------------------------------------------------------------
*/
uint32
VMXGetVMwareSvgaId(uint16 indexReg, uint16 valueReg)
{
uint32 vmware_svga_id;
/* Any version with any SVGA_ID_* support will initialize SVGA_REG_ID
* to SVGA_ID_0 to support versions of this driver with SVGA_ID_0.
*
* Versions of SVGA_ID_0 ignore writes to the SVGA_REG_ID register.
*
* Versions of SVGA_ID_1 will allow us to overwrite the content
* of the SVGA_REG_ID register only with the values SVGA_ID_0 or SVGA_ID_1.
*
* Versions of SVGA_ID_2 will allow us to overwrite the content
* of the SVGA_REG_ID register only with the values SVGA_ID_0 or SVGA_ID_1
* or SVGA_ID_2.
*/
vmwareWriteReg (indexReg, valueReg, SVGA_REG_ID, SVGA_ID_2);
vmware_svga_id = vmwareReadReg (indexReg, valueReg, SVGA_REG_ID);
IOLog ("VMwareFB: read ID: (0x%08x)\n", vmware_svga_id);
if (vmware_svga_id == SVGA_ID_2) {
return SVGA_ID_2;
}
vmwareWriteReg (indexReg, valueReg, SVGA_REG_ID, SVGA_ID_1);
vmware_svga_id = vmwareReadReg (indexReg, valueReg, SVGA_REG_ID);
IOLog ("VMwareFB: read ID: (0x%08x)\n", vmware_svga_id);
if (vmware_svga_id == SVGA_ID_1) {
return SVGA_ID_1;
}
if (vmware_svga_id == SVGA_ID_0) {
return SVGA_ID_0;
}
/* No supported VMware SVGA devices found */
return SVGA_ID_INVALID;
}
/* Returns the highest SVGA Id supported by the video card */
uint32 VMware::vmwareGetSvgaId(void)
{
uint32 svgaId;
vmwareWriteReg(SVGA_REG_ID, SVGA_ID_2);
svgaId = vmwareReadReg(SVGA_REG_ID);
if(svgaId == (uint32)SVGA_ID_2)
return SVGA_ID_2;
vmwareWriteReg(SVGA_REG_ID, SVGA_ID_1);
svgaId = vmwareReadReg(SVGA_REG_ID);
if(svgaId == (uint32)SVGA_ID_1)
return SVGA_ID_1;
vmwareWriteReg(SVGA_REG_ID, SVGA_ID_0);
svgaId = vmwareReadReg(SVGA_REG_ID);
if(svgaId == (uint32)SVGA_ID_0)
return SVGA_ID_0;
/* No supported VMware SVGA devices found */
return SVGA_ID_INVALID;
}
VOID initVMWareSVGAFIFO(struct HWData *data)
{
ULONG *fifo;
ULONG fifomin;
vmwareWriteReg(data, SVGA_REG_CONFIG_DONE, 0); //Stop vmware from reading the fifo
fifo = data->mmiobase = vmwareReadReg(data, SVGA_REG_MEM_START);
data->mmiosize = vmwareReadReg(data, SVGA_REG_MEM_SIZE) & ~3;
if (data->capabilities & SVGA_CAP_EXTENDED_FIFO)
fifomin = vmwareReadReg(data, SVGA_REG_MEM_REGS);
else
fifomin =4;
fifo[SVGA_FIFO_MIN] = fifomin * sizeof(ULONG);
/* reduce size of FIFO queue to prevent VMWare from failing */
fifo[SVGA_FIFO_MAX] = (data->mmiosize > 65536) ? 65536 : data->mmiosize;
fifo[SVGA_FIFO_NEXT_CMD] = fifomin * sizeof(ULONG);
fifo[SVGA_FIFO_STOP] = fifomin * sizeof(ULONG);
vmwareWriteReg(data, SVGA_REG_CONFIG_DONE, 1);
}
void
vmwareWriteWordToFIFO (CARD32* vmwareFIFO, uint16 indexReg, uint16 valueReg, CARD32 value)
{
/* Need to sync? */
if ((vmwareFIFO[SVGA_FIFO_NEXT_CMD] + sizeof (CARD32) == vmwareFIFO[SVGA_FIFO_STOP])
|| (vmwareFIFO[SVGA_FIFO_NEXT_CMD] == vmwareFIFO[SVGA_FIFO_MAX] - sizeof(CARD32) &&
vmwareFIFO[SVGA_FIFO_STOP] == vmwareFIFO[SVGA_FIFO_MIN])) {
vmwareWriteReg(indexReg, valueReg, SVGA_REG_SYNC, 1);
while (vmwareReadReg(indexReg, valueReg, SVGA_REG_BUSY))
; // nothing
}
vmwareFIFO[vmwareFIFO[SVGA_FIFO_NEXT_CMD] / sizeof (CARD32)] = value;
vmwareFIFO[SVGA_FIFO_NEXT_CMD] += sizeof (CARD32);
if (vmwareFIFO[SVGA_FIFO_NEXT_CMD] == vmwareFIFO[SVGA_FIFO_MAX]) {
vmwareFIFO[SVGA_FIFO_NEXT_CMD] = vmwareFIFO[SVGA_FIFO_MIN];
}
}
VOID setModeVMWareSVGA(struct HWData *data, ULONG width, ULONG height)
{
D(bug("[VMWareSVGA] SetMode: %dx%d\n",width,height));
vmwareWriteReg(data, SVGA_REG_ENABLE, 0);
vmwareWriteReg(data, SVGA_REG_WIDTH, width);
vmwareWriteReg(data, SVGA_REG_HEIGHT, height);
if (data->capabilities & SVGA_CAP_8BIT_EMULATION)
vmwareWriteReg(data, SVGA_REG_BITS_PER_PIXEL,data->bitsperpixel);
vmwareWriteReg(data, SVGA_REG_ENABLE, 1);
data->fboffset = vmwareReadReg(data, SVGA_REG_FB_OFFSET);
data->bytesperline = vmwareReadReg(data, SVGA_REG_BYTES_PER_LINE);
data->depth = vmwareReadReg(data, SVGA_REG_DEPTH);
data->redmask = vmwareReadReg(data, SVGA_REG_RED_MASK);
data->greenmask = vmwareReadReg(data, SVGA_REG_GREEN_MASK);
data->bluemask = vmwareReadReg(data, SVGA_REG_BLUE_MASK);
data->pseudocolor = vmwareReadReg(data, SVGA_REG_PSEUDOCOLOR);
}
VOID syncVMWareSVGAFIFO(struct HWData *data)
{
vmwareWriteReg(data, SVGA_REG_SYNC, 1);
while (vmwareReadReg(data, SVGA_REG_BUSY) != 0);
#warning "maybe wait (delay) some time"
}
BOOL initVMWareSVGAHW(struct HWData *data, OOP_Object *device)
{
ULONG *ba;
ULONG id;
id = getVMWareSVGAID(data);
if ((id == SVGA_ID_0) || (id == SVGA_ID_INVALID))
{
return FALSE;
}
initVMWareSVGAFIFO(data);
data->capabilities = vmwareReadReg(data, SVGA_REG_CAPABILITIES);
if (data->capabilities & SVGA_CAP_8BIT_EMULATION)
{
data->bitsperpixel = vmwareReadReg(data, SVGA_REG_HOST_BITS_PER_PIXEL);
vmwareWriteReg(data,SVGA_REG_BITS_PER_PIXEL, data->bitsperpixel);
}
data->bitsperpixel = vmwareReadReg(data, SVGA_REG_BITS_PER_PIXEL);
data->depth = vmwareReadReg(data, SVGA_REG_DEPTH);
data->maxwidth = vmwareReadReg(data, SVGA_REG_MAX_WIDTH);
data->maxheight = vmwareReadReg(data, SVGA_REG_MAX_HEIGHT);
data->redmask = vmwareReadReg(data, SVGA_REG_RED_MASK);
data->greenmask = vmwareReadReg(data, SVGA_REG_GREEN_MASK);
data->bluemask = vmwareReadReg(data, SVGA_REG_BLUE_MASK);
data->bytesperpixel = 1;
if (data->depth>16)
data->bytesperpixel = 4;
else if (data->depth>8)
data->bytesperpixel = 2;
if (data->capabilities & SVGA_CAP_MULTIMON)
{
data->displaycount = vmwareReadReg(data, SVGA_REG_NUM_DISPLAYS);
}
else
{
data->displaycount = 1;
}
data->vramsize = vmwareReadReg(data, SVGA_REG_VRAM_SIZE);
data->vrambase = vmwareReadReg(data, SVGA_REG_FB_START);
data->pseudocolor = vmwareReadReg(data, SVGA_REG_PSEUDOCOLOR);
D(bug("[VMWareSVGA] Init: VRAM at 0x%08x size %d\n",data->vrambase, data->vramsize));
D(bug("[VMWareSVGA] Init: no.displays: %d\n",data->displaycount));
D(bug("[VMWareSVGA] Init: caps : 0x%08x\n",data->capabilities));
D(bug("[VMWareSVGA] Init: no.displays: %d\n",data->displaycount));
D(bug("[VMWareSVGA] Init: depth: %d\n",data->depth));
D(bug("[VMWareSVGA] Init: bpp : %d\n",data->bitsperpixel));
D(bug("[VMWareSVGA] Init: maxw: %d\n",data->maxwidth));
D(bug("[VMWareSVGA] Init: maxh: %d\n",data->maxheight));
return TRUE;
}
