void check_boot_parameters()
{
UINT64* regs = *g_guest_regs_save_area;
UINT64 rdi_reg= regs[4];
UINT64 rsi_reg= regs[5];
UINT64 ept;
UINT64 real;
UINT64 virt;
UINT64 value;
bprint("rdi on entry: %llx, rsi: %llx\n", rdi_reg, rsi_reg);
boot_params_t* boot_params= (boot_params_t*) rdi_reg;
//HexDump((UINT8*)rdi_reg, (UINT8*)rdi_reg+32);
//bprint("cmd line ptr: %p\n", boot_params->hdr.cmd_line_ptr);
//bprint("code32_start: %p\n", boot_params->hdr.code32_start);
bprint("loadflags: %02x\n", boot_params->hdr.loadflags);
vmx_vmread(0x201a, &ept);
virt= rdi_reg;
real= getphysical(ept, virt);
bprint("virt: %016llx, real: %016llx\n", virt, real);
virt= (UINT64) &(boot_params->hdr.loadflags);
real= getphysical(ept, virt);
bprint("virt: %016llx, real: %016llx\n", virt, real);
vmx_vmread(0x681e, &value); // guest_rip
virt =value;
real= getphysical(ept, virt);
bprint("virt: %016llx, real: %016llx\n", virt, real);
virt =value+10;
real= getphysical(ept, virt);
bprint("virt: %016llx, real: %016llx\n", virt, real);
}
/*
** VMX insn operates on 64 bits in long mode
** so we ensure allocation
*/
void __regparm__(2) __vmcs_force_read(raw64_t *val, vmcs_field_enc_t enc)
{
raw64_t tmp;
if(!enc.fake)
{
vmx_insn_err_t vmx_err;
if(!vmx_vmread(&vmx_err, &tmp.raw, enc.raw))
panic("vmread(0x%x) err %d\n", enc.raw, vmx_err.raw);
switch(enc.fwidth)
{
case VMCS_FIELD_ENC_FIELD_WIDTH_16: val->raw = tmp.wlow; break;
case VMCS_FIELD_ENC_FIELD_WIDTH_32: val->raw = tmp.low; break;
default: val->raw = tmp.raw; break;
}
return;
}
if(val == (raw64_t*)&vm_state.cr2)
vm_state.cr2.raw = get_cr2();
else if(val == (raw64_t*)&vm_state.dr6)
vm_state.dr6.raw = get_dr6();
}
/*
** VMX insn operates on 64 bits in long mode
** so we ensure allocation
*/
void __regparm__(2) __vmcs_force_read(raw64_t *val, vmcs_field_enc_t enc)
{
raw64_t tmp;
if(!enc.fake)
{
vmx_insn_err_t vmx_err;
if(!vmx_vmread(&vmx_err, &tmp.raw, enc.raw))
panic("vmread(0x%x) err %d\n", enc.raw, vmx_err.raw);
switch(enc.fwidth)
{
case VMCS_FIELD_ENC_FIELD_WIDTH_16: val->wlow = tmp.wlow; break;
case VMCS_FIELD_ENC_FIELD_WIDTH_32: val->low = tmp.low; break;
default: val->raw = tmp.raw; break;
}
/*
** don't use debug, since some fields might have not been read
*/
#ifdef CONFIG_VMX_ACC_DBG
printf("vmread(0x%x) = 0x%X\n", enc.raw, tmp.raw);
#endif
return;
}
if(val == (raw64_t*)&vm_state.cr2)
vm_state.cr2.raw = get_cr2();
else if(val == (raw64_t*)&vm_state.dr6)
vm_state.dr6.raw = get_dr6();
}
void fixupvmcs()
{
UINT64 value;
void loop_forever();
#ifdef JLMDEBUG
UINT16* loop= (UINT16*)loop_forever;
bprint("fixupvmcs %04x\n\n", *loop);
#endif
vmx_vmread(0x681e, &value); // guest_rip
#ifdef JLMDEBUG
check_boot_parameters();
#endif
//bprint("Code at %p\n", value);
//HexDump((UINT8*)value, (UINT8*)value+32);
//*(UINT16*) (value+0x8)= *loop; // feeb
//*(UINT16*) (value+0xa)= *loop; // feeb
//*(UINT16*) (value+0x10)= *loop; // feeb
//*(UINT16*) (value+0x16)= *loop; // feeb
// vmx_vmread(0x4000, &value); // vmx_pin_controls
// vmx_vmwrite(0x4000, value); // vmx_pin_controls
// vmx_vmread(0x4002, &value); // vmx_cpu_controls
// vmx_vmwrite(0x4002, value); // vmx_cpu_controls
// vmx_vmread(0x401e, &value); // vmx_secondary_controls
// vmx_vmwrite(0x401e, value); // vmx_secondary_controls
// vmx_vmread(0x4012, &value); // vmx_entry_controls
// vmx_vmwrite(0x4012, value); // vmx_entry_controls
// vmx_vmread(0x4002, &value); // vmx_exit_controls
// vmx_vmwrite(0x4002, value); // vmx_exit_controls
vmm_vmcs_guest_state_read((UINT64*) t_vmcs_save_area);
vmm_print_vmcs_region((UINT64*) t_vmcs_save_area);
}
