/**
* @brief Initializes the serial communications peripheral and GPIO ports
* to communicate with the PAN BT .. assuming 16 Mhz CPU
*
* @param none
*
* @return none
*/
void hal_uart_dma_init(void)
{
BT_PORT_SEL |= BT_PIN_RXD + BT_PIN_TXD;
BT_PORT_DIR |= BT_PIN_TXD;
BT_PORT_DIR &= ~BT_PIN_RXD;
// set BT RTS
RTS_SEL &= ~RTS_PIN; // = 0 - I/O
RTS_DIR |= RTS_PIN; // = 1 - Output
RTS_OUT |= RTS_PIN; // = 1 - RTS high -> stop
// set BT CTS
CTS_SEL &= ~CTS_PIN; // = 0 - I/O
CTS_DIR &= ~CTS_PIN; // = 0 - Input
// set BT SHUTDOWN to 1 (active low)
N_SHUTDOWN_SEL &= ~N_SHUTDOWN_PIN; // = 0 - I/O
N_SHUTDOWN_DIR |= N_SHUTDOWN_PIN; // = 1 - Output
N_SHUTDOWN_OUT |= N_SHUTDOWN_PIN; // = 1 - Active low -> ok
// wait for Bluetooth to power up properly after providing 32khz clock
waitAboutOneSecond();
UCA0CTL1 |= UCSWRST; //Reset State
UCA0CTL0 = UCMODE_0;
UCA0CTL0 &= ~UC7BIT; // 8bit char
UCA0CTL1 |= UCSSEL_2;
UCA0CTL1 &= ~UCSWRST; // continue
hal_uart_dma_set_baud(115200);
}
/**
* @brief Initializes the serial communications peripheral and GPIO ports
* to communicate with the PAN BT .. assuming 16 Mhz CPU
*
* @param none
*
* @return none
*/
void hal_uart_dma_init(void)
{
BT_PORT_SEL |= BT_PIN_RXD + BT_PIN_TXD;
BT_PORT_DIR |= BT_PIN_TXD;
BT_PORT_DIR &= ~BT_PIN_RXD;
// set BT RTS (P1.3)
P1SEL &= ~BIT3; // = 0 - I/O
P1DIR |= BIT3; // = 1 - Output
P1OUT |= BIT3; // = 1 - RTS high -> stop
// set BT CTS (P1.4)
P1SEL &= ~BIT4; // = 0 - I/O
P1DIR &= ~BIT4; // = 0 - Input P1DIR |= BIT4; // RTS
// set BT SHUTDOWN (P2.7) to 1 (active low)
P2SEL &= ~BIT7; // = 0 - I/O
P2DIR |= BIT7; // = 1 - Output
P2OUT |= BIT7; // = 1 - Active low -> ok
// Enable ACLK to provide 32 kHz clock to Bluetooth module
P2SEL |= BIT6;
P2DIR |= BIT6;
// wait for Bluetooth to power up properly after providing 32khz clock
waitAboutOneSecond();
UCA2CTL1 |= UCSWRST; //Reset State
UCA2CTL0 = UCMODE_0;
UCA2CTL0 &= ~UC7BIT; // 8bit char
UCA2CTL1 |= UCSSEL_2;
UCA2CTL1 &= ~UCSWRST; // continue
hal_uart_dma_set_baud(115200);
}
