int AccReceiveRBdata( pRBUFFER pRbuf, UINT8 *data1, UINT8 *data2 )
{
// UINT32 Event_Addr;
int statusflag;
ACC_DEBUG("[Acc] Lock RB Receive (semID=0x%08X)\n",pRbuf->pSema_ID);
waitSem(pRbuf->pSema_ID,WAIT_FOREVER);
ACC_DEBUG("%s:%d]",__FUNCTION__,__LINE__);
/* if buffer is empty wait message that indicates the buffer is filled with data */
if( AccEmptyRB( pRbuf ) )
{
/* clear event ... by KDEAN 981125 */
recvEvent(CC_EV_EMPTY,0,NO_WAIT,0); // Clear False Event when Empty.
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock RB Receive(RB Empty)\n");
/* wait New Data received Event. */
statusflag = recvEvent(CC_EV_EMPTY,0,WAIT_FOREVER,0);
if(statusflag <0)
{
ACC_DEBUG("[Acc] Receive RB data Time Out\n");
return( DCC_RB_TIMEOUT );
}
waitSem(pRbuf->pSema_ID,WAIT_FOREVER);
ACC_DEBUG("[Acc] Lock RB Receive\n");
}
/* read data from buffer and increase read index and decrease count */
/*uart_printf(" DCC_RB_Receive_Buf : before pRbuf->read_index => %x\n", pRbuf->read_index );*/
*data1 = pRbuf->buffer[pRbuf->read_index];
*data2 = pRbuf->buffer[pRbuf->read_index+1];
( pRbuf->read_index )+=2;
pRbuf->read_index %= pRbuf->size;
( pRbuf->count )-=2;
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock RB Receive\n");
ACC_DEBUG("[Acc] Ring Buffer Receive\n");
return( DCC_RB_SUCCESS );
}
void AccInitialRB( pRBUFFER pRbuf )
{
waitSem(pRbuf->pSema_ID,WAIT_FOREVER);
ACC_DEBUG("[Acc] Lock Ring Buffer Initialize \n");
pRbuf->read_index = 0;
pRbuf->write_index = 0;
pRbuf->count = 0;
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock Ring Buffer Initialize \n");
ACC_DEBUG("[Acc] Ring Buffer Initialize \n");
}
void *counter(void *threadid) {
long i, max = MAX_COUNT/NUM_THREADS;
for (i=0; i < max; i++){
if(!sem){ //Obtiene semáforo
obtenerSem(&sem);
}
waitSem(sem);
count++;
signalSem(sem);
usleep(1);
}
pthread_exit(NULL);
}
void comm_sendData(COMM_DATA_T *sendData)
{
int i;
int err = 0;
char *errMsg = NULL;
if(comm_getCortezDubugMode() == TRUE)
return;
waitSem(semCommUartTx ,WAIT_FOREVER);
if(gShowD2AToMasterMsg > 0)
comm_printCommData(1, sendData);
if(put_comm_data(sendData->protocolID)<0)
{
errMsg = "ID";
goto _ERR_End;
}
if(put_comm_data(sendData->length)<0)
{
errMsg = "Length";
goto _ERR_End;
}
for(i = 0 ; i < sendData->length ; i++)
{
if(put_comm_data(sendData->data[i])<0)
{
errMsg = "Data";
goto _ERR_End;
}
}
_ERR_End:
if(err && (errMsg!=NULL))
{
dbgprint("data send error-%s", errMsg);
}
postSem(semCommUartTx);
}
int AccSendRBdata( pRBUFFER pRbuf, UINT8 data1, UINT8 data2)
{
waitSem(pRbuf->pSema_ID,WAIT_FOREVER);
ACC_DEBUG("[Acc] Lock RB Send\n");
if( AccFullRB( pRbuf ) )
{
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock RB Send(RB Full)\n");
return(DCC_RB_OVERFLOW);
}
else
{
pRbuf->buffer[pRbuf->write_index] = data1;
pRbuf->buffer[pRbuf->write_index+1] = data2;
(pRbuf->write_index)+=2;
pRbuf->write_index %= pRbuf->size;
(pRbuf->count )+=2;
/* if buffer is full send DelayCancel command to "gDccParserTask" task to get data from buffer */
if( AccFullRB( pRbuf ) )
{
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock RB Send\n");
return( DCC_RB_FULL );
}
}
postSem(pRbuf->pSema_ID);
ACC_DEBUG("[Acc] UnLock RB Send\n");
ACC_DEBUG("[Acc] Ring Buffer Send\n");
return( DCC_RB_SUCCESS );
}
void RenderThread::sync (void)
{
de::Semaphore waitSem(0);
enqueue(Message(MESSAGE_SYNC, &waitSem));
waitSem.decrement();
}
/*
* Hace el wait del semaforo encargado de la exclusion mutua
*/
void waitSemaforo() {
waitSem(semaforo);
}
void mi_waitSem() {
waitSem(semaforo);
}
int
mxc_v4l_tvin_test(void)
{
struct v4l2_buffer capture_buf;
v4l2_std_id id;
int i, j;
enum v4l2_buf_type type;
if (start_capturing() < 0)
{
printf("start_capturing failed\n");
return TFAIL;
}
for (i = 0; ; i++) {
begin:
if (ioctl(fd_capture_v4l, VIDIOC_G_STD, &id)) {
printf("VIDIOC_G_STD failed.\n");
return TFAIL;
}
if (id == g_current_std)
goto next;
else if (id == V4L2_STD_PAL || id == V4L2_STD_NTSC) {
type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
ioctl(fd_capture_v4l, VIDIOC_STREAMOFF, &type);
for (j = 0; j < g_capture_num_buffers; j++)
{
munmap(capture_buffers[j].start, capture_buffers[j].length);
}
if (v4l_capture_setup() < 0) {
printf("Setup v4l capture failed.\n");
return TFAIL;
}
if (start_capturing() < 0)
{
printf("start_capturing failed\n");
return TFAIL;
}
i = 0;
printf("TV standard changed\n");
} else {
sleep(1);
/* Try again */
if (ioctl(fd_capture_v4l, VIDIOC_G_STD, &id)) {
printf("VIDIOC_G_STD failed.\n");
return TFAIL;
}
if (id != V4L2_STD_ALL)
goto begin;
printf("Cannot detect TV standard\n");
return 0;
}
next:
waitSem(semSetId,0);//获取一个空间用于存放产品
waitSem(semSetId,2);//占有产品缓冲区
memset(&capture_buf, 0, sizeof(capture_buf));
capture_buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
capture_buf.memory = V4L2_MEMORY_MMAP;
if (ioctl(fd_capture_v4l, VIDIOC_DQBUF, &capture_buf) < 0) {
printf("VIDIOC_DQBUF failed.\n");
return TFAIL;
}
//printf("copy yuyv\n");
memcpy(shared,capture_buffers[capture_buf.index].start,g_in_width*g_in_height*2);
//printf("after copy yuyv\n");
sigSem(semSetId,2);//释放产品缓冲区
sigSem(semSetId,1);//告知消费者有产品了
if (ioctl(fd_capture_v4l, VIDIOC_QBUF, &capture_buf) < 0) {
printf("VIDIOC_QBUF failed\n");
return TFAIL;
}
}
return 0;
}
static SINT32 _NVRAM_RdWr(UINT32 cmd, UINT16 start, UINT16 length, UINT08 *pBuffer)
{
UINT32 i, j;
SINT08 rc = I2C_OK;
UINT16 tLength, tStartOfs, cacheOfs;
UINT08 *cacheBuf;
UINT32 tStartIndex, tLastIndex;
UINT08 *pBuf = pBuffer;
UINT16 tLast = start + length - 1;
#if (NVM_DEBUG > 0)
char *tStr = (cmd ? "RD" : "WR");
NVMDRV_PRINT("%snvm(0x%04x,%4d)", tStr, start, length);
#endif /* (NVM_DEBUG > 0) */
typedef struct {
UINT08 i2cid;
UINT08 addr;
UINT08 pgsz;
UINT08 _rsvd;
} NVM_CFG_T;
NVM_CFG_T nvm_cfg[] = {
//I2C slave Page, _rsvd
// ID, addr, Size,
#if (MODEL_ID == 0)
{ 1, 0xaa, 64, 0 }, /* 32k EEP on I2c Line#1 in Evaluation Board */
#elif (MODEL_ID == 4)
{ 0, 0xa2, 64, 0 }, /* 32k EEP on I2c Line#0 in D2A Chip Board */ // 0xaa->0xa2
{ 0, 0xa2, 128, 0 }, /* 64k EEP on I2c Line#0 in D2A Chip Board */
{ 0, 0xa0, 128, 0 }, /* 64k EEP on I2c Line#0 in D2A FPGA Board */
#else
{ 0, 0xaa, 64, 0 }, /* 32k EEP on I2c Line#0 in D2A Chip Board */
{ 0, 0xa2, 128, 0 }, /* 64k EEP on I2c Line#0 in D2A Chip Board */
{ 0, 0xa0, 128, 0 }, /* 64k EEP on I2c Line#0 in D2A FPGA Board */
#endif
{0xff, 0x00, 0, 0 } /* DO NOT DELETE : END Marker */
};
NVM_CFG_T *pNvmCfg;
if (nvmI2cLine == NULL)
{
cacheOfs = 0;
tLength = 0;
pNvmCfg = &nvm_cfg[0];
// while END Marker
while ( pNvmCfg->i2cid != 0xff )
{
I2CMS_ID testI2c;
UINT08 testAddr;
if ( pNvmCfg->i2cid == 0 ) testI2c = i2cmsId0;
else if ( pNvmCfg->i2cid == 1 ) testI2c = i2cmsId1;
else testI2c = i2cmsId2;
testAddr = pNvmCfg->addr;
if ((rc = i2cmsMasterRead(testI2c, testAddr,(UINT08 *)&cacheOfs, 2, (UINT08 *)&tLength, 2)) == 2)
{
nvram_pgsz = pNvmCfg->pgsz;
nvmI2cAddr = testAddr;
nvmI2cLine = testI2c;
dbgprint("NVRAM] found at %2d:0x%02x : PageSize %3d",
pNvmCfg->i2cid, pNvmCfg->addr, pNvmCfg->pgsz);
break;
}
// repeat next in nvm_cfg[]
pNvmCfg++;
}
if ( nvmI2cLine == NULL )
{
dbgprint("Can not access NVRAM, rc = %d", rc);
return I2C_ERROR;
}
}
tStartIndex = start / nvram_pgsz;
tLastIndex = tLast / nvram_pgsz;
waitSem(lSMidNvm, WAIT_FOREVER);
for (i = tStartIndex; i <= tLastIndex; i++, pBuf += tLength)
{
/* Transfer 시작 주소와 크기 설정. */
/* 처음이 아닌 경우, 시작 주소는 Page Size에 동기화한다. */
/* Last Block이 0이 아닌 경우 마지막 LOOP에서만 짜투리를 처리 */
tStartOfs = ( (i == tStartIndex) ? (start ) : ( i * nvram_pgsz) );
tLength = ( (i == tLastIndex ) ? (tLast+1) : ((i+1) * nvram_pgsz) ) - tStartOfs;
#if (NVM_CACHE > 0)
cacheBuf = &__nvc[i].nc_page[0];
cacheOfs = (i * nvram_pgsz);
if (__nvc[i].nc_valid == 0)
{
WaitNvmStable(TRUE);
if (i2cmsMasterRead(nvmI2cLine,nvmI2cAddr,(UINT08 *)&cacheOfs, 2, cacheBuf, nvram_pgsz)!= I2C_ERROR)
{
#if (NVM_DEBUG > 1)
NVMDRV_PRINT("%snvm(0x%04x,%4d) :: page filled", tStr, tStartOfs, tLength);
#endif /* (NVM_DEBUG > 1) */
__nvc[i].nc_valid = TRUE;
}
}
if (__nvc[i].nc_valid)
{
cacheBuf += (tStartOfs - cacheOfs);
if (cmd)
{
#if (NVM_DEBUG > 1)
NVMDRV_PRINT("Rdnvm(0x%04x,%4d) :: read cache hit", tStartOfs, tLength);
#endif /* (NVM_DEBUG > 1) */
memcpy(pBuf, cacheBuf, tLength);
continue;
}
else
{
if (memcmp(cacheBuf, pBuf, tLength) == 0)
{
/*
* !!!! CAUTION !!!!
* Dangerous Writing Same Data To Nram
*/
#if (NVM_DEBUG > 1)
NVMDRV_PRINT("WRnvm(0x%04x,%4d) :: Write Cache Hit", tStartOfs, tLength);
#endif /* (NVM_DEBUG > 1) */
#if (NVM_TRACE > 0)
PrintStack();
#endif /* (NVM_TRACE > 0) */
continue;
}
else
{
memcpy(cacheBuf, pBuf, tLength);
__nvc[i].nc_dirty = TRUE;
}
}
}
#endif /* (NVM_CACHE > 0) */
for (j = 0; j < MAX_NUM_OF_RETRY; j++)
{
#if (NVM_DEBUG > 1)
NVMDRV_PRINT("%snvm(0x%04x,%4d) :: page request", tStr, tStartOfs, tLength);
#endif /* (NVM_DEBUG > 1) */
/* Wait until nvram device is stable */
WaitNvmStable(cmd);
/* Read/Write the block data to EEPROM */
if (cmd != 0)
rc = i2cmsMasterRead (nvmI2cLine,nvmI2cAddr,(UINT08 *)&tStartOfs, 2, pBuf, tLength);
else
rc = i2cmsMasterWrite(nvmI2cLine,nvmI2cAddr,(UINT08 *)&tStartOfs, 2, pBuf, tLength);
if (rc != I2C_ERROR)
break;
}
if (j == MAX_NUM_OF_RETRY)
{
postSem(lSMidNvm);
return I2C_ERROR;
}
}
postSem(lSMidNvm);
return I2C_OK;
}
