//! [wdt_setup]
void _hal_wdtInit(void)
{
/* Create a new configuration structure for the Watchdog settings and fill
* with the default module settings. */
//! [setup_1]
struct wdt_conf config_wdt;
//! [setup_1]
//! [setup_2]
wdt_get_config_defaults(&config_wdt);
//! [setup_2]
/* Set the Watchdog configuration settings */
//! [setup_3]
config_wdt.always_on = false;
config_wdt.clock_source = GCLK_GENERATOR_4;
config_wdt.timeout_period = WDT_PERIOD_2048CLK;
//! [setup_3]
/* Initialize and enable the Watchdog with the user settings */
//! [setup_4]
// wdt_init(&config_wdt);
//! [setup_4]
// It is not a good idea to use watchdog timers
//! [setup_5]
// wdt_enable();
//! [setup_5]
} //! [wdt_setup]
//! [setup]
void configure_wdt(void)
{
/* Create a new configuration structure for the Watchdog settings and fill
* with the default module settings. */
//! [setup_1]
struct wdt_conf config_wdt;
//! [setup_1]
//! [setup_2]
wdt_get_config_defaults(&config_wdt);
//! [setup_2]
/* Set the Watchdog configuration settings */
//! [setup_3]
config_wdt.always_on = false;
#if !((SAML21) || (SAMC21) || (SAML22))
config_wdt.clock_source = GCLK_GENERATOR_4;
#endif
config_wdt.timeout_period = WDT_PERIOD_2048CLK;
//! [setup_3]
/* Initialize and enable the Watchdog with the user settings */
//! [setup_4]
wdt_set_config(&config_wdt);
//! [setup_4]
}
void wdt_config(void){
//GCLK->CLKCTRL.reg=0x4204;
/* Create a new configuration structure for the Watchdog settings and fill
* with the default module settings. */
//! [setup_1]
struct wdt_conf config_wdt;
//! [setup_1]
//! [setup_2]
wdt_get_config_defaults(&config_wdt);
//! [setup_2]
/* Set the Watchdog configuration settings */
//! [setup_3]
config_wdt.always_on = false;
#if !((SAML21) || (SAMC21) || (SAML22))
config_wdt.clock_source = GCLK_GENERATOR_2;
#endif
config_wdt.timeout_period = WDT_PERIOD_16384CLK;
//! [setup_3]
/* Initialize and enable the Watchdog with the user settings */
//! [setup_4]
wdt_set_config(&config_wdt);
//! [setup_4]
//hmi.printf("config wdt\r\n");
}
/**
* \brief Run WDT unit tests
*
* Initializes the system and serial output, then sets up the
* WDT unit test suite and runs it.
*/
int main(void)
{
/* Check whether reset cause was Watchdog */
#if (SAML21)
wdr_flag = (system_get_reset_cause() & RSTC_RCAUSE_WDT);
#else
wdr_flag = (system_get_reset_cause() & PM_RCAUSE_WDT);
#endif
system_init();
/* Reset the Watchdog count */
wdt_reset_count();
struct wdt_conf config_wdt;
/* Get the Watchdog default configuration */
wdt_get_config_defaults(&config_wdt);
if(wdr_flag) {
config_wdt.enable = false;
}
/* Set the desired configuration */
#if !(SAML21)
config_wdt.clock_source = CONF_WDT_GCLK_GEN;
#endif
config_wdt.timeout_period = CONF_WDT_TIMEOUT_PERIOD;
config_wdt.early_warning_period = CONF_WDT_EARLY_WARNING_PERIOD;
wdt_set_config(&config_wdt);
cdc_uart_init();
DEFINE_TEST_CASE(wdt_early_warning_test, NULL,
run_wdt_early_warning_test, wait_for_wdt_reset,
"WDT Early Warning Test");
DEFINE_TEST_CASE(reset_cause_test, NULL,
run_reset_cause_test, NULL,
"Confirming Watchdog Reset");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(wdt_tests) = {
&wdt_early_warning_test,
&reset_cause_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(wdt_suite, wdt_tests,
"SAM WDT driver test suite");
/* Run all tests in the suite*/
test_suite_run(&wdt_suite);
while (1) {
/* Intentionally left empty */
}
}
/**
* \brief Function for starting application
*
* This function will configure the WDT module and enable it. The LED is
* kept toggling till WDT reset occurs.
*/
static void start_application(void)
{
struct wdt_conf wdt_config;
WDT->CTRL.reg |= WDT_CTRL_ENABLE;
/* Turn off LED */
port_pin_set_output_level(BOOT_LED, true);
/* Get WDT default configuration */
wdt_get_config_defaults(&wdt_config);
/* Set the required clock source and timeout period */
wdt_config.clock_source = GCLK_GENERATOR_4;
wdt_config.timeout_period = WDT_PERIOD_2048CLK;
/* Initialize and enable the Watchdog with the user settings */
wdt_set_config(&wdt_config);
#ifdef __DEBUG_PRINT__
printf("\r\n[WATCHDOG RESET INVOKED]..Resetting !!!!\r\n");
#endif
while(1);
}
void board_init(void)
{
#ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
struct wdt_dev_inst wdt_inst;
struct wdt_config wdt_cfg;
wdt_get_config_defaults(&wdt_cfg);
wdt_init(&wdt_inst, WDT, &wdt_cfg);
wdt_disable(&wdt_inst);
#endif
/* Initialize IOPORT */
ioport_init();
/* Initialize LED0, turned off */
ioport_set_pin_dir(LED_0_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LED_0_PIN, IOPORT_PIN_LEVEL_HIGH);
/* Initialize SW0 */
ioport_set_pin_dir(BUTTON_0_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_mode(BUTTON_0_PIN, IOPORT_MODE_PULLUP);
#ifdef CONF_BOARD_EIC
/* Set push button as external interrupt pin */
ioport_set_pin_peripheral_mode(BUTTON_0_EIC_PIN,
BUTTON_0_EIC_PIN_MUX | IOPORT_MODE_PULLUP);
#else
/* Push button as input: already done, it's the default pin state */
#endif
#if (defined CONF_BOARD_BL)
// Configure LCD backlight
ioport_set_pin_dir(LCD_BL_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LCD_BL_GPIO, LCD_BL_INACTIVE_LEVEL);
#endif
#if defined (CONF_BOARD_COM_PORT)
ioport_set_pin_peripheral_mode(COM_PORT_RX_PIN, COM_PORT_RX_MUX);
ioport_set_pin_peripheral_mode(COM_PORT_TX_PIN, COM_PORT_TX_MUX);
#endif
#ifdef CONF_BOARD_TWIMS0
ioport_set_pin_peripheral_mode(PIN_PA23B_TWIMS0_TWD,
MUX_PA23B_TWIMS0_TWD);
ioport_set_pin_peripheral_mode(PIN_PA24B_TWIMS0_TWCK,
MUX_PA24B_TWIMS0_TWCK);
#endif
#ifdef CONF_BOARD_TWIMS3
ioport_set_pin_peripheral_mode(PIN_PB14C_TWIMS3_TWD,
MUX_PB14C_TWIMS3_TWD);
ioport_set_pin_peripheral_mode(PIN_PB15C_TWIMS3_TWCK,
MUX_PB15C_TWIMS3_TWCK);
#endif
#ifdef CONF_BOARD_USART0
ioport_set_pin_peripheral_mode(EXT1_PIN_UART_RX, EXT1_UART_RX_MUX);
ioport_set_pin_peripheral_mode(EXT1_PIN_UART_TX, EXT1_UART_TX_MUX);
#endif
#if (defined CONF_BOARD_USB_PORT)
ioport_set_pin_peripheral_mode(PIN_PA25A_USBC_DM, MUX_PA25A_USBC_DM);
ioport_set_pin_peripheral_mode(PIN_PA26A_USBC_DP, MUX_PA26A_USBC_DP);
# if defined(CONF_BOARD_USB_VBUS_DETECT)
ioport_set_pin_dir(USB_VBUS_PIN, IOPORT_DIR_INPUT);
# endif
# if defined(CONF_BOARD_USB_ID_DETECT)
ioport_set_pin_dir(USB_ID_PIN, IOPORT_DIR_INPUT);
# endif
# if defined(CONF_BOARD_USB_VBUS_CONTROL)
ioport_set_pin_dir(USB_VBOF_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(USB_VBOF_PIN, USB_VBOF_INACTIVE_LEVEL);
# endif
#endif
#ifdef CONF_BOARD_AT86RFX
ioport_set_pin_peripheral_mode(AT86RFX_SPI_MISO, AT86RFX_SPI_MISO_FLAGS);
ioport_set_pin_peripheral_mode(AT86RFX_SPI_MOSI, AT86RFX_SPI_MOSI_FLAGS);
ioport_set_pin_peripheral_mode(AT86RFX_SPI_SCK, AT86RFX_SPI_SCK_FLAGS);
ioport_set_pin_peripheral_mode(AT86RFX_SPI_CS_PIN, AT86RFX_SPI_CS_FLAGS);
/* Initialize TRX_RST and SLP_TR as GPIO. */
ioport_set_pin_dir(AT86RFX_RST_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AT86RFX_RST_PIN, IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_dir(AT86RFX_SLP_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AT86RFX_SLP_PIN, IOPORT_PIN_LEVEL_HIGH);
#ifdef EXT_RF_FRONT_END_CTRL
ioport_set_pin_dir(AT86RFX_CPS, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AT86RFX_CPS, IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_dir(AT86RFX_CSD, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(AT86RFX_CSD, IOPORT_PIN_LEVEL_HIGH);
#endif
#endif
#if defined(CONF_BOARD_SPI) || defined(CONF_BOARD_SD_MMC_SPI)
ioport_set_pin_peripheral_mode(PIN_PA21A_SPI_MISO, MUX_PA21A_SPI_MISO);
ioport_set_pin_peripheral_mode(PIN_PA22A_SPI_MOSI, MUX_PA22A_SPI_MOSI);
ioport_set_pin_peripheral_mode(PIN_PC30B_SPI_SCK, MUX_PC30B_SPI_SCK);
#ifdef CONF_BOARD_SD_MMC_SPI
/* Setting SD detection pin */
ioport_set_pin_dir(SD_MMC_0_CD_GPIO, IOPORT_DIR_INPUT);
ioport_set_pin_mode(SD_MMC_0_CD_GPIO, IOPORT_MODE_PULLUP);
/* Setting SD CS pin */
ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
#endif
#ifdef CONF_BOARD_SPI_NPCS0
ioport_set_pin_peripheral_mode(PIN_PC03A_SPI_NPCS0,
MUX_PC03A_SPI_NPCS0);
#endif
#ifdef CONF_BOARD_SPI_NPCS1
ioport_set_pin_peripheral_mode(PIN_PB13B_SPI_NPCS1,
MUX_PB13B_SPI_NPCS1);
#endif
#ifdef CONF_BOARD_SPI_NPCS2
ioport_set_pin_peripheral_mode(PIN_PB11B_SPI_NPCS2,
MUX_PB11B_SPI_NPCS2);
#endif
#endif
#ifdef CONF_BOARD_DACC_VOUT
ioport_set_pin_peripheral_mode(DACC_VOUT_PIN, DACC_VOUT_MUX);
#endif
#ifdef CONF_BOARD_ACIFC
ioport_set_pin_peripheral_mode(PIN_PA06E_ACIFC_ACAN0, MUX_PA06E_ACIFC_ACAN0);
ioport_set_pin_peripheral_mode(PIN_PA07E_ACIFC_ACAP0, MUX_PA07E_ACIFC_ACAP0);
#endif
#ifdef CONF_BOARD_PARC
ioport_set_pin_peripheral_mode(PIN_PA17D_PARC_PCCK, MUX_PA17D_PARC_PCCK);
ioport_set_pin_peripheral_mode(PIN_PA09D_PARC_PCDATA0, MUX_PA09D_PARC_PCDATA0);
ioport_set_pin_peripheral_mode(PIN_PA10D_PARC_PCDATA1, MUX_PA10D_PARC_PCDATA1);
ioport_set_pin_peripheral_mode(PIN_PA11D_PARC_PCDATA2, MUX_PA11D_PARC_PCDATA2);
ioport_set_pin_peripheral_mode(PIN_PA12D_PARC_PCDATA3, MUX_PA12D_PARC_PCDATA3);
ioport_set_pin_peripheral_mode(PIN_PA13D_PARC_PCDATA4, MUX_PA13D_PARC_PCDATA4);
ioport_set_pin_peripheral_mode(PIN_PA14D_PARC_PCDATA5, MUX_PA14D_PARC_PCDATA5);
ioport_set_pin_peripheral_mode(PIN_PA15D_PARC_PCDATA6, MUX_PA15D_PARC_PCDATA6);
ioport_set_pin_peripheral_mode(PIN_PA16D_PARC_PCDATA7, MUX_PA16D_PARC_PCDATA7);
ioport_set_pin_peripheral_mode(PIN_PA18D_PARC_PCEN1, MUX_PA18D_PARC_PCEN1);
ioport_set_pin_peripheral_mode(PIN_PA19D_PARC_PCEN2, MUX_PA19D_PARC_PCEN2);
#endif
#ifdef CONF_BOARD_OLED_UG_2832HSWEG04
ioport_set_pin_dir(UG_2832HSWEG04_DATA_CMD_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_mode(UG_2832HSWEG04_DATA_CMD_GPIO, IOPORT_MODE_PULLUP);
ioport_set_pin_dir(UG_2832HSWEG04_RESET_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_mode(UG_2832HSWEG04_RESET_GPIO, IOPORT_MODE_PULLUP);
#endif
}
/* \brief Main entry point
* This is an example of how to use watchdog.
*/
int main(void)
{
struct eic_line_config eic_line_cfg;
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("\r\n\r\n-- Watchdog example --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
/* Systick configuration. */
if (SysTick_Config(sysclk_get_cpu_hz() / 1000)) {
puts("-F- Systick configuration error\r");
}
/* Configure push button */
eic_line_cfg.eic_mode = EIC_MODE_EDGE_TRIGGERED;
eic_line_cfg.eic_edge = EIC_EDGE_FALLING_EDGE;
eic_line_cfg.eic_level = EIC_LEVEL_LOW_LEVEL;
eic_line_cfg.eic_filter = EIC_FILTER_DISABLED;
eic_line_cfg.eic_async = EIC_ASYNCH_MODE;
eic_enable(EIC);
eic_line_set_config(EIC, GPIO_PUSH_BUTTON_EIC_LINE,
&eic_line_cfg);
eic_line_set_callback(EIC, GPIO_PUSH_BUTTON_EIC_LINE, set_toggle_flag,
EIC_5_IRQn, 1);
eic_line_enable(EIC, GPIO_PUSH_BUTTON_EIC_LINE);
/*
* Intialize and enable the watchdog.
* Use default configuration but change timeout period
* to about 4.56s (Ttimeout = 2pow(PSEL+1) / Fclk_cnt = 524288 / 115000).
*/
wdt_get_config_defaults(&g_wdt_cfg);
g_wdt_cfg.timeout_period = WDT_PERIOD_524288_CLK;
wdt_init(&g_wdt_inst, WDT, &g_wdt_cfg);
wdt_enable(&g_wdt_inst);
puts("\r\nPlease press PB0 to simulate a deadlock.\r");
while (1) {
if (g_b_systick_event == true) {
g_b_systick_event = false;
/* Toggle LED at the given period. */
if ((g_ul_ms_ticks % BLINK_PERIOD) == 0) {
ioport_toggle_pin_level(LED0_GPIO);
}
/* Clear watchdog at the given period. */
if ((g_ul_ms_ticks % WDT_RESTART_PERIOD) == 0) {
wdt_clear(&g_wdt_inst);
}
}
/* Simulate deadlock when button is pressed. */
if (g_b_button_event == true) {
puts("The program enters an infinite loop, the WDT reset will " \
"trigger in about 5s.\r");
wdt_clear(&g_wdt_inst);
while (1) {
if (g_b_systick_event == true) {
g_b_systick_event = false;
if ((g_ul_ms_ticks % BLINK_PERIOD) == 0) {
printf(".");
}
}
}
}
}
}
void board_init(void)
{
#ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
struct wdt_dev_inst wdt_inst;
struct wdt_config wdt_cfg;
wdt_get_config_defaults(&wdt_cfg);
wdt_init(&wdt_inst, WDT, &wdt_cfg);
wdt_disable(&wdt_inst);
#endif
/* Initialize IOPORT */
ioport_init();
/* Initialize LEDs, turned off */
ioport_set_port_dir(LED_PORT, LED_MASK, IOPORT_DIR_OUTPUT);
ioport_set_port_level(LED_PORT, LED_MASK, LED_INACTIVE);
ioport_set_port_mode(LED_PORT, LED_MASK, IOPORT_MODE_DRIVE_STRENGTH);
/* Initialize SW0 */
ioport_set_pin_dir(BUTTON_0_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_mode(BUTTON_0_PIN, IOPORT_MODE_PULLUP);
#ifdef CONF_BOARD_EIC
/* Set push button as external interrupt pin */
ioport_set_pin_peripheral_mode(BUTTON_0_EIC_PIN,
BUTTON_0_EIC_PIN_MUX | IOPORT_MODE_PULLUP);
#else
/* Push button as input: already done, it's the default pin state */
#endif
#if defined (CONF_BOARD_COM_PORT)
ioport_set_pin_peripheral_mode(COM_PORT_RX_PIN, COM_PORT_RX_MUX);
ioport_set_pin_peripheral_mode(COM_PORT_TX_PIN, COM_PORT_TX_MUX);
#endif
#ifdef CONF_BOARD_TWIMS0
ioport_set_pin_peripheral_mode(PIN_PA23B_TWIMS0_TWD,
MUX_PA23B_TWIMS0_TWD);
ioport_set_pin_peripheral_mode(PIN_PA24B_TWIMS0_TWCK,
MUX_PA24B_TWIMS0_TWCK);
#endif
#ifdef CONF_BOARD_TWIMS3
ioport_set_pin_peripheral_mode(PIN_PB14C_TWIMS3_TWD,
MUX_PB14C_TWIMS3_TWD);
ioport_set_pin_peripheral_mode(PIN_PB15C_TWIMS3_TWCK,
MUX_PB15C_TWIMS3_TWCK);
#endif
#ifdef CONF_BOARD_USART0
ioport_set_pin_peripheral_mode(EXT1_PIN_UART_RX, EXT1_UART_RX_MUX);
ioport_set_pin_peripheral_mode(EXT1_PIN_UART_TX, EXT1_UART_TX_MUX);
#endif
#if (defined CONF_BOARD_USB_PORT)
ioport_set_pin_peripheral_mode(PIN_PA25A_USBC_DM, MUX_PA25A_USBC_DM);
ioport_set_pin_peripheral_mode(PIN_PA26A_USBC_DP, MUX_PA26A_USBC_DP);
# if defined(CONF_BOARD_USB_VBUS_DETECT)
ioport_set_pin_dir(USB_VBUS_PIN, IOPORT_DIR_INPUT);
# endif
# if defined(CONF_BOARD_USB_ID_DETECT)
ioport_set_pin_dir(USB_ID_PIN, IOPORT_DIR_INPUT);
# endif
# if defined(CONF_BOARD_USB_VBUS_CONTROL)
ioport_set_pin_dir(USB_VBOF_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(USB_VBOF_PIN, USB_VBOF_INACTIVE_LEVEL);
# endif
#endif
#if defined(CONF_BOARD_SPI) || defined(CONF_BOARD_SD_MMC_SPI)
ioport_set_pin_peripheral_mode(PIN_PA21A_SPI_MISO, MUX_PA21A_SPI_MISO);
ioport_set_pin_peripheral_mode(PIN_PA22A_SPI_MOSI, MUX_PA22A_SPI_MOSI);
ioport_set_pin_peripheral_mode(PIN_PC30B_SPI_SCK, MUX_PC30B_SPI_SCK);
#ifdef CONF_BOARD_SD_MMC_SPI
/* Setting SD detection pin */
ioport_set_pin_dir(SD_MMC_0_CD_GPIO, IOPORT_DIR_INPUT);
ioport_set_pin_mode(SD_MMC_0_CD_GPIO, IOPORT_MODE_PULLUP);
/* Setting SD CS pin */
ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
#endif
#ifdef CONF_BOARD_SPI_NPCS0
ioport_set_pin_peripheral_mode(PIN_PC03A_SPI_NPCS0,
MUX_PC03A_SPI_NPCS0);
#endif
#ifdef CONF_BOARD_SPI_NPCS1
ioport_set_pin_peripheral_mode(PIN_PB13B_SPI_NPCS1,
MUX_PB13B_SPI_NPCS1);
#endif
#ifdef CONF_BOARD_SPI_NPCS2
ioport_set_pin_peripheral_mode(PIN_PB11B_SPI_NPCS2,
MUX_PB11B_SPI_NPCS2);
#endif
#endif
#ifdef CONF_BOARD_DACC_VOUT
ioport_set_pin_peripheral_mode(DACC_VOUT_PIN, DACC_VOUT_MUX);
#endif
#ifdef CONF_BOARD_ACIFC
ioport_set_pin_peripheral_mode(PIN_PA06E_ACIFC_ACAN0, MUX_PA06E_ACIFC_ACAN0);
ioport_set_pin_peripheral_mode(PIN_PA07E_ACIFC_ACAP0, MUX_PA07E_ACIFC_ACAP0);
#endif
}
void board_init(void)
{
#ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
struct wdt_dev_inst wdt_inst;
struct wdt_config wdt_cfg;
wdt_get_config_defaults(&wdt_cfg);
wdt_init(&wdt_inst, WDT, &wdt_cfg);
wdt_disable(&wdt_inst);
#endif
// Initialize IOPORTs
ioport_init();
// Put all pins to default state (input & pull-up)
uint32_t pin;
for (pin = PIN_PA00; pin <= PIN_PC31; pin ++) {
// Skip output pins to configure later
if (pin == LED0_GPIO || pin == LCD_BL_GPIO
#ifdef CONF_BOARD_RS485
|| pin == RS485_USART_CTS_PIN
#endif
/* PA02 is not configured as it is driven by hardware
configuration */
|| pin == PIN_PA02) {
continue;
}
ioport_set_pin_dir(pin, IOPORT_DIR_INPUT);
ioport_set_pin_mode(pin, IOPORT_MODE_PULLUP);
}
/* Configure the pins connected to LEDs as output and set their
* default initial state to high (LEDs off).
*/
ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL);
#ifdef CONF_BOARD_EIC
// Set push button as external interrupt pin
ioport_set_pin_peripheral_mode(GPIO_PUSH_BUTTON_EIC_PIN,
GPIO_PUSH_BUTTON_EIC_PIN_MUX);
ioport_set_pin_peripheral_mode(GPIO_UNIT_TEST_EIC_PIN,
GPIO_UNIT_TEST_EIC_PIN_MUX);
#else
// Push button as input: already done, it's the default pin state
#endif
#if (defined CONF_BOARD_BL)
// Configure LCD backlight
ioport_set_pin_dir(LCD_BL_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LCD_BL_GPIO, LCD_BL_INACTIVE_LEVEL);
#endif
#if (defined CONF_BOARD_USB_PORT)
ioport_set_pin_peripheral_mode(PIN_PA25A_USBC_DM, MUX_PA25A_USBC_DM);
ioport_set_pin_peripheral_mode(PIN_PA26A_USBC_DP, MUX_PA26A_USBC_DP);
# if defined(CONF_BOARD_USB_VBUS_DETECT)
# if defined(USB_VBUS_EIC)
ioport_set_pin_peripheral_mode(USB_VBUS_EIC,
USB_VBUS_EIC_MUX|USB_VBUS_FLAGS);
# elif defined(USB_VBUS_PIN)
ioport_set_pin_dir(USB_VBUS_PIN, IOPORT_DIR_INPUT);
# else
# warning USB_VBUS pin not defined
# endif
# endif
# if defined(CONF_BOARD_USB_ID_DETECT)
# if defined(USB_ID_EIC)
ioport_set_pin_peripheral_mode(USB_ID_EIC,
USB_ID_EIC_MUX|USB_ID_FLAGS);
# elif defined(USB_ID_PIN)
ioport_set_pin_dir(USB_ID_PIN, IOPORT_DIR_INPUT);
# else
# warning USB_ID pin not defined
# endif
# endif
# if defined(CONF_BOARD_USB_VBUS_CONTROL)
# if defined(USB_VBOF_PIN)
ioport_set_pin_dir(USB_VBOF_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(USB_VBOF_PIN, USB_VBOF_INACTIVE_LEVEL);
# else
# warning USB_VBOF pin not defined
# endif
# if defined(CONF_BOARD_USB_VBUS_ERR_DETECT)
# if defined(USB_VBERR_EIC)
ioport_set_pin_peripheral_mode(USB_VBERR_EIC,
USB_VBERR_EIC_MUX|USB_VBERR_FLAGS);
# elif defined(USB_VBERR_PIN)
ioport_set_pin_dir(USB_VBERR_PIN, IOPORT_DIR_INPUT);
# else
# warning USB_VBERR pin not defined
# endif
# endif
# endif /* !(defined CONF_BOARD_USB_NO_VBUS_CONTROL) */
#endif /* (defined CONF_BOARD_USB_PORT) */
#if defined (CONF_BOARD_COM_PORT)
ioport_set_pin_peripheral_mode(COM_PORT_RX_PIN, COM_PORT_RX_MUX);
ioport_set_pin_peripheral_mode(COM_PORT_TX_PIN, COM_PORT_TX_MUX);
#endif
#if defined (CONF_BOARD_BM_USART)
ioport_set_pin_peripheral_mode(BM_USART_RX_PIN, BM_USART_RX_MUX);
ioport_set_pin_peripheral_mode(BM_USART_TX_PIN, BM_USART_TX_MUX);
#endif
#ifdef CONF_BOARD_SPI
ioport_set_pin_peripheral_mode(PIN_PC04A_SPI_MISO, MUX_PC04A_SPI_MISO);
ioport_set_pin_peripheral_mode(PIN_PC05A_SPI_MOSI, MUX_PC05A_SPI_MOSI);
ioport_set_pin_peripheral_mode(PIN_PC06A_SPI_SCK, MUX_PC06A_SPI_SCK);
#ifdef CONF_BOARD_SPI_NPCS0
ioport_set_pin_peripheral_mode(PIN_PA02B_SPI_NPCS0,
MUX_PA02B_SPI_NPCS0);
#endif
#ifdef CONF_BOARD_SPI_NPCS2
ioport_set_pin_peripheral_mode(PIN_PC00A_SPI_NPCS2,
MUX_PC00A_SPI_NPCS2);
#endif
#ifdef CONF_BOARD_SPI_NPCS3
ioport_set_pin_peripheral_mode(PIN_PC01A_SPI_NPCS3,
MUX_PC01A_SPI_NPCS3);
#endif
#endif
#ifdef CONF_BOARD_RS485
ioport_set_pin_peripheral_mode(RS485_USART_RX_PIN, RS485_USART_RX_MUX);
ioport_set_pin_peripheral_mode(RS485_USART_TX_PIN, RS485_USART_TX_MUX);
ioport_set_pin_peripheral_mode(RS485_USART_RTS_PIN,
RS485_USART_RTS_MUX);
ioport_set_pin_dir(RS485_USART_CTS_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(RS485_USART_CTS_PIN, IOPORT_PIN_LEVEL_LOW);
#endif
#ifdef CONF_BOARD_TWIMS1
ioport_set_pin_peripheral_mode(TWIMS1_TWI_SCL_PIN, TWIMS1_TWI_SCL_MUX);
ioport_set_pin_peripheral_mode(TWIMS1_TWI_SDA_PIN, TWIMS1_TWI_SDA_MUX);
#endif
#ifdef CONF_BOARD_USART0
ioport_set_pin_peripheral_mode(USART0_RX_PIN, USART0_RX_MUX);
ioport_set_pin_peripheral_mode(USART0_TX_PIN, USART0_TX_MUX);
#endif
#ifdef CONF_BOARD_DACC_VOUT
ioport_set_pin_peripheral_mode(DACC_VOUT_PIN, DACC_VOUT_MUX);
#endif
#ifdef CONF_BOARD_ACIFC
ioport_set_pin_peripheral_mode(PIN_PA06E_ACIFC_ACAN0, MUX_PA06E_ACIFC_ACAN0);
ioport_set_pin_peripheral_mode(PIN_PA07E_ACIFC_ACAP0, MUX_PA07E_ACIFC_ACAP0);
#endif
#ifdef CONF_BOARD_ABDACB_PORT
ioport_set_pin_peripheral_mode(ABDACB_AUDIO0_PIN, ABDACB_AUDIO0_MUX);
ioport_set_pin_peripheral_mode(ABDACB_AUDIO1_PIN, ABDACB_AUDIO1_MUX);
#endif
}
/**
* \brief Test watchdog for all cases.
*
* \note Because MCU will be reset serval times druing the test,
* to simplify the design, only one test case but with many test stages.
*
* \param test Current test case.
*/
static void run_wdt_test_all(const struct test_case *test)
{
struct wdt_dev_inst wdt_inst;
struct wdt_config wdt_cfg;
uint32_t wdt_window_ms = 0;
uint32_t wdt_timeout_ms = 0;
uint32_t wdt_ut_stage;
/* Get test stage */
wdt_ut_stage = (uint32_t)(*(uint32_t *)WDT_UT_TAG_ADDR);
if (is_wdt_reset()) {
/* Check if the reset is as expected */
switch (wdt_ut_stage) {
case WDT_UT_STAGE_START:
test_assert_true(test, 0,
"Unexpected watchdog reset at start stage!");
break;
case WDT_UT_STAGE_RST_MCU:
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_BM_NORMAL;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
break;
case WDT_UT_STAGE_BM_NORMAL:
test_assert_true(test, 0,
"Unexpected watchdog reset at basic mode!");
break;
case WDT_UT_STAGE_BM_TIMEOUT_RST:
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_WM_NORMAL;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
break;
case WDT_UT_STAGE_WM_NORMAL:
test_assert_true(test, 0,
"Unexpected watchdog reset at window mode!");
break;
case WDT_UT_STAGE_WM_TIMEBAN_RST:
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_WM_TIMEOUT_RST;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
break;
case WDT_UT_STAGE_WM_TIMEOUT_RST:
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_END;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
break;
case WDT_UT_STAGE_END:
test_assert_true(test, 0,
"Unexpected watchdog reset at end stage!");
break;
default:
test_assert_true(test, 0,
"Unexpected watchdog reset!");
break;
}
} else {
/* First WDT unit test start at here, set stage flag */
wdt_ut_stage = WDT_UT_STAGE_START;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
}
/*
* ---- Test reset MCU by the WDT ----
*/
if (wdt_ut_stage == WDT_UT_STAGE_START) {
bool ret;
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_RST_MCU;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
/* Reset MCU by the watchdog. */
ret = wdt_reset_mcu();
test_assert_false(test, ret,
"Can't reset MCU by the WDT: failed!");
/* The code should not go to here */
test_assert_true(test, 0,
"Reset MCU by the WDT: failed!");
}
/*
* ---- Test the WDT in basic mode ----
*/
if ((wdt_ut_stage & WDT_UT_STAGE_MASK) == WDT_UT_STAGE_BM) {
/*
* Intialize the watchdog in basic mode:
* - Use default configuration.
* - But change timeout period to 0.57s
* (Ttimeout = 2pow(PSEL+1) / Fclk_cnt = 65535 / 115000).
*/
wdt_get_config_defaults(&wdt_cfg);
wdt_cfg.timeout_period = WDT_PERIOD_65536_CLK;
wdt_timeout_ms = 570;
wdt_init(&wdt_inst, WDT, &wdt_cfg);
wdt_enable(&wdt_inst);
wdt_clear(&wdt_inst);
mdelay(wdt_timeout_ms / 2);
wdt_clear(&wdt_inst);
/* The code should reach here */
test_assert_true(test, 1,
"Clear the WDT in basic mode: passed.");
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_BM_TIMEOUT_RST;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
/* Wait for the WDT reset */
mdelay(wdt_timeout_ms * 2);
/* The code should not go to here, disable watchdog for default */
wdt_disable(&wdt_inst);
test_assert_true(test, 0,
"No WDT reset happened in basic mode!");
}
/*
* ---- Test the WDT in window mode ----
*/
if ((wdt_ut_stage & WDT_UT_STAGE_MASK) == WDT_UT_STAGE_WM) {
/* Enable WDT clock source if need */
if (BPM->BPM_PMCON & BPM_PMCON_CK32S) {
/* Enable 32K RC oscillator */
if (!osc_is_ready(OSC_ID_RC32K)) {
osc_enable(OSC_ID_RC32K);
osc_wait_ready(OSC_ID_RC32K);
}
} else {
/* Enable external OSC32 oscillator */
if (!osc_is_ready(OSC_ID_OSC32)) {
osc_enable(OSC_ID_OSC32);
osc_wait_ready(OSC_ID_OSC32);
}
}
/*
* Intialize the watchdog in window mode:
* - Use 32K oscillator as WDT clock source.
* - Set timeout/timeban period to 0.5s
* (Ttimeout = 2pow(PSEL+1) / Fclk_cnt = 16384 / 32768).
*/
wdt_get_config_defaults(&wdt_cfg);
wdt_cfg.wdt_mode = WDT_MODE_WINDOW;
wdt_cfg.clk_src = WDT_CLK_SRC_32K;
wdt_cfg.window_period = WDT_PERIOD_16384_CLK;
wdt_cfg.timeout_period = WDT_PERIOD_16384_CLK;
wdt_window_ms = 500;
wdt_timeout_ms = 500;
wdt_init(&wdt_inst, WDT, &wdt_cfg);
wdt_enable(&wdt_inst);
mdelay(wdt_window_ms + wdt_timeout_ms / 10);
wdt_clear(&wdt_inst);
/* The code should reach here */
test_assert_true(test, 1,
"Clear the WDT in window mode: passed.");
if (wdt_ut_stage == WDT_UT_STAGE_WM_NORMAL) {
/* Move to next stage */
wdt_ut_stage = WDT_UT_STAGE_WM_TIMEBAN_RST;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
/* Clear the WDT in time ban window */
wdt_clear(&wdt_inst);
/* The WDT reset should happen */
mdelay(50);
} else if (wdt_ut_stage == WDT_UT_STAGE_WM_TIMEOUT_RST) {
/* Wait for the WDT reset when timeout */
mdelay(wdt_window_ms);
mdelay(wdt_timeout_ms * 2);
}
/* The code should not go to here, disable watchdog for default */
wdt_disable(&wdt_inst);
test_assert_true(test, 0,
"No WDT reset happened in window mode!");
}
/*
* ---- Check if all test are OK ----
*/
if (wdt_ut_stage == WDT_UT_STAGE_END) {
test_assert_true(test, 1,
"All test stages done for WDT.");
/* Clear flash content */
wdt_ut_stage = 0xFFFFFFFFu;
flashcalw_memcpy((void *)WDT_UT_TAG_ADDR, &wdt_ut_stage, 4, true);
} else {
test_assert_true(test, 0,
"WDT test stopped with unexpected stages.");
}
}