uint8_t power_Up(uint8_t sci_x_board){
P4OUT &= ~(SCI_1_SEL + SCI_2_SEL + SCI_3_SEL + SCI_4_SEL); // Turn off all boards on HUB
uint8_t n = 0;
while ((P2IN & radio_Busy) && !timeout){}
// __delay_cycles(1000000); // Wait 1 seconds to let settle
while (n < 39)
{
if (sci_x_board == 1){write_UART (sci_1_pUp[n]);} // Request power up from NSL
if (sci_x_board == 2){write_UART (sci_2_pUp[n]);} // Request power up from NSL
if (sci_x_board == 3){write_UART (sci_3_pUp[n]);} // Request power up from NSL
if (sci_x_board == 4){write_UART (sci_4_pUp[n]);} // Request power up from NSL
n++;
}
n = 0;
__delay_cycles(1000000); // Turn on Science board 1 on HUB
if (sci_x_board == 1){P4OUT |= SCI_1_SEL;}
if (sci_x_board == 2){P4OUT |= SCI_2_SEL;}
if (sci_x_board == 3){P4OUT |= SCI_3_SEL;}
if (sci_x_board == 4){P4OUT |= SCI_4_SEL;}
if (timeout)
return 1;
else
return 0;
}
uint8_t power_Down(uint8_t sci_x_board){
P4OUT &= ~(SCI_1_SEL + SCI_2_SEL + SCI_3_SEL + SCI_4_SEL); // Turn off all boards on HUB
__delay_cycles(1000000);
uint8_t n = 0;
while ((P2IN & radio_Busy) && !timeout){}
while (n < 39)
{
write_UART (sci_x_pDown[n]); // Request power up from NSL
n++;
}
g_RXData = 0;
n = 0;
if (timeout){return 1;}
else return 0;
}
void radio_Send(uint8_t source_ID){
uint8_t l = 0;
while (!g_bufferEmpty){
Packetizer(source_ID, 0);
while (P2IN & radio_Busy){}
while (j < 39)
{
write_UART (get_Data(j,source_ID));
// if (source_ID == 0){MOCK0_write_UART[j + (39 * l)] = get_Data(j,source_ID);}
// if (source_ID == 1){MOCK1_write_UART[j + (39 * l)] = get_Data(j,source_ID);}
// if (source_ID == 2){MOCK2_write_UART[j + (39 * l)] = get_Data(j,source_ID);}
j++;
}
__delay_cycles(5000000); // Radio time for one packet
j = 0;
l++;
}
l = 0;
}
int32 SerialPort::writeData(int32 offset, int32 num_bytes, const char*buffer)
{
if( offset != 0 )
return -1;
uint32 jiffies = 0, bytes_written = 0;
while( ArchThreads::testSetLock( SerialLock ,1 ) && jiffies++ < 50000 );
if( jiffies == 50000 )
{
WriteLock = 0;
return -1;
}
WriteLock = bytes_written = 0;
while( num_bytes -- )
{
jiffies = 0;
while( !(read_UART( SC::LSR ) & 0x40) && jiffies++ < 50000 );
if( jiffies == 50000 ) // TIMEOUT
{
SerialLock = 0;
WriteLock = 0;
return -1;
}
write_UART( 0, *(buffer++) );
bytes_written++;
}
SerialLock = 0;
return bytes_written;
};
SerialPort::SRESULT SerialPort::setup_port( BAUD_RATE_E baud_rate, DATA_BITS_E data_bits, STOP_BITS_E stop_bits, PARITY_E parity )
{
write_UART( SC::IER , 0x00); // turn off interupts
uint8 divisor = 0x0C;
switch( baud_rate )
{
case BR_14400:
case BR_19200:
divisor = 0x06;
break;
case BR_38400:
divisor = 0x03;
break;
case BR_55600:
divisor = 0x02;
break;
case BR_115200:
divisor = 0x01;
break;
default:
case BR_9600:
divisor = 0x0C;
break;
}
write_UART( SC::LCR , 0x80); // activate DL
write_UART( 0 , divisor ); // DL low byte
write_UART( SC::IER , 0x00); // DL high byte
uint8 data_bit_reg = 0x03;
switch( data_bits )
{
case DATA_8:
data_bit_reg = 0x03;
break;
case DATA_7:
data_bit_reg = 0x02;
break;
}
uint8 par = 0x00;
switch( parity )
{
case NO_PARITY:
par = 0x00;
break;
case EVEN_PARITY:
par = 0x18;
break;
case ODD_PARITY:
par = 0x08;
break;
}
uint8 stopb = 0x00;
switch( stop_bits )
{
case STOP_ONE:
stopb = 0x00;
break;
case STOP_TWO:
case STOP_ONEANDHALF:
stopb = 0x04;
break;
}
write_UART( SC::LCR , data_bit_reg | par | stopb ); // deact DL and set params
write_UART( SC::FCR , 0xC7);
write_UART( SC::MCR , 0x0B);
write_UART( SC::IER , 0x0F);
return SR_OK;
};
