/* Opcode: VEX.66.0F.3A 19 (VEX.W=0, VEX.VVV #UD) */ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF128_WdqVdqIbM(bxInstruction_c *i) { BxPackedAvxRegister op = BX_READ_AVX_REG(i->nnn()); bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); write_virtual_dqword(i->seg(), eaddr, &(op.avx128(i->Ib() & 1))); BX_NEXT_INSTR(i); }
BX_CPU_C::write_virtual_dqword_aligned(unsigned s, bx_address offset, Bit8u *data) { // If double quadword access is unaligned, #GP(0). bx_address laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset; if (laddr & 0xf) { BX_DEBUG(("write_virtual_dqword_aligned: access not aligned to 16-byte")); exception(BX_GP_EXCEPTION, 0, 0); } write_virtual_dqword(s, offset, data); }