static Bool
VMwarePreinitStub(ScrnInfoPtr pScrn, int flags)
{
#if XSERVER_LIBPCIACCESS
struct pci_device *pciInfo;
#else
pciVideoPtr pciInfo;
#endif /* XSERVER_LIBPCIACCESS */
EntityInfoPtr pEnt;
pScrn->PreInit = pScrn->driverPrivate;
#ifdef BUILD_VMWGFX
pScrn->driverPrivate = NULL;
/*
* Try vmwgfx path.
*/
if ((*pScrn->PreInit)(pScrn, flags))
return TRUE;
/*
* Can't run legacy hosted
*/
if (vmwgfx_hosted_detect())
return FALSE;
#else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Driver was compiled without KMS- and 3D support.\n");
#endif /* defined(BUILD_VMWGFX) */
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling 3D support.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling Render Acceleration.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling RandR12+ support.\n");
pScrn->driverPrivate = NULL;
vmwlegacy_hookup(pScrn);
pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
pciInfo = xf86GetPciInfoForEntity(pEnt->index);
if (pciInfo == NULL)
return FALSE;
pScrn->chipset = (char*)xf86TokenToString(VMWAREChipsets,
DEVICE_ID(pciInfo));
return (*pScrn->PreInit)(pScrn, flags);
};
RHDPtr FindPciDevice()
{
const RADEONCardInfo *dev;
u32_t bus, last_bus;
if( (last_bus = PciApi(1))==-1)
return 0;
for(bus=0;bus<=last_bus;bus++)
{
u32_t devfn;
for(devfn=0;devfn<256;devfn++)
{
u32_t id;
id = PciRead32(bus,devfn, 0);
if( (u16_t)id != VENDOR_ATI)
continue;
rhd.PciDeviceID = (id>>16);
if( (dev = RadeonDevMatch(rhd.PciDeviceID, RADEONCards))!=NULL)
{
u32_t reg2C;
int i;
rhd.chipset = (char*)xf86TokenToString(RADEONChipsets, rhd.PciDeviceID);
if (!rhd.chipset){
dbgprintf("ChipID 0x%04x is not recognized\n", rhd.PciDeviceID);
return FALSE;
}
dbgprintf("Chipset: \"%s\" (ChipID = 0x%04x)\n",
rhd.chipset,rhd.PciDeviceID);
rhd.bus = bus;
rhd.devfn = devfn;
rhd.PciTag = pciTag(bus,(devfn>>3)&0x1F,devfn&0x7);
rhd.ChipFamily = dev->chip_family;
rhd.IsMobility = dev->mobility;
rhd.IsIGP = dev->igp;
rhd.HasCRTC2 = !dev->nocrtc2;
reg2C = PciRead32(bus,devfn, 0x2C);
rhd.subvendor_id = reg2C & 0xFFFF;;
rhd.subdevice_id = reg2C >> 16;
if (rhd.ChipFamily >= CHIP_FAMILY_R600)
dbgprintf("R600 unsupported yet.\nExit\n");
if( rhd.ChipFamily >= CHIP_FAMILY_R420)
rhd.gart_type = RADEON_IS_PCIE;
else
rhd.gart_type = RADEON_IS_PCI;
for (i = 0; i < 6; i++)
{
u32_t base;
Bool validSize;
base = PciRead32(bus,devfn, PCI_MAP_REG_START + (i << 2));
if(base)
{
if (base & PCI_MAP_IO){
rhd.ioBase[i] = (u32_t)PCIGETIO(base);
rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK;
}
else{
rhd.memBase[i] = (u32_t)PCIGETMEMORY(base);
rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK;
}
}
rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize);
}
return &rhd;
}
}
};
/* Mandatory */
Bool
DUMMYPreInit(ScrnInfoPtr pScrn, int flags)
{
ClockRangePtr clockRanges;
int i;
int maxClock = 230000;
GDevPtr device = xf86GetEntityInfo(pScrn->entityList[0])->device;
ModuleDescPtr pMod;
if (flags & PROBE_DETECT)
return TRUE;
/* Allocate the DummyRec driverPrivate */
if (!DUMMYGetRec(pScrn)) {
return FALSE;
}
# define RETURN \
{ DUMMYFreeRec(pScrn);\
return FALSE;\
}
pScrn->chipset = (char *)xf86TokenToString(DUMMYChipsets,
DUMMY_CHIP);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Chipset is a DUMMY\n");
pScrn->monitor = pScrn->confScreen->monitor;
if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support24bppFb | Support32bppFb))
return FALSE;
else {
/* Check that the returned depth is one we support */
switch (pScrn->depth) {
case 8:
case 15:
case 16:
case 24:
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by this driver\n",
pScrn->depth);
return FALSE;
}
}
xf86PrintDepthBpp(pScrn);
if (pScrn->depth == 8)
pScrn->rgbBits = 8;
/* Get the depth24 pixmap format */
if (pScrn->depth == 24 && pix24bpp == 0)
pix24bpp = xf86GetBppFromDepth(pScrn, 24);
/*
* This must happen after pScrn->display has been set because
* xf86SetWeight references it.
*/
if (pScrn->depth > 8) {
/* The defaults are OK for us */
rgb zeros = {0, 0, 0};
if (!xf86SetWeight(pScrn, zeros, zeros)) {
return FALSE;
} else {
/* XXX check that weight returned is supported */
;
}
}
if (!xf86SetDefaultVisual(pScrn, -1))
return FALSE;
if (pScrn->depth > 1) {
Gamma zeros = {0.0, 0.0, 0.0};
if (!xf86SetGamma(pScrn, zeros))
return FALSE;
}
xf86CollectOptions(pScrn, device->options);
if (device->videoRam != 0) {
pScrn->videoRam = device->videoRam;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "VideoRAM: %d kByte\n",
pScrn->videoRam);
} else {
pScrn->videoRam = 4096;
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kByte\n",
pScrn->videoRam);
}
if (device->dacSpeeds[0] != 0) {
maxClock = device->dacSpeeds[0];
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Max Clock: %d kHz\n",
maxClock);
} else {
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Max Clock: %d kHz\n",
maxClock);
}
pScrn->progClock = TRUE;
/*
* Setup the ClockRanges, which describe what clock ranges are available,
* and what sort of modes they can be used for.
*/
clockRanges = (ClockRangePtr)xnfcalloc(sizeof(ClockRange), 1);
clockRanges->next = NULL;
clockRanges->ClockMulFactor = 1;
clockRanges->minClock = 11000; /* guessed §§§ */
clockRanges->maxClock = 300000;
clockRanges->clockIndex = -1; /* programmable */
clockRanges->interlaceAllowed = TRUE;
clockRanges->doubleScanAllowed = TRUE;
/* Subtract memory for HW cursor */
i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
pScrn->display->modes, clockRanges,
NULL, 256, 2048,(8 * pScrn->bitsPerPixel),
128, 2048, pScrn->display->virtualX,
pScrn->display->virtualY, pScrn->videoRam * 1024,
LOOKUP_BEST_REFRESH);
if (i == -1)
RETURN
/* Prune the modes marked as invalid */
xf86PruneDriverModes(pScrn);
if (i == 0 || pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
RETURN
}
static void setModel(IOPCIDevice *device) {
if (!device) return;
char *model = (char *)xf86TokenToString(RHDModels, device->configRead16(kIOPCIConfigDeviceID));
//if ((model == NULL) && (xf86Screens[0] != NULL)) model = xf86Screens[0]->chipset;
if (model != NULL) device->setProperty("model", model);
}
