void PHXSimWrap::writeData(uint id, uint64_t addr, uint64_t clockcycle)
{
PRINTFN("%s: id=%d addr=%#lx clock=%lu\n",__func__,id,addr,clockcycle);
std::multimap< uint64_t, PacketPtr >::iterator it =
m_wr_pktMap.find( addr );
assert( it != m_wr_pktMap.end() );
PacketPtr pkt = it->second;
m_wr_lat.sample( curTick() - pkt->dram_enter_time );
PRINTFN("%s() `%s` addr=%#lx size=%d\n", __func__, pkt->cmdString().c_str(),
(long)pkt->getAddr(), pkt->getSize());
PhysicalMemory::doAtomicAccess( pkt );
if ( pkt->needsResponse() ) {
m_readyQ.push_back(pkt);
} else {
delete pkt;
}
m_wr_pktMap.erase( addr );
}
bool PHXSimWrap::recvTiming(PacketPtr pkt)
{
uint64_t addr = pkt->getAddr();
PRINTFN("%s: %s %#lx\n", __func__, pkt->cmdString().c_str(), (long)addr);
pkt->dram_enter_time = curTick();
if ( pkt->isRead() ) {
bool ret = m_memorySystem->AddTransaction( false, addr, 0 );
if ( ! ret ) return false;
assert(m_rd_pktMap.find( addr ) == m_rd_pktMap.end());
m_rd_pktMap[ addr ] = pkt;
} else if ( pkt->isWrite() ) {
bool ret = m_memorySystem->AddTransaction( true, addr, 0 );
if ( ! ret ) return false;
std::multimap< uint64_t, PacketPtr >::iterator it;
it = m_wr_pktMap.find( addr );
assert( it == m_wr_pktMap.end());
m_wr_pktMap.insert( pair<uint64_t, PacketPtr>(addr, pkt) );
} else {
if ( pkt->needsResponse() ) {
pkt->makeTimingResponse();
m_readyQ.push_back( pkt );
} else {
delete pkt;
}
}
return true;
}
Tick BridgeClassicToAMBATLM2<BUSWIDTH>::recvAtomic(PacketPtr pkt)
{
tlm::tlm_generic_payload trans;
// std::cout << "In " << sc_core::sc_object::name() << " at time " << sc_time_stamp() << " request from GEM5 with address=0x" << hex << pkt->getAddr() << dec << " size=" << pkt->getSize() << std::endl;
if (pkt->memInhibitAsserted()) {
return 0;
}
if (pkt->cmd == MemCmd::SwapReq)
{
panic("SwapReq not supported\n");
}
else if (pkt->isRead())
{
assert(!pkt->isWrite());
if (pkt->isLLSC()) {
trackLoadLocked(pkt);
}
// if (pkt->isLLSC())
// {
// panic("isLLSC not yet supported for atomic\n");
// }
trans.set_read();
trans.set_address(pkt->getAddr());
trans.set_data_length(pkt->getSize());
trans.set_data_ptr(pkt->getPtr<unsigned char>());
debug_port->transport_dbg(static_cast<tlm::tlm_generic_payload &>(trans));
unsigned char * data = pkt->getPtr<unsigned char>();
// std::cout << "In " << sc_core::sc_object::name() << " at time " << sc_time_stamp() << " sending a READ response to GEM5 with address=0x" << hex << pkt->getAddr() << dec << " size=" << pkt->getSize();
// std::cout << hex << " and data= [";
// for(unsigned j=0;j<pkt->getSize(); j++)
// std::cout << "0x" << uint32_t(data[j]) << ",";
// std::cout << "]" << dec << std::endl;
}
else if (pkt->isWrite())
{
// std::cout << "isWrite " << std::endl;
if (writeOK(pkt))
{
trans.set_write();
/*if (writeOK(pkt)) {
if (pmemAddr)
memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
assert(!pkt->req->isInstFetch());
}*/
trans.set_address(pkt->getAddr());
trans.set_data_length(pkt->getSize());
trans.set_data_ptr(pkt->getPtr<unsigned char>());
debug_port->transport_dbg(static_cast<tlm::tlm_generic_payload &>(trans));
}
else
std::cout << "recvAtomic !writeOK " << hex << pkt->getAddr() << dec << std::endl;
}
else if (pkt->isInvalidate())
{
//upgrade or invalidate
if (pkt->needsResponse())
{
pkt->makeAtomicResponse();
}
}
else
{
panic("unimplemented");
}
if (pkt->needsResponse())
{
pkt->makeAtomicResponse();
}
return 1000;
}
