void PredicateExpander::expandCheckOpcode(formatted_raw_ostream &OS,
const RecVec &Opcodes) {
assert(!Opcodes.empty() && "Expected at least one opcode to check!");
bool First = true;
if (Opcodes.size() == 1) {
OS << "( ";
expandCheckOpcode(OS, Opcodes[0]);
OS << " )";
return;
}
OS << '(';
increaseIndentLevel();
for (const Record *Rec : Opcodes) {
OS << '\n';
OS.PadToColumn(getIndentLevel() * 2);
if (!First)
OS << (shouldNegate() ? "&& " : "|| ");
expandCheckOpcode(OS, Rec);
First = false;
}
OS << '\n';
decreaseIndentLevel();
OS.PadToColumn(getIndentLevel() * 2);
OS << ')';
}
void PredicateExpander::expandPredicateSequence(formatted_raw_ostream &OS,
const RecVec &Sequence,
bool IsCheckAll) {
assert(!Sequence.empty() && "Found an invalid empty predicate set!");
if (Sequence.size() == 1)
return expandPredicate(OS, Sequence[0]);
// Okay, there is more than one predicate in the set.
bool First = true;
OS << (shouldNegate() ? "!(" : "(");
increaseIndentLevel();
bool OldValue = shouldNegate();
setNegatePredicate(false);
for (const Record *Rec : Sequence) {
OS << '\n';
OS.PadToColumn(getIndentLevel() * 2);
if (!First)
OS << (IsCheckAll ? "&& " : "|| ");
expandPredicate(OS, Rec);
First = false;
}
OS << '\n';
decreaseIndentLevel();
OS.PadToColumn(getIndentLevel() * 2);
OS << ')';
setNegatePredicate(OldValue);
}
/// \brief Emits the comments that are stored in \p DC comment stream.
/// Each comment in the comment stream must end with a newline.
static void emitComments(LLVMDisasmContext *DC,
formatted_raw_ostream &FormattedOS) {
// Flush the stream before taking its content.
DC->CommentStream.flush();
StringRef Comments = DC->CommentsToEmit.str();
// Get the default information for printing a comment.
const MCAsmInfo *MAI = DC->getAsmInfo();
const char *CommentBegin = MAI->getCommentString();
unsigned CommentColumn = MAI->getCommentColumn();
bool IsFirst = true;
while (!Comments.empty()) {
if (!IsFirst)
FormattedOS << '\n';
// Emit a line of comments.
FormattedOS.PadToColumn(CommentColumn);
size_t Position = Comments.find('\n');
FormattedOS << CommentBegin << ' ' << Comments.substr(0, Position);
// Move after the newline character.
Comments = Comments.substr(Position+1);
IsFirst = false;
}
FormattedOS.flush();
// Tell the comment stream that the vector changed underneath it.
DC->CommentsToEmit.clear();
DC->CommentStream.resync();
}
void Disassembler::printInstruction(formatted_raw_ostream &Out,
MachineInstr *Inst, bool PrintTypes) {
unsigned Address = getDebugOffset(Inst->getDebugLoc());
unsigned Size = Inst->getDesc().getSize();
// TODO: replace the Bytes with something memory safe (StringRef??)
uint8_t *Bytes = new uint8_t(Size);
int NumRead = CurSectionMemory->readBytes(Address, Size, Bytes);
if (NumRead < 0) {
printError("Unable to read current section memory!");
return;
}
// Print Address
Out << format("%08" PRIX64 ":", Address);
Out.PadToColumn(12); // 12345678: <- 9 chars + 1 space
// Print Instruction Bytes
for (unsigned i = 0, e = ((Size > 8) ? 8 : Size); i != e; ++i)
Out << format("%02" PRIX8 " ", Bytes[i]);
Out.PadToColumn(40); // 8 bytes (2 char) + 1 space each + 2 spaces
// Print instruction
// NOTE: We could print the "Full" machine instruction version here instead
// of down-converting to MCInst...
if (PrintTypes) {
Inst->print(Out, MC->getTargetMachine(), false);
} else {
MC->getMCInstPrinter()->printInst(Instructions[Address], Out, "");
Out << "\n";
}
// Print the rest of the instruction bytes
unsigned ColCnt = 8;
for (unsigned i = 8, e = Size; i < e; ++i) {
if (ColCnt == 8) {
Out.PadToColumn(12); // 8 bytes (2 char) + 1 space each + 2 spaces
Out << "\n";
ColCnt = 0;
} else {
++ColCnt;
}
Out << format("%02" PRIX8 " ", Bytes[i]);
}
delete Bytes;
}
void MatcherTableEmitter::EmitHistogram(const Matcher *M,
formatted_raw_ostream &OS) {
if (OmitComments)
return;
std::vector<unsigned> OpcodeFreq;
BuildHistogram(M, OpcodeFreq);
OS << " // Opcode Histogram:\n";
for (unsigned i = 0, e = OpcodeFreq.size(); i != e; ++i) {
OS << " // #";
switch ((Matcher::KindTy)i) {
case Matcher::Scope: OS << "OPC_Scope"; break;
case Matcher::RecordNode: OS << "OPC_RecordNode"; break;
case Matcher::RecordChild: OS << "OPC_RecordChild"; break;
case Matcher::RecordMemRef: OS << "OPC_RecordMemRef"; break;
case Matcher::CaptureGlueInput: OS << "OPC_CaptureGlueInput"; break;
case Matcher::MoveChild: OS << "OPC_MoveChild"; break;
case Matcher::MoveParent: OS << "OPC_MoveParent"; break;
case Matcher::CheckSame: OS << "OPC_CheckSame"; break;
case Matcher::CheckChildSame: OS << "OPC_CheckChildSame"; break;
case Matcher::CheckPatternPredicate:
OS << "OPC_CheckPatternPredicate"; break;
case Matcher::CheckPredicate: OS << "OPC_CheckPredicate"; break;
case Matcher::CheckOpcode: OS << "OPC_CheckOpcode"; break;
case Matcher::SwitchOpcode: OS << "OPC_SwitchOpcode"; break;
case Matcher::CheckType: OS << "OPC_CheckType"; break;
case Matcher::SwitchType: OS << "OPC_SwitchType"; break;
case Matcher::CheckChildType: OS << "OPC_CheckChildType"; break;
case Matcher::CheckInteger: OS << "OPC_CheckInteger"; break;
case Matcher::CheckChildInteger: OS << "OPC_CheckChildInteger"; break;
case Matcher::CheckCondCode: OS << "OPC_CheckCondCode"; break;
case Matcher::CheckValueType: OS << "OPC_CheckValueType"; break;
case Matcher::CheckComplexPat: OS << "OPC_CheckComplexPat"; break;
case Matcher::CheckAndImm: OS << "OPC_CheckAndImm"; break;
case Matcher::CheckOrImm: OS << "OPC_CheckOrImm"; break;
case Matcher::CheckFoldableChainNode:
OS << "OPC_CheckFoldableChainNode"; break;
case Matcher::EmitInteger: OS << "OPC_EmitInteger"; break;
case Matcher::EmitStringInteger: OS << "OPC_EmitStringInteger"; break;
case Matcher::EmitRegister: OS << "OPC_EmitRegister"; break;
case Matcher::EmitConvertToTarget: OS << "OPC_EmitConvertToTarget"; break;
case Matcher::EmitMergeInputChains: OS << "OPC_EmitMergeInputChains"; break;
case Matcher::EmitCopyToReg: OS << "OPC_EmitCopyToReg"; break;
case Matcher::EmitNode: OS << "OPC_EmitNode"; break;
case Matcher::MorphNodeTo: OS << "OPC_MorphNodeTo"; break;
case Matcher::EmitNodeXForm: OS << "OPC_EmitNodeXForm"; break;
case Matcher::MarkGlueResults: OS << "OPC_MarkGlueResults"; break;
case Matcher::CompleteMatch: OS << "OPC_CompleteMatch"; break;
}
OS.PadToColumn(40) << " = " << OpcodeFreq[i] << '\n';
}
OS << '\n';
}
static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M,
formatted_raw_ostream &OS, LLVMCodeGenFileType codegen, char **ErrorMessage) {
TargetMachine* TM = unwrap(T);
Module* Mod = unwrap(M);
PassManager pass;
std::string error;
const DataLayout *td = TM->getSubtargetImpl()->getDataLayout();
if (!td) {
error = "No DataLayout in TargetMachine";
*ErrorMessage = strdup(error.c_str());
return true;
}
Mod->setDataLayout(td);
pass.add(new DataLayoutPass());
TargetMachine::CodeGenFileType ft;
switch (codegen) {
case LLVMAssemblyFile:
ft = TargetMachine::CGFT_AssemblyFile;
break;
default:
ft = TargetMachine::CGFT_ObjectFile;
break;
}
if (TM->addPassesToEmitFile(pass, OS, ft)) {
error = "TargetMachine can't emit a file of this type";
*ErrorMessage = strdup(error.c_str());
return true;
}
pass.run(*Mod);
OS.flush();
return false;
}
/// EmitMatcher - Emit bytes for the specified matcher and return
/// the number of bytes emitted.
unsigned MatcherTableEmitter::
EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
formatted_raw_ostream &OS) {
OS.PadToColumn(Indent*2);
switch (N->getKind()) {
case Matcher::Scope: {
const ScopeMatcher *SM = cast<ScopeMatcher>(N);
assert(SM->getNext() == nullptr && "Shouldn't have next after scope");
unsigned StartIdx = CurrentIdx;
// Emit all of the children.
for (unsigned i = 0, e = SM->getNumChildren(); i != e; ++i) {
if (i == 0) {
OS << "OPC_Scope, ";
++CurrentIdx;
} else {
if (!OmitComments) {
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2) << "/*Scope*/ ";
} else
OS.PadToColumn(Indent*2);
}
// We need to encode the child and the offset of the failure code before
// emitting either of them. Handle this by buffering the output into a
// string while we get the size. Unfortunately, the offset of the
// children depends on the VBR size of the child, so for large children we
// have to iterate a bit.
SmallString<128> TmpBuf;
unsigned ChildSize = 0;
unsigned VBRSize = 0;
do {
VBRSize = GetVBRSize(ChildSize);
TmpBuf.clear();
raw_svector_ostream OS(TmpBuf);
formatted_raw_ostream FOS(OS);
ChildSize = EmitMatcherList(SM->getChild(i), Indent+1,
CurrentIdx+VBRSize, FOS);
} while (GetVBRSize(ChildSize) != VBRSize);
assert(ChildSize != 0 && "Should not have a zero-sized child!");
CurrentIdx += EmitVBRValue(ChildSize, OS);
if (!OmitComments) {
OS << "/*->" << CurrentIdx+ChildSize << "*/";
if (i == 0)
OS.PadToColumn(CommentIndent) << "// " << SM->getNumChildren()
<< " children in Scope";
}
OS << '\n' << TmpBuf;
CurrentIdx += ChildSize;
}
// Emit a zero as a sentinel indicating end of 'Scope'.
if (!OmitComments)
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2) << "0, ";
if (!OmitComments)
OS << "/*End of Scope*/";
OS << '\n';
return CurrentIdx - StartIdx + 1;
}
case Matcher::RecordNode:
OS << "OPC_RecordNode,";
if (!OmitComments)
OS.PadToColumn(CommentIndent) << "// #"
<< cast<RecordMatcher>(N)->getResultNo() << " = "
<< cast<RecordMatcher>(N)->getWhatFor();
OS << '\n';
return 1;
case Matcher::RecordChild:
OS << "OPC_RecordChild" << cast<RecordChildMatcher>(N)->getChildNo()
<< ',';
if (!OmitComments)
OS.PadToColumn(CommentIndent) << "// #"
<< cast<RecordChildMatcher>(N)->getResultNo() << " = "
<< cast<RecordChildMatcher>(N)->getWhatFor();
OS << '\n';
return 1;
case Matcher::RecordMemRef:
OS << "OPC_RecordMemRef,\n";
return 1;
case Matcher::CaptureGlueInput:
OS << "OPC_CaptureGlueInput,\n";
return 1;
case Matcher::MoveChild:
OS << "OPC_MoveChild, " << cast<MoveChildMatcher>(N)->getChildNo() << ",\n";
return 2;
case Matcher::MoveParent:
OS << "OPC_MoveParent,\n";
return 1;
case Matcher::CheckSame:
OS << "OPC_CheckSame, "
<< cast<CheckSameMatcher>(N)->getMatchNumber() << ",\n";
return 2;
case Matcher::CheckChildSame:
OS << "OPC_CheckChild"
<< cast<CheckChildSameMatcher>(N)->getChildNo() << "Same, "
<< cast<CheckChildSameMatcher>(N)->getMatchNumber() << ",\n";
return 2;
case Matcher::CheckPatternPredicate: {
StringRef Pred =cast<CheckPatternPredicateMatcher>(N)->getPredicate();
OS << "OPC_CheckPatternPredicate, " << getPatternPredicate(Pred) << ',';
if (!OmitComments)
OS.PadToColumn(CommentIndent) << "// " << Pred;
OS << '\n';
return 2;
}
case Matcher::CheckPredicate: {
TreePredicateFn Pred = cast<CheckPredicateMatcher>(N)->getPredicate();
OS << "OPC_CheckPredicate, " << getNodePredicate(Pred) << ',';
if (!OmitComments)
OS.PadToColumn(CommentIndent) << "// " << Pred.getFnName();
OS << '\n';
return 2;
}
case Matcher::CheckOpcode:
OS << "OPC_CheckOpcode, TARGET_VAL("
<< cast<CheckOpcodeMatcher>(N)->getOpcode().getEnumName() << "),\n";
return 3;
case Matcher::SwitchOpcode:
case Matcher::SwitchType: {
unsigned StartIdx = CurrentIdx;
unsigned NumCases;
if (const SwitchOpcodeMatcher *SOM = dyn_cast<SwitchOpcodeMatcher>(N)) {
OS << "OPC_SwitchOpcode ";
NumCases = SOM->getNumCases();
} else {
OS << "OPC_SwitchType ";
NumCases = cast<SwitchTypeMatcher>(N)->getNumCases();
}
if (!OmitComments)
OS << "/*" << NumCases << " cases */";
OS << ", ";
++CurrentIdx;
// For each case we emit the size, then the opcode, then the matcher.
for (unsigned i = 0, e = NumCases; i != e; ++i) {
const Matcher *Child;
unsigned IdxSize;
if (const SwitchOpcodeMatcher *SOM = dyn_cast<SwitchOpcodeMatcher>(N)) {
Child = SOM->getCaseMatcher(i);
IdxSize = 2; // size of opcode in table is 2 bytes.
} else {
Child = cast<SwitchTypeMatcher>(N)->getCaseMatcher(i);
IdxSize = 1; // size of type in table is 1 byte.
}
// We need to encode the opcode and the offset of the case code before
// emitting the case code. Handle this by buffering the output into a
// string while we get the size. Unfortunately, the offset of the
// children depends on the VBR size of the child, so for large children we
// have to iterate a bit.
SmallString<128> TmpBuf;
unsigned ChildSize = 0;
unsigned VBRSize = 0;
do {
VBRSize = GetVBRSize(ChildSize);
TmpBuf.clear();
raw_svector_ostream OS(TmpBuf);
formatted_raw_ostream FOS(OS);
ChildSize = EmitMatcherList(Child, Indent+1, CurrentIdx+VBRSize+IdxSize,
FOS);
} while (GetVBRSize(ChildSize) != VBRSize);
assert(ChildSize != 0 && "Should not have a zero-sized child!");
if (i != 0) {
if (!OmitComments)
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2);
if (!OmitComments)
OS << (isa<SwitchOpcodeMatcher>(N) ?
"/*SwitchOpcode*/ " : "/*SwitchType*/ ");
}
// Emit the VBR.
CurrentIdx += EmitVBRValue(ChildSize, OS);
if (const SwitchOpcodeMatcher *SOM = dyn_cast<SwitchOpcodeMatcher>(N))
OS << "TARGET_VAL(" << SOM->getCaseOpcode(i).getEnumName() << "),";
else
OS << getEnumName(cast<SwitchTypeMatcher>(N)->getCaseType(i)) << ',';
CurrentIdx += IdxSize;
if (!OmitComments)
OS << "// ->" << CurrentIdx+ChildSize;
OS << '\n';
OS << TmpBuf;
CurrentIdx += ChildSize;
}
// Emit the final zero to terminate the switch.
if (!OmitComments)
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2) << "0, ";
if (!OmitComments)
OS << (isa<SwitchOpcodeMatcher>(N) ?
"// EndSwitchOpcode" : "// EndSwitchType");
OS << '\n';
++CurrentIdx;
return CurrentIdx-StartIdx;
}
case Matcher::CheckType:
assert(cast<CheckTypeMatcher>(N)->getResNo() == 0 &&
"FIXME: Add support for CheckType of resno != 0");
OS << "OPC_CheckType, "
<< getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n";
return 2;
case Matcher::CheckChildType:
OS << "OPC_CheckChild"
<< cast<CheckChildTypeMatcher>(N)->getChildNo() << "Type, "
<< getEnumName(cast<CheckChildTypeMatcher>(N)->getType()) << ",\n";
return 2;
case Matcher::CheckInteger: {
OS << "OPC_CheckInteger, ";
unsigned Bytes=1+EmitVBRValue(cast<CheckIntegerMatcher>(N)->getValue(), OS);
OS << '\n';
return Bytes;
}
case Matcher::CheckChildInteger: {
OS << "OPC_CheckChild" << cast<CheckChildIntegerMatcher>(N)->getChildNo()
<< "Integer, ";
unsigned Bytes=1+EmitVBRValue(cast<CheckChildIntegerMatcher>(N)->getValue(),
OS);
OS << '\n';
return Bytes;
}
case Matcher::CheckCondCode:
OS << "OPC_CheckCondCode, ISD::"
<< cast<CheckCondCodeMatcher>(N)->getCondCodeName() << ",\n";
return 2;
case Matcher::CheckValueType:
OS << "OPC_CheckValueType, MVT::"
<< cast<CheckValueTypeMatcher>(N)->getTypeName() << ",\n";
return 2;
case Matcher::CheckComplexPat: {
const CheckComplexPatMatcher *CCPM = cast<CheckComplexPatMatcher>(N);
const ComplexPattern &Pattern = CCPM->getPattern();
OS << "OPC_CheckComplexPat, /*CP*/" << getComplexPat(Pattern) << ", /*#*/"
<< CCPM->getMatchNumber() << ',';
if (!OmitComments) {
OS.PadToColumn(CommentIndent) << "// " << Pattern.getSelectFunc();
OS << ":$" << CCPM->getName();
for (unsigned i = 0, e = Pattern.getNumOperands(); i != e; ++i)
OS << " #" << CCPM->getFirstResult()+i;
if (Pattern.hasProperty(SDNPHasChain))
OS << " + chain result";
}
OS << '\n';
return 3;
}
case Matcher::CheckAndImm: {
OS << "OPC_CheckAndImm, ";
unsigned Bytes=1+EmitVBRValue(cast<CheckAndImmMatcher>(N)->getValue(), OS);
OS << '\n';
return Bytes;
}
case Matcher::CheckOrImm: {
OS << "OPC_CheckOrImm, ";
unsigned Bytes = 1+EmitVBRValue(cast<CheckOrImmMatcher>(N)->getValue(), OS);
OS << '\n';
return Bytes;
}
case Matcher::CheckFoldableChainNode:
OS << "OPC_CheckFoldableChainNode,\n";
return 1;
case Matcher::EmitInteger: {
int64_t Val = cast<EmitIntegerMatcher>(N)->getValue();
OS << "OPC_EmitInteger, "
<< getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", ";
unsigned Bytes = 2+EmitVBRValue(Val, OS);
OS << '\n';
return Bytes;
}
case Matcher::EmitStringInteger: {
const std::string &Val = cast<EmitStringIntegerMatcher>(N)->getValue();
// These should always fit into one byte.
OS << "OPC_EmitInteger, "
<< getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", "
<< Val << ",\n";
return 3;
}
case Matcher::EmitRegister: {
const EmitRegisterMatcher *Matcher = cast<EmitRegisterMatcher>(N);
const CodeGenRegister *Reg = Matcher->getReg();
// If the enum value of the register is larger than one byte can handle,
// use EmitRegister2.
if (Reg && Reg->EnumValue > 255) {
OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", ";
OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
return 4;
} else {
OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", ";
if (Reg) {
OS << getQualifiedName(Reg->TheDef) << ",\n";
} else {
OS << "0 ";
if (!OmitComments)
OS << "/*zero_reg*/";
OS << ",\n";
}
return 3;
}
}
case Matcher::EmitConvertToTarget:
OS << "OPC_EmitConvertToTarget, "
<< cast<EmitConvertToTargetMatcher>(N)->getSlot() << ",\n";
return 2;
case Matcher::EmitMergeInputChains: {
const EmitMergeInputChainsMatcher *MN =
cast<EmitMergeInputChainsMatcher>(N);
// Handle the specialized forms OPC_EmitMergeInputChains1_0, 1_1, and 1_2.
if (MN->getNumNodes() == 1 && MN->getNode(0) < 3) {
OS << "OPC_EmitMergeInputChains1_" << MN->getNode(0) << ",\n";
return 1;
}
OS << "OPC_EmitMergeInputChains, " << MN->getNumNodes() << ", ";
for (unsigned i = 0, e = MN->getNumNodes(); i != e; ++i)
OS << MN->getNode(i) << ", ";
OS << '\n';
return 2+MN->getNumNodes();
}
case Matcher::EmitCopyToReg:
OS << "OPC_EmitCopyToReg, "
<< cast<EmitCopyToRegMatcher>(N)->getSrcSlot() << ", "
<< getQualifiedName(cast<EmitCopyToRegMatcher>(N)->getDestPhysReg())
<< ",\n";
return 3;
case Matcher::EmitNodeXForm: {
const EmitNodeXFormMatcher *XF = cast<EmitNodeXFormMatcher>(N);
OS << "OPC_EmitNodeXForm, " << getNodeXFormID(XF->getNodeXForm()) << ", "
<< XF->getSlot() << ',';
if (!OmitComments)
OS.PadToColumn(CommentIndent) << "// "<<XF->getNodeXForm()->getName();
OS <<'\n';
return 3;
}
case Matcher::EmitNode:
case Matcher::MorphNodeTo: {
const EmitNodeMatcherCommon *EN = cast<EmitNodeMatcherCommon>(N);
OS << (isa<EmitNodeMatcher>(EN) ? "OPC_EmitNode" : "OPC_MorphNodeTo");
OS << ", TARGET_VAL(" << EN->getOpcodeName() << "), 0";
if (EN->hasChain()) OS << "|OPFL_Chain";
if (EN->hasInFlag()) OS << "|OPFL_GlueInput";
if (EN->hasOutFlag()) OS << "|OPFL_GlueOutput";
if (EN->hasMemRefs()) OS << "|OPFL_MemRefs";
if (EN->getNumFixedArityOperands() != -1)
OS << "|OPFL_Variadic" << EN->getNumFixedArityOperands();
OS << ",\n";
OS.PadToColumn(Indent*2+4) << EN->getNumVTs();
if (!OmitComments)
OS << "/*#VTs*/";
OS << ", ";
for (unsigned i = 0, e = EN->getNumVTs(); i != e; ++i)
OS << getEnumName(EN->getVT(i)) << ", ";
OS << EN->getNumOperands();
if (!OmitComments)
OS << "/*#Ops*/";
OS << ", ";
unsigned NumOperandBytes = 0;
for (unsigned i = 0, e = EN->getNumOperands(); i != e; ++i)
NumOperandBytes += EmitVBRValue(EN->getOperand(i), OS);
if (!OmitComments) {
// Print the result #'s for EmitNode.
if (const EmitNodeMatcher *E = dyn_cast<EmitNodeMatcher>(EN)) {
if (unsigned NumResults = EN->getNumVTs()) {
OS.PadToColumn(CommentIndent) << "// Results =";
unsigned First = E->getFirstResultSlot();
for (unsigned i = 0; i != NumResults; ++i)
OS << " #" << First+i;
}
}
OS << '\n';
if (const MorphNodeToMatcher *SNT = dyn_cast<MorphNodeToMatcher>(N)) {
OS.PadToColumn(Indent*2) << "// Src: "
<< *SNT->getPattern().getSrcPattern() << " - Complexity = "
<< SNT->getPattern().getPatternComplexity(CGP) << '\n';
OS.PadToColumn(Indent*2) << "// Dst: "
<< *SNT->getPattern().getDstPattern() << '\n';
}
} else
OS << '\n';
return 6+EN->getNumVTs()+NumOperandBytes;
}
case Matcher::MarkGlueResults: {
const MarkGlueResultsMatcher *CFR = cast<MarkGlueResultsMatcher>(N);
OS << "OPC_MarkGlueResults, " << CFR->getNumNodes() << ", ";
unsigned NumOperandBytes = 0;
for (unsigned i = 0, e = CFR->getNumNodes(); i != e; ++i)
NumOperandBytes += EmitVBRValue(CFR->getNode(i), OS);
OS << '\n';
return 2+NumOperandBytes;
}
case Matcher::CompleteMatch: {
const CompleteMatchMatcher *CM = cast<CompleteMatchMatcher>(N);
OS << "OPC_CompleteMatch, " << CM->getNumResults() << ", ";
unsigned NumResultBytes = 0;
for (unsigned i = 0, e = CM->getNumResults(); i != e; ++i)
NumResultBytes += EmitVBRValue(CM->getResult(i), OS);
OS << '\n';
if (!OmitComments) {
OS.PadToColumn(Indent*2) << "// Src: "
<< *CM->getPattern().getSrcPattern() << " - Complexity = "
<< CM->getPattern().getPatternComplexity(CGP) << '\n';
OS.PadToColumn(Indent*2) << "// Dst: "
<< *CM->getPattern().getDstPattern();
}
OS << '\n';
return 2 + NumResultBytes;
}
}
llvm_unreachable("Unreachable");
}
void DCAnnotationWriter::printInfoComment(const Value &V,
formatted_raw_ostream &OS) {
if (!isa<Instruction>(&V))
return;
const SmallVectorImpl<DCTranslatedInst::ValueInfo> *Infos = 0;
DTIT.getInstsForValue(V, Infos);
if (Infos == 0)
return;
for (int vii = 0, vie = Infos->size(); vii != vie; ++vii) {
if (vii)
OS << "\n";
const MCDecodedInst *MCDI = (*Infos)[vii].DecodedInst;
uint64_t Addr = MCDI->Address;
bool printMI = false;
const DCTranslatedInst::ValueInfo &VI = (*Infos)[vii];
OS.PadToColumn(48) << " ; ";
switch (VI.OpKind) {
default:
llvm_unreachable("Unknown translated operand type!");
case DCTranslatedInst::ValueInfo::ImpUseKind: {
OS << "imp-use ";
OS << MRI.getName(VI.RegNo);
break;
}
case DCTranslatedInst::ValueInfo::ImpDefKind: {
OS << "imp-def ";
OS << MRI.getName(VI.RegNo);
break;
}
case DCTranslatedInst::ValueInfo::RegUseKind: {
OS << " use ";
printMI = true;
break;
}
case DCTranslatedInst::ValueInfo::RegDefKind: {
OS << " def ";
printMI = true;
break;
}
case DCTranslatedInst::ValueInfo::ImmOpKind: {
OS << " imm ";
printMI = true;
break;
}
case DCTranslatedInst::ValueInfo::CustomOpKind: {
OS << " op-use ";
if (MCDI)
IP.printMachineOperand(&MCDI->Inst, VI.CustomOpType,VI.MIOperandNo,OS);
break;
}
}
if (printMI) {
if (MCDI) {
const MCOperand &MO = MCDI->Inst.getOperand(VI.MIOperandNo);
if (MO.isReg())
OS << MRI.getName(MO.getReg());
else if (MO.isImm())
OS << MO.getImm();
}
OS.PadToColumn(72);
OS << " MO#" << VI.MIOperandNo;
}
OS.PadToColumn(79);
OS << " @";
OS.write_hex(Addr);
if (MCDI)
OS << ": ";
IP.printInst(&MCDI->Inst, OS.PadToColumn(90), "");
}
}
void PredicateExpander::expandPredicate(formatted_raw_ostream &OS,
const Record *Rec) {
OS.flush();
unsigned ColNum = getIndentLevel() * 2;
if (OS.getColumn() < ColNum)
OS.PadToColumn(ColNum);
if (Rec->isSubClassOf("MCTrue")) {
if (shouldNegate())
return expandFalse(OS);
return expandTrue(OS);
}
if (Rec->isSubClassOf("MCFalse")) {
if (shouldNegate())
return expandTrue(OS);
return expandFalse(OS);
}
if (Rec->isSubClassOf("CheckNot")) {
flipNegatePredicate();
expandPredicate(OS, Rec->getValueAsDef("Pred"));
flipNegatePredicate();
return;
}
if (Rec->isSubClassOf("CheckIsRegOperand"))
return expandCheckIsRegOperand(OS, Rec->getValueAsInt("OpIndex"));
if (Rec->isSubClassOf("CheckIsImmOperand"))
return expandCheckIsImmOperand(OS, Rec->getValueAsInt("OpIndex"));
if (Rec->isSubClassOf("CheckRegOperand"))
return expandCheckRegOperand(OS, Rec->getValueAsInt("OpIndex"),
Rec->getValueAsDef("Reg"));
if (Rec->isSubClassOf("CheckInvalidRegOperand"))
return expandCheckInvalidRegOperand(OS, Rec->getValueAsInt("OpIndex"));
if (Rec->isSubClassOf("CheckImmOperand"))
return expandCheckImmOperand(OS, Rec->getValueAsInt("OpIndex"),
Rec->getValueAsInt("ImmVal"));
if (Rec->isSubClassOf("CheckImmOperand_s"))
return expandCheckImmOperand(OS, Rec->getValueAsInt("OpIndex"),
Rec->getValueAsString("ImmVal"));
if (Rec->isSubClassOf("CheckSameRegOperand"))
return expandCheckSameRegOperand(OS, Rec->getValueAsInt("FirstIndex"),
Rec->getValueAsInt("SecondIndex"));
if (Rec->isSubClassOf("CheckNumOperands"))
return expandCheckNumOperands(OS, Rec->getValueAsInt("NumOps"));
if (Rec->isSubClassOf("CheckPseudo"))
return expandCheckPseudo(OS, Rec->getValueAsListOfDefs("ValidOpcodes"));
if (Rec->isSubClassOf("CheckOpcode"))
return expandCheckOpcode(OS, Rec->getValueAsListOfDefs("ValidOpcodes"));
if (Rec->isSubClassOf("CheckAll"))
return expandPredicateSequence(OS, Rec->getValueAsListOfDefs("Predicates"),
/* AllOf */ true);
if (Rec->isSubClassOf("CheckAny"))
return expandPredicateSequence(OS, Rec->getValueAsListOfDefs("Predicates"),
/* AllOf */ false);
if (Rec->isSubClassOf("CheckFunctionPredicate"))
return expandCheckFunctionPredicate(
OS, Rec->getValueAsString("MCInstFnName"),
Rec->getValueAsString("MachineInstrFnName"));
if (Rec->isSubClassOf("CheckNonPortable"))
return expandCheckNonPortable(OS, Rec->getValueAsString("CodeBlock"));
if (Rec->isSubClassOf("TIIPredicate"))
return expandTIIFunctionCall(OS, Rec->getValueAsString("TargetName"),
Rec->getValueAsString("FunctionName"));
llvm_unreachable("No known rules to expand this MCInstPredicate");
}
/// Optimize merged modules using various IPO passes
bool LTOCodeGenerator::generateAssemblyCode(formatted_raw_ostream& out,
std::string& errMsg)
{
if ( this->determineTarget(errMsg) )
return true;
// mark which symbols can not be internalized
this->applyScopeRestrictions();
Module* mergedModule = _linker.getModule();
// If target supports exception handling then enable it now.
switch (_target->getTargetAsmInfo()->getExceptionHandlingType()) {
case ExceptionHandling::Dwarf:
llvm::DwarfExceptionHandling = true;
break;
case ExceptionHandling::SjLj:
llvm::SjLjExceptionHandling = true;
break;
case ExceptionHandling::None:
break;
default:
assert (0 && "Unknown exception handling model!");
}
// if options were requested, set them
if ( !_codegenOptions.empty() )
cl::ParseCommandLineOptions(_codegenOptions.size(),
(char**)&_codegenOptions[0]);
// Instantiate the pass manager to organize the passes.
PassManager passes;
// Start off with a verification pass.
passes.add(createVerifierPass());
// Add an appropriate TargetData instance for this module...
passes.add(new TargetData(*_target->getTargetData()));
createStandardLTOPasses(&passes, /*Internalize=*/ false, !DisableInline,
/*VerifyEach=*/ false);
// Make sure everything is still good.
passes.add(createVerifierPass());
FunctionPassManager* codeGenPasses =
new FunctionPassManager(new ExistingModuleProvider(mergedModule));
codeGenPasses->add(new TargetData(*_target->getTargetData()));
ObjectCodeEmitter* oce = NULL;
switch (_target->addPassesToEmitFile(*codeGenPasses, out,
TargetMachine::AssemblyFile,
CodeGenOpt::Aggressive)) {
case FileModel::MachOFile:
oce = AddMachOWriter(*codeGenPasses, out, *_target);
break;
case FileModel::ElfFile:
oce = AddELFWriter(*codeGenPasses, out, *_target);
break;
case FileModel::AsmFile:
break;
case FileModel::Error:
case FileModel::None:
errMsg = "target file type not supported";
return true;
}
if (_target->addPassesToEmitFileFinish(*codeGenPasses, oce,
CodeGenOpt::Aggressive)) {
errMsg = "target does not support generation of this file type";
return true;
}
// Run our queue of passes all at once now, efficiently.
passes.run(*mergedModule);
// Run the code generator, and write assembly file
codeGenPasses->doInitialization();
for (Module::iterator
it = mergedModule->begin(), e = mergedModule->end(); it != e; ++it)
if (!it->isDeclaration())
codeGenPasses->run(*it);
codeGenPasses->doFinalization();
out.flush();
return false; // success
}