void
SpiTriggerRxProcessing(void)
{
// Trigger Rx processing
SpiPauseSpi();
DEASSERT_CS();
// The magic number that resides at the end of the TX/RX buffer (1 byte after
// the allocated size) for the purpose of detection of the overrun. If the
// magic number is overwritten - buffer overrun occurred - and we will stuck
// here forever!
if (sSpiInformation.pRxPacket[CC3000_RX_BUFFER_SIZE - 1] != CC3000_BUFFER_MAGIC_NUMBER)
{
while (1)
;
}
sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
sSpiInformation.SPIRxHandler(sSpiInformation.pRxPacket + SPI_HEADER_SIZE);
}
//*****************************************************************************
//
//! This function enter point for write flow
//!
//! \param SpiTriggerRxProcessing
//!
//! \return none
//!
//! \brief The function triggers a user provided callback for
//
//*****************************************************************************
void SpiTriggerRxProcessing(void)
{
//
// Trigger Rx processing
//
SpiPauseSpi();
negate_cs();
// The magic number that resides at the end of the TX/RX buffer (1 byte after
// the allocated size) for the purpose of detection of the overrun.
// If the magic number is overriten - a buffer overrun has occurred - and we
// will stay here forever!
if (sSpiInformation.pRxPacket[CC3000_RX_BUFFER_SIZE - 1]
!= CC3000_BUFFER_MAGIC_NUMBER) {
lSer.println ("Error: buffer overwritten !");
while (1);
}
sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
sSpiInformation.SPIRxHandler(sSpiInformation.pRxPacket + SPI_HEADER_SIZE);
}
void SpiTriggerRxProcessing(void)
{
DEBUGPRINT_F("\tCC3000: SpiTriggerRxProcessing\n\r");
/* Trigger Rx processing */
SpiPauseSpi();
CC3000_DEASSERT_CS;
//DEBUGPRINT_F("Magic?\n\r");
/* The magic number that resides at the end of the TX/RX buffer (1 byte after the allocated size)
* for the purpose of detection of the overrun. If the magic number is overriten - buffer overrun
* occurred - and we will stuck here forever! */
if (sSpiInformation.pRxPacket[CC3000_RX_BUFFER_SIZE - 1] != CC3000_BUFFER_MAGIC_NUMBER)
{
/* You've got problems if you're here! */
DEBUGPRINT_F("\tCC3000: ERROR - magic number missing!\n\r");
while (1);
}
//DEBUGPRINT_F("OK!\n\r");
sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
sSpiInformation.SPIRxHandler(sSpiInformation.pRxPacket + SPI_HEADER_SIZE);
}
/**
* @brief The handler for Interrupt that is generated on SPI at the end of DMA
transfer.
* @param None
* @retval None
*/
void SPI_DMA_IntHandler(void)
{
unsigned long ucTxFinished, ucRxFinished;
unsigned short data_to_recv = 0;
ucTxFinished = DMA_GetFlagStatus(CC3000_SPI_TX_DMA_TCFLAG );
ucRxFinished = DMA_GetFlagStatus(CC3000_SPI_RX_DMA_TCFLAG );
switch(sSpiInformation.ulSpiState)
{
case eSPI_STATE_READ_IRQ:
// Both Done
if (ucTxFinished && ucRxFinished)
{
/* Clear SPI_DMA Interrupt Pending Flags */
DMA_ClearFlag(CC3000_SPI_TX_DMA_TCFLAG | CC3000_SPI_RX_DMA_TCFLAG);
sSpiInformation.ulSpiState = eSPI_STATE_READ_PROCEED;
uint16_t *pnetlen = (uint16_t *) &sSpiInformation.pRxPacket[READ_OFFSET_TO_LENGTH];
data_to_recv = ntohs(*pnetlen);
if (data_to_recv)
{
/* We will read ARRAY_SIZE(spi_readCommand) + data_to_recv. is it odd? */
if ((data_to_recv + arraySize(spi_readCommand)) & 1)
{
/* Odd so make it even */
data_to_recv++;
}
/* Read the whole payload in at the beginning of the buffer
* Will it fit?
*/
SPARK_ASSERT(data_to_recv <= arraySize(wlan_rx_buffer));
SpiIO(eRead,sSpiInformation.pRxPacket,data_to_recv, FALSE);
}
}
break;
case eSPI_STATE_READ_PROCEED:
//
// All the data was read - finalize handling by switching to the task
// and calling from task Event Handler
//
if (ucRxFinished)
{
/* Clear SPI_DMA Interrupt Pending Flags */
DMA_ClearFlag(CC3000_SPI_TX_DMA_TCFLAG | CC3000_SPI_RX_DMA_TCFLAG);
SpiPauseSpi();
SetState(eSPI_STATE_IDLE, eDeAssert);
WARN("CC3000 DmaHandler release read spi bus");
// Call out to the Unsolicited handler
// It will handle the event or leave it there for an outstanding opcode
// It it handles it the it Will resume the SPI ISR
// It it dose not handles it and there are not outstanding Opcodes the it Will resume the SPI ISR
sSpiInformation.SPIRxHandler(sSpiInformation.pRxPacket);
}
break;
case eSPI_STATE_FIRST_WRITE:
case eSPI_STATE_WRITE_PROCEED:
if (ucTxFinished)
{
/* Loop until SPI busy */
while (SPI_I2S_GetFlagStatus(CC3000_SPI, SPI_I2S_FLAG_BSY ) != RESET)
{
}
/* Clear SPI_DMA Interrupt Pending Flags */
DMA_ClearFlag(CC3000_SPI_TX_DMA_TCFLAG | CC3000_SPI_RX_DMA_TCFLAG);
if ( sSpiInformation.ulSpiState == eSPI_STATE_FIRST_WRITE)
{
sSpiInformation.ulSpiState = eSPI_STATE_WRITE_PROCEED;
}
else
{
SetState(eSPI_STATE_IDLE, eDeAssert);
WARN("CC3000 DmaHandler release write spi bus");
}
}
break;
default:
INVALID_CASE(sSpiInformation.ulSpiState);
break;
}
}
