void ADC12ISR(void)
{
static uint16_t index = 0;
switch(__even_in_range(ADC12IV,34))
{
case 0: break; //Vector 0: No interrupt
case 2: break; //Vector 2: ADC overflow
case 4: break; //Vector 4: ADC timing overflow
case 6: break; //Vector 6: ADC12IFG0
case 8: break; //Vector 8: ADC12IFG1
case 10: break; //Vector 10: ADC12IFG2
case 12: //Vector 12: ADC12IFG3
//Move A0 results, IFG is cleared
A0results[index] =
ADC12_A_getResults(ADC12_A_BASE,
ADC12_A_MEMORY_0);
//Move A1 results, IFG is cleared
A1results[index] =
ADC12_A_getResults(ADC12_A_BASE,
ADC12_A_MEMORY_1);
//Move A2 results, IFG is cleared
A2results[index] =
ADC12_A_getResults(ADC12_A_BASE,
ADC12_A_MEMORY_2);
//Move A3 results, IFG is cleared
A3results[index] =
ADC12_A_getResults(ADC12_A_BASE,
ADC12_A_MEMORY_3);
//Increment results index, modulo; Set BREAKPOINT here
index++;
if(index == 8)
{
(index = 0);
}
case 14: break; //Vector 14: ADC12IFG4
case 16: break; //Vector 16: ADC12IFG5
case 18: break; //Vector 18: ADC12IFG6
case 20: break; //Vector 20: ADC12IFG7
case 22: break; //Vector 22: ADC12IFG8
case 24: break; //Vector 24: ADC12IFG9
case 26: break; //Vector 26: ADC12IFG10
case 28: break; //Vector 28: ADC12IFG11
case 30: break; //Vector 30: ADC12IFG12
case 32: break; //Vector 32: ADC12IFG13
case 34: break; //Vector 34: ADC12IFG14
default: break;
}
}
uint16_t Flex::flex() const
{
ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_4, ADC12_A_SINGLECHANNEL);
while(!ADC12_A_getInterruptStatus(ADC12_A_BASE, ADC12_A_IFG4));
ADC12_A_clearInterrupt(ADC12_A_BASE, ADC12_A_IFG4);
return ADC12_A_getResults(ADC12_A_BASE, ADC12_A_MEMORY_4);
}
uint16_t ADC12_SingleSample(void)
{
uint16_t temp=0;
ADC12_A_startConversion(ADC12_A_BASE,
ADC12_A_MEMORY_3,
ADC12_A_SINGLECHANNEL);
while(!(ADC12_A_getInterruptStatus(ADC12_A_BASE,ADC12_A_IFG3)));
temp = ADC12_A_getResults(ADC12_A_BASE,ADC12_A_MEMORY_3);
ADC12_A_clearInterrupt(ADC12_A_BASE,ADC12_A_IFG3);
return temp;
}
