static VOID
TSP_PowerOn(VOID)
{
    TSPMSG((_T("[TSP] ++TSP_PowerOn()\r\n")));

    g_pADCReg->ADCDLY = ADC_DELAY(TSP_ADC_DELAY);

    g_pADCReg->ADCCON = RESSEL_12BIT | PRESCALER_EN | PRESCALER_VAL(TSP_ADC_PRESCALER) | STDBM_NORMAL;
    
    g_pADCReg->ADCTSC = ADCTSC_WAIT_PENDOWN;
    g_pADCReg->ADCCLRINT = CLEAR_ADC_INT;
    g_pADCReg->ADCCLRWK = CLEAR_ADCWK_INT;

    g_SampleTick_Low = TSP_TIMER_CNT_LOW;
    g_SampleTick_High = TSP_TIMER_CNT_HIGH;

    // Set Divider MUX for Timer3
    SET_TIMER3_DIVIDER_MUX(g_pPWMReg, TSP_TIMER_DIVIDER);    

    g_pPWMReg->TCNTB3  = g_SampleTick_Low;

    // timer3 interrupt disable
    g_pPWMReg->TINT_CSTAT = TINT_CSTAT_INTMASK(g_pPWMReg->TINT_CSTAT) & ~TIMER3_INTERRUPT_ENABLE;

    // timer3 interrupt status clear
    g_pPWMReg->TINT_CSTAT = TINT_CSTAT_INTMASK(g_pPWMReg->TINT_CSTAT) | TIMER3_PENDING_CLEAR;

    TSPMSG((_T("[TSP] --TSP_PowerOn()\r\n")));
}
static VOID
TSP_PowerOn(VOID)
{
	TSPMSG((_T("[TSP] ++TSP_PowerOn()\r\n")));

	g_pADCReg->ADCDLY = ADC_DELAY(TSP_ADC_DELAY);
	g_pADCReg->ADCCON = PRESCALER_EN | PRESCALER_VAL(TSP_ADC_PRESCALER);
	g_pADCReg->ADCTSC = ADCTSC_WAIT_PENDOWN;
	g_pADCReg->ADCCLRINT = CLEAR_ADC_INT;
	g_pADCReg->ADCCLRWK = CLEAR_ADCWK_INT;

	g_SampleTick_Low = TSP_TIMER_CNT_LOW;
	g_SampleTick_High = TSP_TIMER_CNT_HIGH;

	// Set Divider MUX for Timer3
	switch(TSP_TIMER_DIVIDER)
	{
	case 1:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (0<<12);
		break;
	case 2:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (1<<12);
		break;
	case 4:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (2<<12);
		break;
	case 8:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (3<<12);
		break;
	case 16:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (4<<12);
		break;
	default:
		g_pPWMReg->TCFG1 = (g_pPWMReg->TCFG1 & ~(0xf<<12)) | (0<<12);
		break;
	}

	g_pPWMReg->TCNTB3  = g_SampleTick_Low;

	// timer3 interrupt disable
	//g_pPWMReg->TINT_CSTAT &= ~(1<<3);	// Do not use OR/AND operation on TINTC_CSTAT
	g_pPWMReg->TINT_CSTAT = TINT_CSTAT_INTMASK(g_pPWMReg->TINT_CSTAT) & ~TIMER3_INTERRUPT_ENABLE;

	// timer3 interrupt status clear
	//g_pPWMReg->TINT_CSTAT |= (1<<8);		// Do not use OR/AND operation on TINTC_CSTAT
	g_pPWMReg->TINT_CSTAT = TINT_CSTAT_INTMASK(g_pPWMReg->TINT_CSTAT) | TIMER3_PENDING_CLEAR;

	TSPMSG((_T("[TSP] --TSP_PowerOn()\r\n")));
}