void ARMul_FixCPSR(ARMul_State *state, ARMword instr, ARMword rhs) {state->Cpsr = CPSR ; if (state->Bank==USERBANK) { /* Only write flags in user mode */ if (BIT(19)) { SETCC(state->Cpsr,rhs) ; } } else { /* Not a user mode */ if (BITS(16,19)==9) SETPSR(state->Cpsr,rhs) ; else if (BIT(16)) SETINTMODE(state->Cpsr,rhs) ; else if (BIT(19)) SETCC(state->Cpsr,rhs) ; } ARMul_CPSRAltered(state) ; }
void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); //chy 2006-02-16 , should not consider system mode, don't conside 26bit mode if (state->Mode != USER26MODE && state->Mode != USER32MODE ) { /* In user mode, only write flags. */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); if (BIT (17)) SETPSR_X (state->Cpsr, rhs); if (BIT (18)) SETPSR_S (state->Cpsr, rhs); } if (BIT (19)) SETPSR_F (state->Cpsr, rhs); ARMul_CPSRAltered (state); }
void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); if (state->Mode != USER26MODE && state->Mode != USER32MODE) { /* In user mode, only write flags. */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); if (BIT (17)) SETPSR_X (state->Cpsr, rhs); if (BIT (18)) SETPSR_S (state->Cpsr, rhs); } if (BIT (19)) SETPSR_F (state->Cpsr, rhs); ARMul_CPSRAltered (state); }
void ARMul_SetCPSR (ARMul_State * state, ARMword value) { state->Cpsr = value; ARMul_CPSRAltered (state); }
void ARMul_SetCPSR(ARMul_State *state, ARMword value) {state->Cpsr = CPSR ; SETPSR(state->Cpsr,value) ; ARMul_CPSRAltered(state) ; }
void ARMul_Reset (ARMul_State * state) { //fprintf(stderr,"armul_reset 0: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); state->NextInstr = 0; if (state->prog32Sig) { state->Reg[15] = 0; state->Cpsr = INTBITS | SVC32MODE; state->Mode = SVC32MODE; } else { state->Reg[15] = R15INTBITS | SVC26MODE; state->Cpsr = INTBITS | SVC26MODE; state->Mode = SVC26MODE; } //fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); ARMul_CPSRAltered (state); state->Bank = SVCBANK; FLUSHPIPE; state->EndCondition = 0; state->ErrorCode = 0; //fprintf(stderr,"armul_reset 2: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); state->NresetSig = HIGH; state->NfiqSig = HIGH; state->NirqSig = HIGH; state->NtransSig = (state->Mode & 3) ? HIGH : LOW; state->abortSig = LOW; state->AbortAddr = 1; state->NumInstrs = 0; state->NumNcycles = 0; state->NumScycles = 0; state->NumIcycles = 0; state->NumCcycles = 0; state->NumFcycles = 0; //fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); mmu_reset (state); //fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); //mem_reset (state); /* move to memory/ram.c */ //fprintf(stderr,"armul_reset 5: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode); /*remove later. walimis 03.7.17 */ //io_reset(state); //lcd_disable(state); /*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will *be configured in skyeye_option_init and it is called after ARMul_NewState*/ state->tea_break_ok = 0; state->tea_break_addr = 0; state->tea_pc = 0; #ifdef DBCT if (!skyeye_config.no_dbct) { //teawater add for arm2x86 2005.02.14------------------------------------------- if (arm2x86_init (state)) { printf ("SKYEYE: arm2x86_init error\n"); skyeye_exit (-1); } //AJ2D-------------------------------------------------------------------------- } #endif }