void tc0_tc1_interval_init(void) { /* Cfg PA28(TCLK1), and PA0 (TIOA0) as peripheral B */ AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, AT91C_PA28_TCLK1|AT91C_PA0_TIOA0 ); /* Enable peripheral Clock for TC0 and TC1 */ AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_TC0)); AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_TC1)); /* Enable Clock for TC0 and TC1 */ tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN; tcb->TCB_TC1.TC_CCR = AT91C_TC_CLKEN; /* Connect TCLK1 to XC1, TIOA1 to XC0, so TC0 and 1 are chained */ tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC0XC0S); tcb->TCB_BMR |= (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC0XC0S_TIOA1); /*TC1 is set to waveform mode, 128 divider, 50% dutycycle waveform*/ //WAVSEL=10, RC=128, tcb->TCB_TC1.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE | //runs from XC1, waveform mode AT91C_TC_WAVESEL_UP_AUTO | //up counting and auto reset on RC compare AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR | //RA compare sets TIOA1, RC compare clears TIOA AT91C_TC_BEEVT_NONE | AT91C_TC_BCPB_NONE | //TIOB1 external event not used, RB compare not rounted out AT91C_TC_EEVT_TIOB | AT91C_TC_ETRGEDG_NONE | //External event set to TIOB1, but not used (None edge) AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR; //SW trigger resets TIOA, TIOB tcb->TCB_TC1.TC_RC = 31;//128 divider, tcb->TCB_TC1.TC_RA = 16;//50 duty cycle tcb->TCB_TC1.TC_RB = 0xFFFF;//RB setting is useless since RB not used at all /*TC0 is set to waveform mode, 65536 divider, 50% dutycycle waveform*/ tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC0 | AT91C_TC_WAVE | //runs from XC0, waveform mode AT91C_TC_WAVESEL_UP | //up counting and auto reset on 0xFFFF compare AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR | //RA compare sets TIOA0, RC compare clears TIOA0 AT91C_TC_BEEVT_NONE | AT91C_TC_BCPB_NONE | //TIOB1 external event not used, RB compare not rounted out AT91C_TC_EEVT_TIOB | AT91C_TC_ETRGEDG_NONE | //External event set to TIOB1, but not used (None edge) AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR; //SW trigger resets TIOA, TIOB tcb->TCB_TC0.TC_RC = 0xFFFE;//no use at all tcb->TCB_TC0.TC_RA = 32769;//50 duty cycle for RA compare tcb->TCB_TC0.TC_RB = 0xFFFF;//RB setting is useless since RB not used at all tcb->TCB_TC0.TC_IDR = 0xFF; //first disable all TC0 interrupts tcb->TCB_TC0.TC_IER = AT91C_TC_COVFS;//Enable the counter overflow interrupt tcb->TCB_BCR = 1;/* Reset to start timers */ /*register the interrupt handler*/ AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_TC0, OPENPCD_IRQ_PRIO_TC0, AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE, &tc0_irq); AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_TC0); proc_status = IDLE; params_to_proc = NULL; }
void tc_fdt_init(void) { AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, AT91C_PA15_TF, AT91C_PA26_TIOA2 | AT91C_PA27_TIOB2); AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_TC2)); /* Enable Clock for TC2 */ tcfdt->TC_CCR = AT91C_TC_CLKEN; /* Clock XC1, Wave Mode, No automatic reset on RC comp * TIOA2 in RA comp = set, TIOA2 on RC comp = clear, * TIOA2 on EEVT = clear, TIOA2 on SWTRG = clear, * TIOB2 as input, EEVT = TIOB2, Reset/Trigger on EEVT */ tcfdt->TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP | AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR | AT91C_TC_AEEVT_CLEAR | AT91C_TC_ASWTRG_CLEAR | AT91C_TC_BEEVT_NONE | AT91C_TC_BCPB_NONE | AT91C_TC_EEVT_TIOB | AT91C_TC_ETRGEDG_FALLING | AT91C_TC_ENETRG | AT91C_TC_CPCSTOP ; tcfdt->TC_RC = 0xffff; /* Reset to start timers */ tcb->TCB_BCR = 1; AT91F_AIC_ConfigureIt(AT91C_ID_TC2, OPENPCD_IRQ_PRIO_TC_FDT, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, (THandler)&tc_fdt_irq); tcfdt->TC_IER = AT91C_TC_CPCS | AT91C_TC_ETRGS; AT91F_AIC_ClearIt(AT91C_ID_TC2); AT91F_AIC_EnableIt(AT91C_ID_TC2); }
//*-------------------------------------------------------------------------------------- //* Function Name : Main //* Object : Software entry point //* Input Parameters : none. //* Output Parameters : none. //*-------------------------------------------------------------------------------------- int main() { int i; // First, enable the clock of the PIO AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ) ; // then, we configure the PIO Lines corresponding to LED1 to LED4 // to be outputs. No need to set these pins to be driven by the PIO because it is GPIO pins only. AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, LED_MASK ) ; // Clear the LED's. On the EB55 we must apply a "1" to turn off LEDs AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_MASK ) ; //* Init timer interrupt timer_init(); // Loop forever for (;;) { // Once a Shot on each led for ( i=0 ; i < NB_LEB ; i++ ) { AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[i]); wait(); AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[i] ); wait(); } // Once a Shot on each led for ( i = (NB_LEB - 1) ; i >= 0 ; i-- ) { AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[i]); wait(); AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[i]); wait(); } } }
int main (void) { int i; // Enable the Clock of the PIO AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_PIOA); // Configure the PIO Lines corresponding to LED1..LED4 as Outputs AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, LED_MASK); // Clear the LED's. On the Board we must apply a "1" to turn off LEDs AT91F_PIO_SetOutput(AT91C_BASE_PIOA, LED_MASK); // Loop forever for (;;) { for (i = 0; i < NB_LED; i++) { AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, led_mask[i]); wait(); AT91F_PIO_SetOutput (AT91C_BASE_PIOA, led_mask[i]); wait(); } for (i = (NB_LED - 1); i >= 0; i--) { AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, led_mask[i]); wait(); AT91F_PIO_SetOutput (AT91C_BASE_PIOA, led_mask[i]); wait(); } } }
static int setupHardware( void ) { // When using the JTAG debugger the hardware is not always initialised to // the correct default state. This line just ensures that this does not // cause all interrupts to be masked at the start. AT91C_BASE_AIC->AIC_EOICR = 0; // Enable the peripheral clock. AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, (1 << AT91C_ID_PIOA) | //Enable Clock for PIO (1 << AT91C_ID_IRQ0) | //Enable Clock for IRQ0 (1 << AT91C_ID_PWMC) | //Enable Clock for the PWM controller (1 << AT91C_ID_US0) | //USART0 (1 << AT91C_ID_US1) //USART1 ); // Enable reset-button AT91F_RSTSetMode( AT91C_BASE_RSTC , AT91C_RSTC_URSTEN ); if (!initUsart()) return 0; if (!vInitUSBInterface()) return 0; init_serial(); rtc_init(); InitLoggerHardware(); return 1; }
// ---------------------------------------------------------------------------- void xpcc::at91::Uart0::setBaudrate(uint32_t baudrate) { AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, (1 << AT91C_ID_US0)) ; // enable Pins //*AT91C_PIOA_PDR = AT91C_PA5_RXD0 | AT91C_PA6_TXD0; // Reset and disable Receiver & Transmitter AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; // Normal Mode, Clock = MCK, 8N1 AT91C_BASE_US0->US_MR = AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT; // Baud Rate Divisor AT91C_BASE_US0->US_BRGR = (F_CPU / 16 / baudrate); // Receiver & Transmitter Enable AT91C_BASE_US0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN; }
void spi_low_mst_init(void) { // Enable SPI clock AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_SPI ) ; // Configure PIO controllers to periph mode AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address //((unsigned int) AT91C_PA11_NPCS0) | ((unsigned int) AT91C_PA12_MISO ) | ((unsigned int) AT91C_PA13_MOSI ) | ((unsigned int) AT91C_PA14_SPCK ), // Periph A 0); // Periph B AT91PS_SPI spi = AT91C_BASE_SPI; // reset SPI and enable it spi->SPI_CR = AT91C_SPI_SWRST; spi->SPI_CR = AT91C_SPI_SWRST; spi->SPI_CR = AT91C_SPI_SPIEN; // SPI mode: master mode // MODFDIS is required to allow manual CSx control spi->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS; }
void ConfigureRFBus(void) { #if !defined(IR_RF_DEF) AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << ID_RfIntBUS); AT91F_PIO_CfgPullup(IR_PIO_BUS, ~RfIntBUS); AT91F_PIO_CfgInput(IR_PIO_BUS, RfIntBUS); #endif }
void spi_low_cs_init(void) { // Enable PIO for CSx AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ) ; // manual config CS AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, SPI_ALL_MASK ); AT91F_PIO_SetOutput( AT91C_BASE_PIOA, SPI_ALL_MASK ); }
static void prvSetupHardware( void ) { /* When using the JTAG debugger the hardware is not always initialised to the correct default state. This line just ensures that this does not cause all interrupts to be masked at the start. */ AT91C_BASE_AIC->AIC_EOICR = 0; /* Most setup is performed by the low level init function called from the startup asm file. Configure the PIO Lines corresponding to LED1 to LED4 to be outputs as well as the UART Tx line. */ AT91F_PIO_CfgOutput( AT91C_BASE_PIOB, LED_MASK ); /* Enable the peripheral clock. */ AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ); AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOB ) ; AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_EMAC ) ; }
void sdpin_init(void) { // Enable PIO AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, _BV(AT91C_ID_PIOA) ) ; AT91C_BASE_PIOA->PIO_PPUDR = SD_SOCKET_ALL; // disable pull-up (is external) AT91F_PIO_InputFilterEnable( AT91C_BASE_PIOA, SD_SOCKET_ALL ); // glitch filter AT91F_PIO_SetOutput( AT91C_BASE_PIOA, SD_SOCKET_ALL ); // set HI AT91F_PIO_OutputDisable( AT91C_BASE_PIOA, SD_SOCKET_ALL ); // its an input AT91F_PIO_Enable( AT91C_BASE_PIOA, SD_SOCKET_ALL ); // enable }
void Init_PWM(void) { AT91F_PWMC_InterruptDisable(AT91C_BASE_PWMC, AT91C_PWMC_CHID0); AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ); AT91F_PWMC_CH0_CfgPIO(); AT91F_PWMC_CfgPMC(); AT91F_PWMC_StopChannel(AT91C_BASE_PWMC, AT91C_PWMC_CHID0); AT91F_PWMC_CfgChannel(AT91C_BASE_PWMC, 0, 1 | AT91C_PWMC_CPOL, 100000, 66000); AT91F_PWMC_UpdateChannel(AT91C_BASE_PWMC, AT91C_PWMC_CHID0, 0); AT91F_PWMC_StopChannel(AT91C_BASE_PWMC, AT91C_PWMC_CHID0); AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, AT91C_PA23_PWM0); AT91F_PWMC_StartChannel(AT91C_BASE_PWMC, AT91C_PWMC_CHID0); }
void GPIO_device_init_base(void) { // Enable the peripheral clock. AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_IRQ0)); portENTER_CRITICAL(); AT91PS_AIC pAic; pAic = AT91C_BASE_AIC; AT91F_PIO_InterruptEnable(AT91C_BASE_PIOA,PIO_PUSHBUTTON_SWITCH); AT91F_AIC_ConfigureIt ( pAic, AT91C_ID_PIOA, PUSHBUTTON_INTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, gpio_irq_handler); AT91F_AIC_EnableIt (pAic, AT91C_ID_PIOA); portEXIT_CRITICAL(); }
//Инициализация канала таймера-счетчика и разрешение тактирования //Входные параметры : <tc_pt> = указатель дескриптора канала // <mode> = режим таймера счетчика // : <TimerId> = определение идентификатора периферийного // : устройства (таймера) //Выходные параметры : нет void AT91F_TC_Open ( AT91PS_TC TC_pt, unsigned int Mode, unsigned int TimerId) { unsigned int dummy; //разрешение тактирования таймера TIMER AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1<< TimerId ) ; //отключение тактирования и прерываний TC_pt->TC_CCR = AT91C_TC_CLKDIS ; TC_pt->TC_IDR = 0xFFFFFFFF ; //очистка бита статуса dummy = TC_pt->TC_SR; dummy = dummy; //чтобы не генерировалось замечание о неиспольз переменной //задание режима таймера-счетчика TC_pt->TC_CMR = Mode ; //разрешение тактирования TC_pt->TC_CCR = AT91C_TC_CLKEN ; }
/* * See the serial2.h header file. */ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) { xComPortHandle xReturn = serHANDLE; extern void ( vUART_ISR )( void ); /* Create the queues used to hold Rx and Tx characters. */ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) ); xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) ); /* If the queues were created correctly then setup the serial port hardware. */ if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) ) { portENTER_CRITICAL(); { /* Enable the USART clock. */ AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_US0 ); AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, ( ( unsigned long ) AT91C_PA5_RXD0 ) | ( ( unsigned long ) AT91C_PA6_TXD0 ), serNO_PERIPHERAL_B_SETUP ); /* Set the required protocol. */ AT91F_US_Configure( serCOM0, configCPU_CLOCK_HZ, AT91C_US_ASYNC_MODE, ulWantedBaud, serNO_TIMEGUARD ); /* Enable Rx and Tx. */ serCOM0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN; /* Enable the Rx interrupts. The Tx interrupts are not enabled until there are characters to be transmitted. */ AT91F_US_EnableIt( serCOM0, AT91C_US_RXRDY ); /* Enable the interrupts in the AIC. */ AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_US0, serINTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)( void ) ) vSerialISREntry ); AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_US0 ); } portEXIT_CRITICAL(); } else { xReturn = ( xComPortHandle ) 0; } /* This demo file only supports a single port but we have to return something to comply with the standard demo header file. */ return xReturn; }
void Usart0_init ( long BaudRate ) { US0_QUEUE = xQueueCreate( 10, sizeof( unsigned int ) ); US0_Error = ErrorCreate("US0_Error"); while( US0_QUEUE == 0 ) ; // Queue was not created and must not be used. portENTER_CRITICAL(); { AT91F_US0_CfgPIO() ; //* Define RXD and TXD as peripheral AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1<<AT91C_ID_US0 ) ; // First, enable the clock of the PIOB AT91F_US_Configure (COM0, MCK,AT91C_US_ASYNC_MODE, BaudRate , 0); // Usart Configure AT91F_AIC_ConfigureIt ( AT91C_BASE_AIC, AT91C_ID_US0, USART_INTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)( void ) )AT91_US0_ISR_ENTRY); AT91F_AIC_EnableIt (AT91C_BASE_AIC, AT91C_ID_US0); } portEXIT_CRITICAL(); }
//инициализация основных узлов системы void CPUinit() { //нициализация EFC (Flash-памяти) AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ; // 1 цикла на чтение, 3 цикла на запись //настройка тактовых частот //включение и задание времени запуска основного генератора AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN )); // ожидание стабилизации частоты основного генератора while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS)); //задание частоты PLL 96,109 МГц и такт частоты UDP 48,058 МГц AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1|(16 << 8) | (AT91C_CKGR_MUL & (72 << 16)) | (AT91C_CKGR_DIV & 14); //ожидание стабилизации PLL while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) ); // ожидание стабилизации задающей частоты от PLL while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) ); //задание задающей частоты и частоты процессора PLL/2=48 МГц //регистр PMC_MCKR не должен програмироваться одной операцией записи AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2; // ожидание стабилизации задающей частоты while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) ); AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK; // ожидание стабилизации задающей частоты while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) ); // отключение сторожевого таймера AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS; // разрешение тактирования PIO AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ) ; // конфигурирование линий PIO как выходов обслуживания светодиодов LED1,...LED4 AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, LED_MASK ) ; // установка выходов - гашение светодиодов AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_MASK ) ; // конфигурирование линии PIO как выхода генерации частоты отриц напряж для LCD AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, U_NEG ) ; // сброс выхода генерации частоты отриц напряж для LCD AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, U_NEG ) ; // конфигурирование линий PIO как выходов обслуживания ЖКИ AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, LCD_MASK ) ; // сброс выходов обслуживания ЖКИ AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, LCD_MASK ) ; }
//*------------------------- Internal Function -------------------------------- //*---------------------------------------------------------------------------- //* Function Name : AT91F_TC_Open //* Object : Initialize Timer Counter Channel and enable is clock //* Input Parameters : <tc_pt> = TC Channel Descriptor Pointer //* <mode> = Timer Counter Mode //* : <TimerId> = Timer peripheral ID definitions //* Output Parameters : None //*---------------------------------------------------------------------------- void AT91F_TC_Open ( AT91PS_TC TC_pt, unsigned int Mode, unsigned int TimerId) { unsigned int dummy; //* First, enable the clock of the TIMER AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1<< TimerId ) ; //* Disable the clock and the interrupts TC_pt->TC_CCR = AT91C_TC_CLKDIS ; TC_pt->TC_IDR = 0xFFFFFFFF ; //* Clear status bit dummy = TC_pt->TC_SR; //* Suppress warning variable "dummy" was set but never used dummy = dummy; //* Set the Mode of the Timer Counter TC_pt->TC_CMR = Mode ; //* Enable the clock TC_pt->TC_CCR = AT91C_TC_CLKEN ; }
void spi_low_slv_init(void) { // Enable SPI clock AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_SPI ) ; // Configure PIO controllers to periph mode AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address //((unsigned int) AT91C_PA11_NPCS0) | ((unsigned int) AT91C_PA12_MISO ) | ((unsigned int) AT91C_PA13_MOSI ) | ((unsigned int) AT91C_PA14_SPCK ), // Periph A 0); // Periph B AT91PS_SPI spi = AT91C_BASE_SPI; // SPI mode: slave mode spi->SPI_MR = 0; // CS0: 8 bits spi->SPI_CSR[0] = AT91C_SPI_BITS_8; }
void soundInitialise(void) { volatile AT91PS_TC pTc = AT91C_BASE_TC1; // get a ptr to channel 1 register structure // First, enable the clock for the timer. Note, this is NOT the same as AT91C_ID_PIOA used before. AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_TC1); // AT91C_ID_PIOA ) ; // then, we configure the PIO Lines for LED outputs //AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, 1<<11 ) ; // Flash an LED in debug mode //AT91F_PIO_SetOutput( AT91C_BASE_PIOA, 1<<11 ) ; //AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, 1<<11) ; //AT91F_TC1_CfgPIO (); // Periph. B config as, PA15 = TIOA1; PA16 = TIOB1; PA28 = TCLK1 volatile struct _AT91S_PIO* pwm_gen; pwm_gen->PIO_PDR = (1<<PIOTIOA1) | (1<<PIOTIOB1); pTc->TC_CCR = TC_CLKDIS; // disable the clock, just for now pTc->TC_CMR = // set mode configuration TC_BSWTRG_SET_OUTPUT | TC_BCPC_TOGGLE_OUTPUT | TC_BCPB_TOGGLE_OUTPUT | TC_ASWTRG_SET_OUTPUT | TC_ACPC_TOGGLE_OUTPUT | TC_ACPA_TOGGLE_OUTPUT | TC_WAVE | TC_CPCTRG | TC_EEVT_XC0 | TC_CLKS_MCLK2 ; pTc->TC_RC = 0x80E8; pTc->TC_RB = 0x4074; // Higher pitch pTc->TC_RA = 0x26AC; // Lower pitch }
void tc_cdiv_init(void) { /* Cfg PA28(TCLK1), PA0(TIOA0), PA1(TIOB0), PA20(TCLK2) as Periph B */ AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, OPENPCD_PIO_CARRIER_IN | OPENPCD_PIO_CARRIER_DIV_OUT | OPENPCD_PIO_CDIV_HELP_OUT | OPENPCD_PIO_CDIV_HELP_IN); AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_TC0)); /* Enable Clock for TC0 and TC1 */ tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN; tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN; /* Connect TCLK1 to XC1, TCLK2 to XC2 */ tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC2XC2S); tcb->TCB_BMR |= (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC2XC2S_TCLK2); /* Clock XC1, Wave mode, Reset on RC comp * TIOA0 on RA comp = set, * TIOA0 on RC comp = clear, * TIOB0 on EEVT = set, TIOB0 on RB comp = clear, * EEVT = XC2 (TIOA0) */ tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR | AT91C_TC_BEEVT_SET | AT91C_TC_BCPB_CLEAR | AT91C_TC_EEVT_XC2 | AT91C_TC_ETRGEDG_RISING | AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR; tc_cdiv_set_divider(128); /* Reset to start timers */ tcb->TCB_BCR = 1; }
//=============================================================================================== void AT91F_USART_OPEN(AT91_USART_ID idPort, long BaudRate, int mode) { portENTER_CRITICAL(); { switch (idPort) { case AT91_USART_COM0_ID: COM0.id = idPort; COM0.hPort = AT91C_BASE_US0; COM0.hError = ErrorCreate("US0_Error"); COM0.hPDC = AT91C_BASE_PDC_US0; AT91F_PDC_Open(COM0.hPDC); // AT91F_US0_CfgPIO(); //* Define RXD and TXD as peripheral AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, // PIO controller base address (((unsigned int) AT91C_PA5_RXD0) | ((unsigned int) AT91C_PA6_TXD0)), // Peripheral A 0); AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_US0); // First, enable the clock of the PIOB AT91F_US_Configure(COM0.hPort, MCK, mode, BaudRate, 0); // Usart Configure AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_US0, USART_INTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, (void(*)(void)) AT91_US0_ISR_ENTRY); AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_US0); COM0.hRxQueue = xQueueCreate(1, sizeof(int)); while (COM0.hRxQueue == 0) ; // Queue was not created and must not be used. COM0.hTxQueue = xQueueCreate(1, sizeof(int)); while (COM0.hTxQueue == 0) ; // Queue was not created and must not be used. break; case AT91_USART_COM1_ID: COM1.id = idPort; COM1.hPort = AT91C_BASE_US1; COM1.hPDC = AT91C_BASE_PDC_US1; COM1.hError = ErrorCreate("US1_Error"); AT91F_PDC_DisableTx(COM1.hPDC); AT91F_PDC_DisableRx(COM1.hPDC); AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, // PIO controller base address (((unsigned int) AT91C_PA21_RXD1) | ((unsigned int) AT91C_PA22_TXD1)), // Peripheral A 0); AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_US1); // First, enable the clock of the PIOB AT91F_US_Configure(COM1.hPort, MCK, mode, BaudRate, 0); // Usart Configure AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_US1, USART_INTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, (void(*)(void)) AT91_US1_ISR_ENTRY); AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_US1); COM1.hRxQueue = xQueueCreate(1, sizeof(int)); while (COM1.hRxQueue == 0) ; // Queue was not created and must not be used. COM1.hTxQueue = xQueueCreate(1, sizeof(int)); while (COM1.hTxQueue == 0) ; // Queue was not created and must not be used. break; default: while (1) ;// error port notfound; } } portEXIT_CRITICAL(); }
void Init_DBGU_CLK(void) { AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_SYS)); }
__inline void AT91F_UDP_CfgPMC (void) { AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, // PIO controller base address ((unsigned int) 1 << AT91C_ID_UDP)); }
//*-------------------------------------------------------------------------------------- //* Function Name : Main //* Object : Software entry point //* Input Parameters : none. //* Output Parameters : none. //*-------------------------------------------------------------------------------------- int main(void) { char data[MSG_SIZE]; unsigned int length; int stepCnt = 0; unsigned char str[10]; /**** System init ****/ //InitFrec(); Init_CP_WP(); //chek for CP and WP //CP - card present while(((AT91C_BASE_PIOA->PIO_PDSR) & BIT15)) { /*put your card present event here*/ } //WP - write protect //while(((AT91C_BASE_PIOA->PIO_PDSR) & BIT16)) { /*put your write protect event here*/ } if (initMMC() == MMC_SUCCESS) { //card_state |= 1; memset(&mmc_buffer,0,512); mmcReadRegister (10, 16); mmc_buffer[7]=0; } flashInit(); Init_PWM(); // Enable User Reset and set its minimal assertion to 960 us AT91C_BASE_RSTC->RSTC_RMR = AT91C_RSTC_URSTEN | (0x4<<8) | (unsigned int)(0xA5<<24); // Led init // First, enable the clock of the PIOB AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ) ; //* to be outputs. No need to set these pins to be driven by the PIO because it is GPIO pins only. AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, OUTPUT_MASK ); //* Clear the LED's. /* AT91F_PIO_SetOutput( AT91C_BASE_PIOA, OUTPUT_MASK ); AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, OUTPUT_MASK ); */ // Init USB device AT91F_USB_Open(); AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, OUTPUT_MASK ); // Init USB device // Wait for the end of enumeration setForce(40000); int pCDCEnablingCounter = 0; while (!pCDC.IsConfigured(&pCDC) && pCDCEnablingCounter < 2500000){ pCDCEnablingCounter++; }; if (pCDCEnablingCounter < 2500000) { CDC = 1; } setForce(0); // Set Usart in interrupt //Usart_init(); //Read and set settings memcpy(settings, OUR_FLASH_ADDR, 128); int i;memset(&mmc_buffer, 0x00, 512); int j; char *settingsBlocks[50]; char settingsDelim[] = "~"; char *settingsParts = strtok( settings, settingsDelim ); i = 0; while( settingsParts != NULL ) { settingsBlocks[i++] = settingsParts; settingsParts = strtok( NULL, settingsDelim ); } for (j = 0; j < i; j++) { parseSettings(settingsBlocks[j]); } InitADC(); Init_PWM(); AT91F_PIO_CfgInput(AT91C_BASE_PIOA, SW1_MASK); AT91F_PIO_CfgInput(AT91C_BASE_PIOA, SW2_MASK); AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_GREEN); AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_YELLOW); setForce(0); //startBlinking(250000); /**** MMC CARD ****/ init_extint(); while (1) { cnt++; if (cnt > 50000) { cnt = 0; printTrace("COUNTER RESET\n"); } } }
__noreturn int main() { s16 result; u32 ul; __disable_interrupt(); //*** Hardware Init *** /* When using the JTAG debugger the hardware is not always initialised to the correct default state. This line just ensures that this does not cause all interrupts to be masked at the start. */ AT91C_BASE_AIC->AIC_EOICR = 0; /* Enable the peripheral clock. */ AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ); AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOB ) ; AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_EMAC ) ; // This Pull ups are disabled *AT91C_PIOB_PPUDR = (AT91C_PIO_PB5|AT91C_PIO_PB6|AT91C_PIO_PB13|AT91C_PIO_PB14|AT91C_PIO_PB26); AT91F_PIO_CfgPeriph(PIOA, 0, 0); AT91F_PIO_CfgPeriph(PIOB, 0, 0); CLR_PIN(PIOB, AT91C_PB18_EF100); SET_OUTPUT(PIOA, AT91C_PA22_TK|AT91C_PA21_TF|AT91C_PA0_RXD0); SET_OUTPUT(PIOB, AT91C_PIO_PB21); // Release Reset of the CODEC NET_init(RX_buf, TX_buf); EMAC_Init(); __enable_interrupt(); u8 buf[10]; buf[0] = 0x03; buf[1] = 0x4B; I2C_Init(100); CODEC_init(); RING_init(_CODEC_DATA_START_ADR, _CODEC_DATABLOCK_SIZE, _CODEC_NUM_OF_BUFS); // Init the UWSDR sub system UWSDR_init(); //CODEC_start(); //*********** THE MAIN LOOP ************ _DBG_STATE_POS(_DBG_STATE_MAIN); while(1) { result = EMAC_Poll(); _DBG_STATE_POS(_DBG_STATE_MAIN); if(result == _NET_GOT_RX_DATA) { NET_process(); } _DBG_STATE_POS(_DBG_STATE_MAIN); ul = AT91C_BASE_SSC->SSC_SR; if((ul & AT91C_SSC_ENDRX) && CODEC_IS_MODE(CODEC_MODE_RX)) { // DBG_LED1_ON(); CODEC_SSC_ISR(); UWSDR_upload(); // DBG_LED1_OFF(); } if(ul & AT91C_SSC_ENDRX && CODEC_IS_MODE(CODEC_MODE_TX)) { CODEC_SSC_ISR(); } _DBG_STATE_POS(_DBG_STATE_MAIN); } }