static void cyg_hal_plf_serial_dbg_init_channel(void* __ch_data) { cyg_uint8 *base = ((channel_data_t*)__ch_data)->base; cyg_uint32 baud_value = 0; cyg_uint32 baud_rate = ((channel_data_t*)__ch_data)->baud_rate; /* Enable pins to be driven by peripheral, using peripheral A. */ HAL_WRITE_UINT32((AT91_PIO+AT91_PIO_ASR), (AT91_PIO_PSR_DRXD | AT91_PIO_PSR_DTXD)); /* Disables the PIO from controlling the corresponding pin (enables peripheral control of the pin). */ HAL_WRITE_UINT32((AT91_PIO+AT91_PIO_PDR), (AT91_PIO_PSR_DRXD | AT91_PIO_PSR_DTXD)); /* Disable interrupt */ HAL_WRITE_UINT32((base+AT91_DBG_IDR), 0xFFFFFFFF); /* Reset receiver and transmitter */ HAL_WRITE_UINT32((base+AT91_DBG_CR), (AT91_DBG_CR_RSTRX | AT91_DBG_CR_RSTTX | AT91_DBG_CR_RXDIS | AT91_DBG_CR_TXDIS)); baud_value = AT91_US_BAUD(baud_rate); HAL_WRITE_UINT32((base+AT91_DBG_BRGR), baud_value); /* Define the USART mode */ /* (USART) Normal, 1 stop bit, No Parity, Character Length: 8 bits, Clock */ HAL_WRITE_UINT32(base+AT91_DBG_MR, (AT91_DBG_MR_CHMODE_NORMAL | AT91_DBG_MR_PAR_NONE)); /* Enable Transmitter */ HAL_WRITE_UINT32((base+AT91_DBG_CR), AT91_DBG_CR_TXEN); /* Enable Receiver */ HAL_WRITE_UINT32((base+AT91_DBG_CR), AT91_DBG_CR_RXEN); }
static void cyg_hal_plf_serial_init_channel(void* __ch_data) { channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8* base = chan->base; // Reset device HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET); // 8-1-no parity. HAL_WRITE_UINT32(base+AT91_US_MR, AT91_US_MR_CLOCK_MCK | AT91_US_MR_LENGTH_8 | AT91_US_MR_PARITY_NONE | AT91_US_MR_STOP_1); HAL_WRITE_UINT32(base+AT91_US_BRG, AT91_US_BAUD(chan->baud_rate)); // Enable RX and TX HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxENAB | AT91_US_CR_TxENAB); }