static DEVICE_START(timekeeper) { timekeeper_state *c = get_safe_token(device); emu_timer *timer; attotime duration; mame_system_time systime; /* validate some basic stuff */ assert(device != NULL); // assert(device->static_config != NULL); assert(device->inline_config == NULL); assert(device->machine != NULL); assert(device->machine->config != NULL); mame_get_base_datetime(device->machine, &systime); c->device = device; c->control = 0; c->seconds = make_bcd( systime.local_time.second ); c->minutes = make_bcd( systime.local_time.minute ); c->hours = make_bcd( systime.local_time.hour ); c->day = make_bcd( systime.local_time.weekday + 1 ); c->date = make_bcd( systime.local_time.mday ); c->month = make_bcd( systime.local_time.month + 1 ); c->year = make_bcd( systime.local_time.year % 100 ); c->century = make_bcd( systime.local_time.year / 100 ); c->data = auto_alloc_array( device->machine, UINT8, c->size ); c->default_data = device->region; if (c->default_data != NULL) { assert( device->regionbytes == c->size ); } state_save_register_device_item( device, 0, c->control ); state_save_register_device_item( device, 0, c->seconds ); state_save_register_device_item( device, 0, c->minutes ); state_save_register_device_item( device, 0, c->hours ); state_save_register_device_item( device, 0, c->day ); state_save_register_device_item( device, 0, c->date ); state_save_register_device_item( device, 0, c->month ); state_save_register_device_item( device, 0, c->year ); state_save_register_device_item( device, 0, c->century ); state_save_register_device_item_pointer( device, 0, c->data, c->size ); timer = timer_alloc( device->machine, timekeeper_tick, c ); duration = ATTOTIME_IN_SEC(1); timer_adjust_periodic( timer, duration, 0, duration ); }
void watchdog_reset(running_machine *machine) { /* if we're not enabled, skip it */ if (!watchdog_enabled) timer_adjust_oneshot(watchdog_timer, attotime_never, 0); /* VBLANK-based watchdog? */ else if (machine->config->watchdog_vblank_count != 0) { watchdog_counter = machine->config->watchdog_vblank_count; /* register a VBLANK callback for the primary screen */ if (machine->primary_screen != NULL) video_screen_register_vblank_callback(machine->primary_screen, on_vblank, NULL); } /* timer-based watchdog? */ else if (attotime_compare(machine->config->watchdog_time, attotime_zero) != 0) timer_adjust_oneshot(watchdog_timer, machine->config->watchdog_time, 0); /* default to an obscene amount of time (3 seconds) */ else timer_adjust_oneshot(watchdog_timer, ATTOTIME_IN_SEC(3), 0); }
void intelflash_write(int chip, UINT32 address, UINT32 data) { struct flash_chip *c; if( chip >= FLASH_CHIPS_MAX ) { logerror( "intelflash_write: invalid chip %d\n", chip ); return; } c = &chips[ chip ]; // logerror( "intelflash_write( %d, %08x, %08x )\n", chip, address, data ); switch( c->flash_mode ) { case FM_NORMAL: case FM_READSTATUS: case FM_READID: case FM_READAMDID3: switch( data & 0xff ) { case 0xf0: case 0xff: // reset chip mode c->flash_mode = FM_NORMAL; break; case 0x90: // read ID c->flash_mode = FM_READID; break; case 0x40: case 0x10: // program c->flash_mode = FM_WRITEPART1; break; case 0x50: // clear status reg c->status = 0x80; c->flash_mode = FM_READSTATUS; break; case 0x20: // block erase c->flash_mode = FM_CLEARPART1; break; case 0x60: // set master lock c->flash_mode = FM_SETMASTER; break; case 0x70: // read status c->flash_mode = FM_READSTATUS; break; case 0xaa: // AMD ID select part 1 if( ( address & 0xfff ) == 0x555 ) { c->flash_mode = FM_READAMDID1; } break; default: logerror( "Unknown flash mode byte %x\n", data & 0xff ); break; } break; case FM_READAMDID1: if( ( address & 0xffff ) == 0x2aa && ( data & 0xff ) == 0x55 ) { c->flash_mode = FM_READAMDID2; } else if( ( address & 0xffff ) == 0x2aaa && ( data & 0xff ) == 0x55 ) { c->flash_mode = FM_READAMDID2; } else { logerror( "unexpected %08x=%02x in FM_READAMDID1\n", address, data & 0xff ); c->flash_mode = FM_NORMAL; } break; case FM_READAMDID2: if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0x90 ) { c->flash_mode = FM_READAMDID3; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0x90 ) { c->flash_mode = FM_READAMDID3; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0x80 ) { c->flash_mode = FM_ERASEAMD1; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0x80 ) { c->flash_mode = FM_ERASEAMD1; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0xa0 ) { c->flash_mode = FM_BYTEPROGRAM; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0xa0 ) { c->flash_mode = FM_BYTEPROGRAM; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0xf0 ) { c->flash_mode = FM_NORMAL; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0xf0 ) { c->flash_mode = FM_NORMAL; } else { logerror( "unexpected %08x=%02x in FM_READAMDID2\n", address, data & 0xff ); c->flash_mode = FM_NORMAL; } break; case FM_ERASEAMD1: if( ( address & 0xfff ) == 0x555 && ( data & 0xff ) == 0xaa ) { c->flash_mode = FM_ERASEAMD2; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD1\n", address, data & 0xff ); } break; case FM_ERASEAMD2: if( ( address & 0xffff ) == 0x2aa && ( data & 0xff ) == 0x55 ) { c->flash_mode = FM_ERASEAMD3; } else if( ( address & 0xffff ) == 0x2aaa && ( data & 0xff ) == 0x55 ) { c->flash_mode = FM_ERASEAMD3; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD2\n", address, data & 0xff ); } break; case FM_ERASEAMD3: if( ( address & 0xfff ) == 0x555 && ( data & 0xff ) == 0x10 ) { // chip erase memset( c->flash_memory, 0xff, c->size); c->status = 1 << 3; c->flash_mode = FM_ERASEAMD4; timer_adjust_oneshot( c->timer, ATTOTIME_IN_SEC( 17 ), 0 ); } else if( ( data & 0xff ) == 0x30 ) { // sector erase // clear the 4k/64k block containing the current address to all 0xffs switch( c->bits ) { case 8: { UINT8 *flash_memory = (UINT8 *)c->flash_memory; if (c->sector_is_4k) { memset( &flash_memory[ address & ~0xfff ], 0xff, 4 * 1024 ); c->erase_sector = address & ~0xfff; timer_adjust_oneshot( c->timer, ATTOTIME_IN_MSEC( 125 ), 0 ); } else { memset( &flash_memory[ address & ~0xffff ], 0xff, 64 * 1024 ); c->erase_sector = address & ~0xffff; timer_adjust_oneshot( c->timer, ATTOTIME_IN_SEC( 1 ), 0 ); } } break; case 16: { UINT16 *flash_memory = (UINT16 *)c->flash_memory; if (c->sector_is_4k) { memset( &flash_memory[ address & ~0x7ff ], 0xff, 4 * 1024 ); c->erase_sector = address & ~0x7ff; timer_adjust_oneshot( c->timer, ATTOTIME_IN_MSEC( 125 ), 0 ); } else { memset( &flash_memory[ address & ~0x7fff ], 0xff, 64 * 1024 ); c->erase_sector = address & ~0x7fff; timer_adjust_oneshot( c->timer, ATTOTIME_IN_SEC( 1 ), 0 ); } } break; } c->status = 1 << 3; c->flash_mode = FM_ERASEAMD4; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD3\n", address, data & 0xff ); } break; case FM_BYTEPROGRAM: switch( c->bits ) { case 8: { UINT8 *flash_memory = (UINT8 *)c->flash_memory; flash_memory[ address ] = data; } break; default: logerror( "FM_BYTEPROGRAM not supported when c->bits == %d\n", c->bits ); break; } c->flash_mode = FM_NORMAL; break; case FM_WRITEPART1: switch( c->bits ) { case 8: { UINT8 *flash_memory = (UINT8 *)c->flash_memory; flash_memory[ address ] = data; } break; case 16: { UINT16 *flash_memory = (UINT16 *)c->flash_memory; flash_memory[ address ] = data; } break; default: logerror( "FM_WRITEPART1 not supported when c->bits == %d\n", c->bits ); break; } c->status = 0x80; c->flash_mode = FM_READSTATUS; break; case FM_CLEARPART1: if( ( data & 0xff ) == 0xd0 ) { // clear the 64k block containing the current address to all 0xffs switch( c->bits ) { case 8: { UINT8 *flash_memory = (UINT8 *)c->flash_memory; memset( &flash_memory[ address & ~0xffff ], 0xff, 64 * 1024 ); } break; case 16: { UINT16 *flash_memory = (UINT16 *)c->flash_memory; memset( &flash_memory[ address & ~0x7fff ], 0xff, 64 * 1024 ); } break; default: logerror( "FM_CLEARPART1 not supported when c->bits == %d\n", c->bits ); break; } c->status = 0x00; c->flash_mode = FM_READSTATUS; timer_adjust_oneshot( c->timer, ATTOTIME_IN_SEC( 1 ), 0 ); break; } else { logerror( "unexpected %02x in FM_CLEARPART1\n", data & 0xff ); } break; case FM_SETMASTER: switch( data & 0xff ) { case 0xf1: c->flash_master_lock = 1; break; case 0xd0: c->flash_master_lock = 0; break; default: logerror( "unexpected %08x=%02x in FM_SETMASTER:\n", address, data & 0xff ); break; } c->flash_mode = FM_NORMAL; break; } }
void intelfsh_device::write_full(UINT32 address, UINT32 data) { // logerror( "intelflash_write( %d, %08x, %08x )\n", chip, address, data ); switch( m_flash_mode ) { case FM_NORMAL: case FM_READSTATUS: case FM_READID: case FM_READAMDID3: switch( data & 0xff ) { case 0xf0: case 0xff: // reset chip mode m_flash_mode = FM_NORMAL; break; case 0x90: // read ID m_flash_mode = FM_READID; break; case 0x40: case 0x10: // program m_flash_mode = FM_WRITEPART1; break; case 0x50: // clear status reg m_status = 0x80; m_flash_mode = FM_READSTATUS; break; case 0x20: // block erase m_flash_mode = FM_CLEARPART1; break; case 0x60: // set master lock m_flash_mode = FM_SETMASTER; break; case 0x70: // read status m_flash_mode = FM_READSTATUS; break; case 0xaa: // AMD ID select part 1 if( ( address & 0xfff ) == 0x555 ) { m_flash_mode = FM_READAMDID1; } break; default: logerror( "Unknown flash mode byte %x\n", data & 0xff ); break; } break; case FM_READAMDID1: if( ( address & 0xffff ) == 0x2aa && ( data & 0xff ) == 0x55 ) { m_flash_mode = FM_READAMDID2; } else if( ( address & 0xffff ) == 0x2aaa && ( data & 0xff ) == 0x55 ) { m_flash_mode = FM_READAMDID2; } else { logerror( "unexpected %08x=%02x in FM_READAMDID1\n", address, data & 0xff ); m_flash_mode = FM_NORMAL; } break; case FM_READAMDID2: if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0x90 ) { m_flash_mode = FM_READAMDID3; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0x90 ) { m_flash_mode = FM_READAMDID3; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0x80 ) { m_flash_mode = FM_ERASEAMD1; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0x80 ) { m_flash_mode = FM_ERASEAMD1; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0xa0 ) { m_flash_mode = FM_BYTEPROGRAM; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0xa0 ) { m_flash_mode = FM_BYTEPROGRAM; } else if( ( address & 0xffff ) == 0x555 && ( data & 0xff ) == 0xf0 ) { m_flash_mode = FM_NORMAL; } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0xf0 ) { m_flash_mode = FM_NORMAL; } else { logerror( "unexpected %08x=%02x in FM_READAMDID2\n", address, data & 0xff ); m_flash_mode = FM_NORMAL; } break; case FM_ERASEAMD1: if( ( address & 0xfff ) == 0x555 && ( data & 0xff ) == 0xaa ) { m_flash_mode = FM_ERASEAMD2; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD1\n", address, data & 0xff ); } break; case FM_ERASEAMD2: if( ( address & 0xffff ) == 0x2aa && ( data & 0xff ) == 0x55 ) { m_flash_mode = FM_ERASEAMD3; } else if( ( address & 0xffff ) == 0x2aaa && ( data & 0xff ) == 0x55 ) { m_flash_mode = FM_ERASEAMD3; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD2\n", address, data & 0xff ); } break; case FM_ERASEAMD3: if( ( address & 0xfff ) == 0x555 && ( data & 0xff ) == 0x10 ) { // chip erase for (offs_t offs = 0; offs < m_config.m_size; offs++) m_addrspace[0]->write_byte(offs, 0xff); m_status = 1 << 3; m_flash_mode = FM_ERASEAMD4; if (m_config.m_sector_is_4k) { timer_adjust_oneshot( m_timer, ATTOTIME_IN_SEC( 1 ), 0 ); } else { timer_adjust_oneshot( m_timer, ATTOTIME_IN_SEC( 16 ), 0 ); } } else if( ( data & 0xff ) == 0x30 ) { // sector erase // clear the 4k/64k block containing the current address to all 0xffs UINT32 base = address * ((m_config.m_bits == 16) ? 2 : 1); if (m_config.m_sector_is_4k) { for (offs_t offs = 0; offs < 4 * 1024; offs++) m_addrspace[0]->write_byte((base & ~0xfff) + offs, 0xff); m_erase_sector = address & ((m_config.m_bits == 16) ? ~0x7ff : ~0xfff); timer_adjust_oneshot( m_timer, ATTOTIME_IN_MSEC( 125 ), 0 ); } else { for (offs_t offs = 0; offs < 64 * 1024; offs++) m_addrspace[0]->write_byte((base & ~0xffff) + offs, 0xff); m_erase_sector = address & ((m_config.m_bits == 16) ? ~0x7fff : ~0xffff); timer_adjust_oneshot( m_timer, ATTOTIME_IN_SEC( 1 ), 0 ); } m_status = 1 << 3; m_flash_mode = FM_ERASEAMD4; } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD3\n", address, data & 0xff ); } break; case FM_BYTEPROGRAM: switch( m_config.m_bits ) { case 8: { m_addrspace[0]->write_byte(address, data); } break; default: logerror( "FM_BYTEPROGRAM not supported when m_bits == %d\n", m_config.m_bits ); break; } m_flash_mode = FM_NORMAL; break; case FM_WRITEPART1: switch( m_config.m_bits ) { case 8: { m_addrspace[0]->write_byte(address, data); } break; case 16: { m_addrspace[0]->write_word(address * 2, data); } break; default: logerror( "FM_WRITEPART1 not supported when m_bits == %d\n", m_config.m_bits ); break; } m_status = 0x80; m_flash_mode = FM_READSTATUS; break; case FM_CLEARPART1: if( ( data & 0xff ) == 0xd0 ) { // clear the 64k block containing the current address to all 0xffs UINT32 base = address * ((m_config.m_bits == 16) ? 2 : 1); for (offs_t offs = 0; offs < 64 * 1024; offs++) m_addrspace[0]->write_byte((base & ~0xffff) + offs, 0xff); m_status = 0x00; m_flash_mode = FM_READSTATUS; timer_adjust_oneshot( m_timer, ATTOTIME_IN_SEC( 1 ), 0 ); break; } else { logerror( "unexpected %02x in FM_CLEARPART1\n", data & 0xff ); } break; case FM_SETMASTER: switch( data & 0xff ) { case 0xf1: m_flash_master_lock = true; break; case 0xd0: m_flash_master_lock = false; break; default: logerror( "unexpected %08x=%02x in FM_SETMASTER:\n", address, data & 0xff ); break; } m_flash_mode = FM_NORMAL; break; } }
static void reset_timer( running_device *device ) { mb3773_state *mb3773 = get_safe_token(device); timer_adjust_oneshot(mb3773->watchdog_timer, ATTOTIME_IN_SEC( 5 ), 0); }