Example #1
0
void ds2401_init( running_machine *machine, int which, const UINT8 *data )
{
	struct ds2401_chip *c = &ds2401[ which ];

	c->state = STATE_IDLE;
	c->bit = 0;
	c->byte = 0;
	c->shift = 0;
	c->rx = 1;
	c->tx = 1;
	c->data = data;
	c->t_samp = ATTOTIME_IN_USEC( 15 );
	c->t_rdv = ATTOTIME_IN_USEC( 15 );
	c->t_rstl = ATTOTIME_IN_USEC( 480 );
	c->t_pdh = ATTOTIME_IN_USEC( 15 );
	c->t_pdl = ATTOTIME_IN_USEC( 60 );

	state_save_register_item(machine,  "ds2401", NULL, which, c->state );
	state_save_register_item(machine,  "ds2401", NULL, which, c->bit );
	state_save_register_item(machine,  "ds2401", NULL, which, c->byte );
	state_save_register_item(machine,  "ds2401", NULL, which, c->shift );
	state_save_register_item(machine,  "ds2401", NULL, which, c->rx );
	state_save_register_item(machine,  "ds2401", NULL, which, c->tx );

	c->timer = timer_alloc(machine, ds2401_tick , NULL);
	c->reset_timer = timer_alloc(machine, ds2401_reset , NULL);
}
Example #2
0
static WRITE16_HANDLER( m68901_w )
{
//  UINT8 value = (data >> 8) & 0xff;
	m68901_base[offset] = data;

	switch (offset)
	{
		case 0x0c:
		case 0x0d:
		case 0x0e:
			break;

		case 0x0f:
			/* Very dodgy */
			timer_set(space->machine, ATTOTIME_IN_USEC(1000), NULL, 0, timera_int);
			break;

		case 0x10:
		case 0x11:
			break;

		case 0x12:
			/* Aargh! */
			timer_set(space->machine, ATTOTIME_IN_USEC(500), NULL, 0, timerd_int);
			break;
	}
}
Example #3
0
static INTERRUPT_GEN( gaplus_interrupt_1 )
{
	running_device *io58xx = device->machine->device("58xx");
	running_device *io56xx = device->machine->device("56xx");

	irq0_line_assert(device);	// this also checks if irq is enabled - IMPORTANT!
								// so don't replace with cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);

	if (!namcoio_read_reset_line(io58xx))		/* give the cpu a tiny bit of time to write the command before processing it */
		timer_set(device->machine, ATTOTIME_IN_USEC(50), NULL, 0, namcoio_run);

	if (!namcoio_read_reset_line(io56xx))		/* give the cpu a tiny bit of time to write the command before processing it */
		timer_set(device->machine, ATTOTIME_IN_USEC(50), NULL, 1, namcoio_run);

}
Example #4
0
static void wd33c93_select_cmd( void )
{
	UINT8	unit = wd33c93_getunit();
	UINT8	newstatus;

	/* see if we can select that device */
	if ( devices[unit] )
	{
		/* device is available - signal selection done */
		newstatus = CSR_SELECT;

		/* determine the next bus phase depending on the command */
		if ( (scsi_data.regs[WD_COMMAND] & 0x7f) == WD_CMD_SEL_ATN )
		{
			/* /ATN asserted during select: Move to Message Out Phase to read identify */
			scsi_data.busphase = PHS_MESS_OUT;
		}
		else
		{
			/* No /ATN asserted: Move to Command Phase */
			scsi_data.busphase = PHS_COMMAND;
		}

		/* queue up a service request out in the future */
		timer_set( ATTOTIME_IN_USEC(50), NULL, 0, wd33c93_service_request );
	}
	else
	{
		/* device is not available */
		newstatus = CSR_TIMEOUT;
	}

	/* complete the command */
	wd33c93_complete_cmd(newstatus);
}
Example #5
0
static WRITE16_HANDLER( cabal_sound_irq_trigger_word_w )
{
	seibu_main_word_w(space,4,data,mem_mask);

	/* spin for a while to let the Z80 read the command, otherwise coins "stick" */
	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));
}
Example #6
0
static WRITE16_HANDLER( hypr_subcpu_control_w )
{
    int pc = activecpu_get_pc();

    if (data & 0x01)
    {
        if (!subcpu_resetline)
        {
            if (pc != 0x95f2)
            {
                cpunum_set_input_line(1, INPUT_LINE_RESET, ASSERT_LINE);
                subcpu_resetline = 1;
            } else {
                cpunum_set_input_line(1, INPUT_LINE_HALT, ASSERT_LINE);
                subcpu_resetline = -1;
            }
        }
    } else {
        if (subcpu_resetline == 1 && (data != 0x0c))
        {
            cpunum_set_input_line(1, INPUT_LINE_RESET, CLEAR_LINE);
            subcpu_resetline = 0;
            if (pc == 0xbb0 || pc == 0x9d30 || pc == 0xb19c)
                cpu_spinuntil_time(ATTOTIME_IN_USEC(15000));		/* sync semaphore */
        }
        else if (subcpu_resetline == -1)
        {
            cpunum_set_input_line(1, INPUT_LINE_HALT, CLEAR_LINE);
            subcpu_resetline = 0;
        }
    }
}
Example #7
0
void spacefev_start_red_cannon( running_machine *machine )
{
	n8080_state *state = (n8080_state *)machine->driver_data;

	state->spacefev_red_cannon = 1;
	timer_adjust_oneshot(state->cannon_timer, ATTOTIME_IN_USEC(550 * 68 * 10), 0);
}
Example #8
0
static READ32_HANDLER( osman_speedup_r )
{
	simpl156_state *state = space->machine->driver_data<simpl156_state>();
	if (cpu_get_pc(space->cpu) == 0x5974)
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(400));
	return state->systemram[0x10/4];
}
Example #9
0
static WRITE8_HANDLER( sound_arm_nmi_w )
{
	asterix_state *state = (asterix_state *)space->machine->driver_data;

	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, CLEAR_LINE);
	timer_set(space->machine, ATTOTIME_IN_USEC(5), NULL, 0, nmi_callback);
}
Example #10
0
/* at least speeds up the annoying copyright screens ;-) */
static READ64_HANDLER( naomigd_sfz3ugd_idle_skip_r )
{
	if (cpu_get_pc(space->cpu)==0xc36a2dc)
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));

	return naomi_ram64[0x5dc900/8];
}
Example #11
0
static WRITE8_HANDLER( z80_arm_nmi_w )
{
	vendetta_state *state = (vendetta_state *)space->machine->driver_data;
	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, CLEAR_LINE);

	timer_set(space->machine, ATTOTIME_IN_USEC(25), NULL, 0, z80_nmi_callback);
}
Example #12
0
static READ64_HANDLER( naomigd_ggxx_idle_skip_r )
{
	if (cpu_get_pc(space->cpu)==0xc0b5c3c) // or 0xc0bab0c
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));

	return naomi_ram64[0x1837b8/8];
}
Example #13
0
static TIMER_CALLBACK( pr8210_bit_callback )
{
	attotime duration = ATTOTIME_IN_MSEC(30);
	const device_config *laserdisc = ptr;
	UINT8 bitsleft = param >> 16;
	UINT8 data = param;

	/* if we have bits, process */
	if (bitsleft != 0)
	{
		/* assert the line and set a timer for deassertion */
	   	laserdisc_line_w(laserdisc, LASERDISC_LINE_CONTROL, ASSERT_LINE);
		timer_set(machine, ATTOTIME_IN_USEC(250), ptr, 0, pr8210_bit_off_callback);

		/* space 0 bits apart by 1msec, and 1 bits by 2msec */
		duration = attotime_mul(ATTOTIME_IN_MSEC(1), (data & 0x80) ? 2 : 1);
		data <<= 1;
		bitsleft--;
	}

	/* if we're out of bits, queue up the next command */
	else if (bitsleft == 0 && pr8210_command_buffer_in != pr8210_command_buffer_out)
	{
		data = pr8210_command_buffer[pr8210_command_buffer_out++ % ARRAY_LENGTH(pr8210_command_buffer)];
		bitsleft = 12;
	}
	timer_adjust_oneshot(pr8210_bit_timer, duration, (bitsleft << 16) | data);
}
Example #14
0
static READ64_HANDLER( naomigd_ggxxsla_idle_skip_r )
{
	if (cpu_get_pc(space->cpu)==0x0c0c9adc)
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));

	return naomi_ram64[0x1aae18/8];
}
Example #15
0
static READ32_HANDLER( charlien_speedup_r )
{
	simpl156_state *state = (simpl156_state *)space->machine->driver_data;
	if (cpu_get_pc(space->cpu) == 0xc8c8)
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(400));
	return state->systemram[0x10/4];
}
Example #16
0
static WRITE8_HANDLER( intrq_w )
{
	// T = 1.1 * R30 * C53 = 1.1 * 750K * 0.01uF = 8.25 ms

	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ0, HOLD_LINE);

	timer_set(space->machine, ATTOTIME_IN_USEC(8250), NULL, 0, intrq_tick);
}
Example #17
0
static void josvolly_8741_do(running_machine *machine, int num)
{
	if( (i8741[num].sts & 0x02) )
	{
		/* transmit data */
		timer_set (machine, ATTOTIME_IN_USEC(1), NULL, num, josvolly_8741_tx);
	}
}
Example #18
0
static TIMER_CALLBACK( delayed_sound_w )
{
	main_to_sound_data = param;
	main_to_sound_ready = 1;
	cpu_triggerint(1);

	/* use a timer to make long transfers faster */
	timer_set(ATTOTIME_IN_USEC(50), NULL, 0, 0);
}
Example #19
0
static INTERRUPT_GEN( vblank_callback_lgp )
{
	// NMI
	//cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);

	// IRQ
	cpu_set_input_line(device, 0, ASSERT_LINE);
	timer_set(device->machine, ATTOTIME_IN_USEC(50), NULL, 0, irq_stop);
}
Example #20
0
static WRITE16_HANDLER( esd16_sound_command_w )
{
	if (ACCESSING_LSB)
	{
		soundlatch_w(0,data & 0xff);
		cpunum_set_input_line(1,0,ASSERT_LINE);		// Generate an IRQ
		cpu_spinuntil_time(ATTOTIME_IN_USEC(50));	// Allow the other CPU to reply
	}
}
Example #21
0
static READ64_HANDLER( naomigd_ggxxrl_idle_skip_r )
{
	if (cpu_get_pc(space->cpu)==0xc0b84bc) // or 0xc0bab0c
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));

	//printf("%08x\n", cpu_get_pc(space->cpu));

	return naomi_ram64[0x18d6c8/8];
}
Example #22
0
static void via_irq(int state)
{
	// from gameplan.c

	/* Kaos sits in a tight loop polling the VIA irq flags register, but that register is
       cleared by the irq handler. Therefore, I wait a bit before triggering the irq to
       leave time for the program to see the flag change. */
	timer_set(ATTOTIME_IN_USEC(50), NULL, state, via_irq_delayed);
}
Example #23
0
static TIMER_CALLBACK( delayed_sound_w )
{
	main_to_sound_data = param;
	main_to_sound_ready = 1;
	cpu_triggerint(cputag_get_cpu(machine, "audiocpu"));

	/* use a timer to make long transfers faster */
	timer_set(machine, ATTOTIME_IN_USEC(50), NULL, 0, 0);
}
Example #24
0
static WRITE8_HANDLER( xain_sharedram_w )
{
	/* locations 003d and 003e are used as a semaphores between CPU A and B, */
	/* so let's resync every time they are changed to avoid deadlocks */
	if ((offset == 0x003d || offset == 0x003e)
			&& xain_sharedram[offset] != data)
		cpu_boost_interleave(attotime_zero, ATTOTIME_IN_USEC(20));
	xain_sharedram[offset] = data;
}
Example #25
0
static WRITE16_HANDLER( roldf_sh_irqtrigger_w )
{
	if (ACCESSING_BITS_0_7){
		soundlatch_w(machine,0,data & 0xff);
		cpunum_set_input_line(machine, 1,0,HOLD_LINE);
	}

	// give the z80 time to see it
	cpu_spinuntil_time(ATTOTIME_IN_USEC(40));
}
Example #26
0
static READ64_HANDLER( naomi_bios_idle_skip_r )
{
	if (cpu_get_pc(space->cpu)==0xc04173c)
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(500));
		//cpu_spinuntil_int(space->cpu);
//  else
//      printf("%08x\n", cpu_get_pc(space->cpu));

	return naomi_ram64[0x2ad238/8];
}
Example #27
0
static WRITE16_HANDLER( fuuki16_sound_command_w )
{
	if (ACCESSING_LSB)
	{
		soundlatch_w(0,data & 0xff);
		cpunum_set_input_line(1, INPUT_LINE_NMI, PULSE_LINE);
//      cpu_spinuntil_time(ATTOTIME_IN_USEC(50));   // Allow the other CPU to reply
		cpu_boost_interleave(attotime_zero, ATTOTIME_IN_USEC(50)); // Fixes glitching in rasters
	}
}
Example #28
0
static MACHINE_RESET( galpani2 )
{
	MACHINE_RESET_CALL(kaneko16);

	kaneko16_sprite_type = 1;

	kaneko16_sprite_xoffs = 0x10000 - 0x16c0 + 0xc00;
	kaneko16_sprite_yoffs = 0x000;
	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(50)); //initial mcu xchk
}
Example #29
0
static WRITE16_HANDLER( sandscrp_soundlatch_word_w )
{
	if (ACCESSING_BITS_0_7)
	{
		latch1_full = 1;
		soundlatch_w(space, 0, data & 0xff);
		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(100));	// Allow the other cpu to reply
	}
}
Example #30
0
static WRITE16_HANDLER( fuuki16_sound_command_w )
{
	fuuki16_state *state = (fuuki16_state *)space->machine->driver_data;
	if (ACCESSING_BITS_0_7)
	{
		soundlatch_w(space,0,data & 0xff);
		cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
//      cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other CPU to reply
		cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(50)); // Fixes glitching in rasters
	}
}