void AudDrv_I2S_Clk_Off(void)
{
unsigned long flags;
//PRINTK_AUD_CLK("+AudDrv_I2S_Clk_Off, Aud_I2S_Clk_cntr:%d \n", Aud_I2S_Clk_cntr);
spin_lock_irqsave(&auddrv_Clk_lock, flags);
Aud_I2S_Clk_cntr--;
if (Aud_I2S_Clk_cntr == 0)
{
#ifdef PM_MANAGER_API
if (disable_clock(MT_CG_AUDIO_I2S, "AUDIO"))
{
PRINTK_AUD_ERROR("disable_clock MT_CG_AUDIO_I2S fail");
}
#else
Afe_Set_Reg(AUDIO_TOP_CON0, 0x00000000, 0x00000040); //power off I2S clock
#endif
}
else if (Aud_I2S_Clk_cntr < 0)
{
PRINTK_AUD_ERROR("!! AudDrv_I2S_Clk_Off, Aud_I2S_Clk_cntr<0 (%d) \n", Aud_I2S_Clk_cntr);
AUDIO_ASSERT(true);
Aud_I2S_Clk_cntr = 0;
}
spin_unlock_irqrestore(&auddrv_Clk_lock, flags);
//PRINTK_AUD_CLK("-AudDrv_I2S_Clk_Off, Aud_I2S_Clk_cntr:%d \n",Aud_I2S_Clk_cntr);
}
void AudDrv_Clk_Off(void)
{
unsigned long flags;
//PRINTK_AUD_CLK("+!! AudDrv_Clk_Off, Aud_AFE_Clk_cntr:%d \n",Aud_AFE_Clk_cntr);
spin_lock_irqsave(&auddrv_Clk_lock, flags);
Aud_AFE_Clk_cntr--;
if (Aud_AFE_Clk_cntr == 0)
{
PRINTK_AUD_CLK("+ AudDrv_Clk_Off, Aud_AFE_Clk_cntr:%d \n", Aud_AFE_Clk_cntr);
{
// Disable AFE clock
#ifdef PM_MANAGER_API
if (disable_clock(MT_CG_AUDIO_AFE, "AUDIO"))
{
xlog_printk(ANDROID_LOG_ERROR, "Sound", "disable_clock MT_CG_AUDIO_AFE fail");
}
#else
//Afe_Set_Reg(AUDIO_TOP_CON0, 0x00000000, 0x00000004); // bit2: afe power on
#endif
}
}
else if (Aud_AFE_Clk_cntr < 0)
{
PRINTK_AUD_ERROR("!! AudDrv_Clk_Off, Aud_AFE_Clk_cntr<0 (%d) \n", Aud_AFE_Clk_cntr);
AUDIO_ASSERT(true);
Aud_AFE_Clk_cntr = 0;
}
spin_unlock_irqrestore(&auddrv_Clk_lock, flags);
}
void AudDrv_HDMI_Clk_Off(void)
{
PRINTK_AUD_CLK("+AudDrv_HDMI_Clk_Off, Aud_I2S_Clk_cntr:%d \n", Aud_HDMI_Clk_cntr);
Aud_HDMI_Clk_cntr--;
if (Aud_HDMI_Clk_cntr == 0)
{
AudDrv_ANA_Clk_Off();
AudDrv_Clk_Off();
}
else if (Aud_HDMI_Clk_cntr < 0)
{
PRINTK_AUD_ERROR("!! AudDrv_Linein_Clk_Off, Aud_I2S_Clk_cntr<0 (%d) \n", Aud_HDMI_Clk_cntr);
AUDIO_ASSERT(true);
Aud_HDMI_Clk_cntr = 0;
}
PRINTK_AUD_CLK("-AudDrv_I2S_Clk_Off, Aud_I2S_Clk_cntr:%d \n", Aud_HDMI_Clk_cntr);
}
void AudDrv_ANA_Clk_Off(void)
{
//PRINTK_AUD_CLK("+AudDrv_ANA_Clk_Off, Aud_ADC_Clk_cntr:%d \n", Aud_ANA_Clk_cntr);
mutex_lock(&auddrv_pmic_mutex);
Aud_ANA_Clk_cntr--;
if (Aud_ANA_Clk_cntr == 0)
{
PRINTK_AUD_CLK("+AudDrv_ANA_Clk_Off disable_clock Ana clk(%x)\n", Aud_ANA_Clk_cntr);
// Disable ADC clock
#ifdef PM_MANAGER_API
#else
// TODO:: open ADC clock....
#endif
}
else if (Aud_ANA_Clk_cntr < 0)
{
PRINTK_AUD_ERROR("!! AudDrv_ANA_Clk_Off, Aud_ADC_Clk_cntr<0 (%d) \n", Aud_ANA_Clk_cntr);
AUDIO_ASSERT(true);
Aud_ANA_Clk_cntr = 0;
}
mutex_unlock(&auddrv_pmic_mutex);
//PRINTK_AUD_CLK("-AudDrv_ANA_Clk_Off, Aud_ADC_Clk_cntr:%d \n", Aud_ANA_Clk_cntr);
}
void AudDrv_Clk_Off(void)
{
unsigned long flags;
PRINTK_AUD_CLK("+!! AudDrv_Clk_Off, Aud_AFE_Clk_cntr:%d \n",Aud_AFE_Clk_cntr);
spin_lock_irqsave(&auddrv_Clk_lock, flags);
Aud_AFE_Clk_cntr--;
if (Aud_AFE_Clk_cntr == 0)
{
pr_err("------------AudDrv_Clk_Off, Aud_AFE_Clk_cntr:%d \n", Aud_AFE_Clk_cntr);
{
// Disable AFE clock
#ifdef PM_MANAGER_API
#if defined(CONFIG_MTK_LEGACY)
if (disable_clock(MT_CG_AUDIO_AFE, "AUDIO"))
{
PRINTK_AUD_CLK("%s disable_clock MT_CG_AUDIO_AFE fail", __func__);
}
if (disable_clock(MT_CG_AUDIO_DAC, "AUDIO"))
{
PRINTK_AUD_CLK("%s MT_CG_AUDIO_DAC fail", __func__);
}
if (disable_clock(MT_CG_AUDIO_DAC_PREDIS, "AUDIO"))
{
PRINTK_AUD_CLK("%s MT_CG_AUDIO_DAC_PREDIS fail", __func__);
}
if (disable_clock(MT_CG_INFRA_AUDIO, "AUDIO"))
{
PRINTK_AUD_CLK("%s disable_clock MT_CG_INFRA_AUDIO fail", __func__);
}
#else
pr_err("-----------[CCF]AudDrv_Clk_Off, paudclk->aud_infra_clk_status:%d \n", paudclk->aud_infra_clk_status);
if (paudclk->aud_afe_clk_status)
{
clk_disable_unprepare(paudclk->aud_afe_clk);
}
if (paudclk->aud_dac_clk_status)
{
clk_disable_unprepare(paudclk->aud_dac_clk);
}
if (paudclk->aud_dac_predis_clk_status)
{
clk_disable_unprepare(paudclk->aud_dac_predis_clk);
}
if (paudclk->aud_infra_clk_status)
{
clk_disable_unprepare(paudclk->aud_infra_clk);
}
#endif
#else
Afe_Set_Reg(AUDIO_TOP_CON0, 0x06000044, 0x06000044);
SetInfraCfg(AUDIO_CG_SET, 0x2000000, 0x2000000); //bit25=1, with 133m mastesr and 66m slave bus clock cg gating
#endif
}
}
else if (Aud_AFE_Clk_cntr < 0)
{
PRINTK_AUD_ERROR("!! AudDrv_Clk_Off, Aud_AFE_Clk_cntr<0 (%d) \n", Aud_AFE_Clk_cntr);
AUDIO_ASSERT(true);
Aud_AFE_Clk_cntr = 0;
}
PRINTK_AUD_CLK("-!! AudDrv_Clk_Off, Aud_AFE_Clk_cntr:%d \n",Aud_AFE_Clk_cntr);
spin_unlock_irqrestore(&auddrv_Clk_lock, flags);
}
