/**Function*************************************************************
Synopsis [Prints statistics about latches.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkPrintLatch( FILE * pFile, Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pLatch, * pFanin;
int i, Counter0, Counter1, Counter2;
int InitNums[4], Init;
assert( !Abc_NtkIsNetlist(pNtk) );
if ( Abc_NtkLatchNum(pNtk) == 0 )
{
fprintf( pFile, "The network is combinational.\n" );
return;
}
for ( i = 0; i < 4; i++ )
InitNums[i] = 0;
Counter0 = Counter1 = Counter2 = 0;
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
Init = Abc_LatchInit( pLatch );
assert( Init < 4 );
InitNums[Init]++;
pFanin = Abc_ObjFanin0(Abc_ObjFanin0(pLatch));
if ( Abc_NtkIsLogic(pNtk) )
{
if ( !Abc_NodeIsConst(pFanin) )
continue;
}
else if ( Abc_NtkIsStrash(pNtk) )
{
if ( !Abc_AigNodeIsConst(pFanin) )
continue;
}
else
assert( 0 );
// the latch input is a constant node
Counter0++;
if ( Abc_LatchIsInitDc(pLatch) )
{
Counter1++;
continue;
}
// count the number of cases when the constant is equal to the initial value
if ( Abc_NtkIsStrash(pNtk) )
{
if ( Abc_LatchIsInit1(pLatch) == !Abc_ObjFaninC0(pLatch) )
Counter2++;
}
else
{
if ( Abc_LatchIsInit1(pLatch) == Abc_NodeIsConst1(pLatch) )
Counter2++;
}
}
/**Function*************************************************************
Synopsis [Prints initial state information.]
Description [Prints distribution of 0,1,and X initial states.]
SideEffects []
SeeAlso []
***********************************************************************/
void
Abc_FlowRetime_PrintInitStateInfo( Abc_Ntk_t * pNtk ) {
int i, n0=0, n1=0, nDC=0, nOther=0;
Abc_Obj_t *pLatch;
Abc_NtkForEachLatch( pNtk, pLatch, i ) {
if (Abc_LatchIsInit0(pLatch)) n0++;
else if (Abc_LatchIsInit1(pLatch)) n1++;
else if (Abc_LatchIsInitDc(pLatch)) nDC++;
else nOther++;
}
printf("\tinitial states {0,1,x} = {%d, %d, %d}", n0, n1, nDC);
if (nOther)
printf(" + %d UNKNOWN", nOther);
printf("\n");
}