/**Function*************************************************************
Synopsis [Computes initial values of the new latches.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Abc_NtkRetimeInitialValues( Abc_Ntk_t * pNtkCone, Vec_Int_t * vValues, int fVerbose )
{
Vec_Int_t * vSolution;
Abc_Ntk_t * pNtkMiter, * pNtkLogic;
int RetValue;
abctime clk;
if ( pNtkCone == NULL )
return Vec_IntDup( vValues );
// convert the target network to AIG
pNtkLogic = Abc_NtkDup( pNtkCone );
Abc_NtkToAig( pNtkLogic );
// get the miter
pNtkMiter = Abc_NtkCreateTarget( pNtkLogic, pNtkLogic->vCos, vValues );
if ( fVerbose )
printf( "The miter for initial state computation has %d AIG nodes. ", Abc_NtkNodeNum(pNtkMiter) );
// solve the miter
clk = Abc_Clock();
RetValue = Abc_NtkMiterSat( pNtkMiter, (ABC_INT64_T)500000, (ABC_INT64_T)50000000, 0, NULL, NULL );
if ( fVerbose )
{ ABC_PRT( "SAT solving time", Abc_Clock() - clk ); }
// analyze the result
if ( RetValue == 1 )
printf( "Abc_NtkRetimeInitialValues(): The problem is unsatisfiable. DC latch values are used.\n" );
else if ( RetValue == -1 )
printf( "Abc_NtkRetimeInitialValues(): The SAT problem timed out. DC latch values are used.\n" );
else if ( !Abc_NtkRetimeVerifyModel( pNtkCone, vValues, pNtkMiter->pModel ) )
printf( "Abc_NtkRetimeInitialValues(): The computed counter-example is incorrect.\n" );
// set the values of the latches
vSolution = RetValue? NULL : Vec_IntAllocArray( pNtkMiter->pModel, Abc_NtkPiNum(pNtkLogic) );
pNtkMiter->pModel = NULL;
Abc_NtkDelete( pNtkMiter );
Abc_NtkDelete( pNtkLogic );
return vSolution;
}
/**Function*************************************************************
Synopsis [Clears variables.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static
void AbcBridge_NtkVectorClearVars( Abc_Ntk_t * pNtk, Vec_Int_t * vPiValues, int nPars )
{
int i;
for ( i = nPars; i < Abc_NtkPiNum(pNtk); i++ )
Vec_IntWriteEntry( vPiValues, i, -1 );
}
/**Function*************************************************************
Synopsis [Tranfers names to the old network.]
Description [Assumes that the new nodes are attached using pObj->pCopy.]
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkTrasferNames( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew )
{
Abc_Obj_t * pObj;
int i;
assert( Abc_NtkPiNum(pNtk) == Abc_NtkPiNum(pNtkNew) );
assert( Abc_NtkPoNum(pNtk) == Abc_NtkPoNum(pNtkNew) );
assert( Abc_NtkBoxNum(pNtk) == Abc_NtkBoxNum(pNtkNew) );
assert( Nm_ManNumEntries(pNtk->pManName) > 0 );
assert( Nm_ManNumEntries(pNtkNew->pManName) == 0 );
// copy the CI/CO/box names
Abc_NtkForEachCi( pNtk, pObj, i )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanout0Ntk(pObj)), NULL );
Abc_NtkForEachCo( pNtk, pObj, i )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanin0Ntk(pObj)), NULL );
Abc_NtkForEachBox( pNtk, pObj, i )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
}
/**Function*************************************************************
Synopsis [Translates model into the vector of values.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static
void AbcBridge_NtkModelToVector( Abc_Ntk_t * pNtk, Vec_Int_t * vPiValues )
{
int * pModel, i;
pModel = pNtk->pModel;
for ( i = 0; i < Abc_NtkPiNum(pNtk); i++ )
Vec_IntWriteEntry( vPiValues, i, pModel[i] );
}
/**Function*************************************************************
Synopsis [Tranfers names to the old network.]
Description [Assumes that the new nodes are attached using pObj->pCopy.]
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkTrasferNamesNoLatches( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew )
{
Abc_Obj_t * pObj;
int i;
assert( Abc_NtkPiNum(pNtk) == Abc_NtkPiNum(pNtkNew) );
assert( Abc_NtkPoNum(pNtk) == Abc_NtkPoNum(pNtkNew) );
assert( Nm_ManNumEntries(pNtk->pManName) > 0 );
assert( Nm_ManNumEntries(pNtkNew->pManName) == 0 );
// copy the CI/CO/box name and skip latches and theirs inputs/outputs
Abc_NtkForEachCi( pNtk, pObj, i )
if ( Abc_ObjFaninNum(pObj) == 0 || !Abc_ObjIsLatch(Abc_ObjFanin0(pObj)) )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanout0Ntk(pObj)), NULL );
Abc_NtkForEachCo( pNtk, pObj, i )
if ( Abc_ObjFanoutNum(pObj) == 0 || !Abc_ObjIsLatch(Abc_ObjFanout0(pObj)) )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanin0Ntk(pObj)), NULL );
Abc_NtkForEachBox( pNtk, pObj, i )
if ( !Abc_ObjIsLatch(pObj) )
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
}
/**Function*************************************************************
Synopsis [Starts a new network using existing network as a model.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkStartFromNoLatches( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc_NtkFunc_t Func )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj;
int i;
if ( pNtk == NULL )
return NULL;
assert( Type != ABC_NTK_NETLIST );
// start the network
pNtkNew = Abc_NtkAlloc( Type, Func, 1 );
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
// clean the node copy fields
Abc_NtkCleanCopy( pNtk );
// map the constant nodes
if ( Abc_NtkIsStrash(pNtk) && Abc_NtkIsStrash(pNtkNew) )
Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// clone CIs/CIs/boxes
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkDupObj( pNtkNew, pObj, 1 );
Abc_NtkForEachPo( pNtk, pObj, i )
Abc_NtkDupObj( pNtkNew, pObj, 1 );
Abc_NtkForEachAssert( pNtk, pObj, i )
Abc_NtkDupObj( pNtkNew, pObj, 1 );
Abc_NtkForEachBox( pNtk, pObj, i )
{
if ( Abc_ObjIsLatch(pObj) )
continue;
Abc_NtkDupBox(pNtkNew, pObj, 1);
}
// transfer the names
// Abc_NtkTrasferNamesNoLatches( pNtk, pNtkNew );
Abc_ManTimeDup( pNtk, pNtkNew );
// check that the CI/CO/latches are copied correctly
assert( Abc_NtkPiNum(pNtk) == Abc_NtkPiNum(pNtkNew) );
assert( Abc_NtkPoNum(pNtk) == Abc_NtkPoNum(pNtkNew) );
return pNtkNew;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Computes the initial state and sets up the variable map.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Abc_NtkInitStateVarMap( DdManager * dd, Abc_Ntk_t * pNtk, int fVerbose )
{
DdNode ** pbVarsX, ** pbVarsY;
DdNode * bTemp, * bProd, * bVar;
Abc_Obj_t * pLatch;
int i;
// set the variable mapping for Cudd_bddVarMap()
pbVarsX = ABC_ALLOC( DdNode *, dd->size );
pbVarsY = ABC_ALLOC( DdNode *, dd->size );
bProd = b1; Cudd_Ref( bProd );
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
pbVarsX[i] = dd->vars[ Abc_NtkPiNum(pNtk) + i ];
pbVarsY[i] = dd->vars[ Abc_NtkCiNum(pNtk) + i ];
// get the initial value of the latch
bVar = Cudd_NotCond( pbVarsX[i], !Abc_LatchIsInit1(pLatch) );
bProd = Cudd_bddAnd( dd, bTemp = bProd, bVar ); Cudd_Ref( bProd );
Cudd_RecursiveDeref( dd, bTemp );
}
/**Function*************************************************************
Synopsis [Prints PIs/POs and LIs/LOs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkPrintIo( FILE * pFile, Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i;
fprintf( pFile, "Primary inputs (%d): ", Abc_NtkPiNum(pNtk) );
Abc_NtkForEachPi( pNtk, pObj, i )
fprintf( pFile, " %s", Abc_ObjName(pObj) );
// fprintf( pFile, " %s(%d)", Abc_ObjName(pObj), Abc_ObjFanoutNum(pObj) );
fprintf( pFile, "\n" );
fprintf( pFile, "Primary outputs (%d):", Abc_NtkPoNum(pNtk) );
Abc_NtkForEachPo( pNtk, pObj, i )
fprintf( pFile, " %s", Abc_ObjName(pObj) );
fprintf( pFile, "\n" );
fprintf( pFile, "Latches (%d): ", Abc_NtkLatchNum(pNtk) );
Abc_NtkForEachLatch( pNtk, pObj, i )
fprintf( pFile, " %s(%s=%s)", Abc_ObjName(pObj),
Abc_ObjName(Abc_ObjFanout0(pObj)), Abc_ObjName(Abc_ObjFanin0(pObj)) );
fprintf( pFile, "\n" );
}
/**Function*************************************************************
Synopsis [Load the network into FPGA manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching, int fLatchPaths, int fVerbose )
{
Fpga_Man_t * pMan;
ProgressBar * pProgress;
Fpga_Node_t * pNodeFpga;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pNode, * pFanin, * pPrev;
float * pfArrivals;
int i;
assert( Abc_NtkIsStrash(pNtk) );
// start the mapping manager and set its parameters
pMan = Fpga_ManCreate( Abc_NtkCiNum(pNtk), Abc_NtkCoNum(pNtk), fVerbose );
if ( pMan == NULL )
return NULL;
Fpga_ManSetAreaRecovery( pMan, fRecovery );
Fpga_ManSetOutputNames( pMan, Abc_NtkCollectCioNames(pNtk, 1) );
pfArrivals = Abc_NtkGetCiArrivalFloats(pNtk);
if ( fLatchPaths )
{
for ( i = 0; i < Abc_NtkPiNum(pNtk); i++ )
pfArrivals[i] = -FPGA_FLOAT_LARGE;
}
Fpga_ManSetInputArrivals( pMan, pfArrivals );
// create PIs and remember them in the old nodes
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Fpga_ManReadConst1(pMan);
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNodeFpga = Fpga_ManReadInputs(pMan)[i];
pNode->pCopy = (Abc_Obj_t *)pNodeFpga;
if ( pSwitching )
Fpga_NodeSetSwitching( pNodeFpga, pSwitching[pNode->Id] );
}
/**Function*************************************************************
Synopsis [Verifies sequential equivalence by fraiging followed by SAT.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkCecFraigPartAuto( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int fVerbose )
{
extern int Abc_NtkCombinePos( Abc_Ntk_t * pNtk, int fAnd );
extern Vec_Ptr_t * Abc_NtkPartitionSmart( Abc_Ntk_t * pNtk, int nPartSizeLimit, int fVerbose );
extern void Abc_NtkConvertCos( Abc_Ntk_t * pNtk, Vec_Int_t * vOuts, Vec_Ptr_t * vOnePtr );
Vec_Ptr_t * vParts, * vOnePtr;
Vec_Int_t * vOne;
Prove_Params_t Params, * pParams = &Params;
Abc_Ntk_t * pMiter, * pMiterPart;
int i, RetValue, Status, nOutputs;
// solve the CNF using the SAT solver
Prove_ParamsSetDefault( pParams );
pParams->nItersMax = 5;
// pParams->fVerbose = 1;
// get the miter of the two networks
pMiter = Abc_NtkMiter( pNtk1, pNtk2, 1, 1, 0, 0 );
if ( pMiter == NULL )
{
printf( "Miter computation has failed.\n" );
return;
}
RetValue = Abc_NtkMiterIsConstant( pMiter );
if ( RetValue == 0 )
{
printf( "Networks are NOT EQUIVALENT after structural hashing.\n" );
// report the error
pMiter->pModel = Abc_NtkVerifyGetCleanModel( pMiter, 1 );
Abc_NtkVerifyReportError( pNtk1, pNtk2, pMiter->pModel );
ABC_FREE( pMiter->pModel );
Abc_NtkDelete( pMiter );
return;
}
if ( RetValue == 1 )
{
printf( "Networks are equivalent after structural hashing.\n" );
Abc_NtkDelete( pMiter );
return;
}
Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "unset progressbar" );
// partition the outputs
vParts = Abc_NtkPartitionSmart( pMiter, 300, 0 );
// fraig each partition
Status = 1;
nOutputs = 0;
vOnePtr = Vec_PtrAlloc( 1000 );
Vec_PtrForEachEntry( Vec_Int_t *, vParts, vOne, i )
{
// get this part of the miter
Abc_NtkConvertCos( pMiter, vOne, vOnePtr );
pMiterPart = Abc_NtkCreateConeArray( pMiter, vOnePtr, 0 );
Abc_NtkCombinePos( pMiterPart, 0 );
// check the miter for being constant
RetValue = Abc_NtkMiterIsConstant( pMiterPart );
if ( RetValue == 0 )
{
printf( "Networks are NOT EQUIVALENT after partitioning.\n" );
Abc_NtkDelete( pMiterPart );
break;
}
if ( RetValue == 1 )
{
Abc_NtkDelete( pMiterPart );
continue;
}
printf( "Verifying part %4d (out of %4d) PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r",
i+1, Vec_PtrSize(vParts), Abc_NtkPiNum(pMiterPart), Abc_NtkPoNum(pMiterPart),
Abc_NtkNodeNum(pMiterPart), Abc_AigLevel(pMiterPart) );
fflush( stdout );
// solve the problem
RetValue = Abc_NtkIvyProve( &pMiterPart, pParams );
if ( RetValue == -1 )
{
printf( "Networks are undecided (resource limits is reached).\r" );
Status = -1;
}
else if ( RetValue == 0 )
{
int * pSimInfo = Abc_NtkVerifySimulatePattern( pMiterPart, pMiterPart->pModel );
if ( pSimInfo[0] != 1 )
printf( "ERROR in Abc_NtkMiterProve(): Generated counter-example is invalid.\n" );
else
printf( "Networks are NOT EQUIVALENT. \n" );
ABC_FREE( pSimInfo );
Status = 0;
Abc_NtkDelete( pMiterPart );
break;
}
else
{
// printf( "Finished part %5d (out of %5d)\r", i+1, Vec_PtrSize(vParts) );
nOutputs += Vec_IntSize(vOne);
}
Abc_NtkDelete( pMiterPart );
}
/**Function*************************************************************
Synopsis [Connect one box.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkConnectBoxesOneBox( Io_ReadBlif_t * p, Abc_Obj_t * pBox, stmm_table * tName2Model )
{
Vec_Ptr_t * pNames;
Abc_Ntk_t * pNtkModel;
Abc_Obj_t * pObj, * pNet;
char * pName = NULL, * pActual;
int i, Length, Start = -1;
// get the model for this box
pNames = (Vec_Ptr_t *)pBox->pData;
if ( !stmm_lookup( tName2Model, (char *)Vec_PtrEntry(pNames, 0), (char **)&pNtkModel ) )
{
p->LineCur = (int)(ABC_PTRINT_T)pBox->pCopy;
sprintf( p->sError, "Cannot find the model for subcircuit %s.", (char*)Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// create the fanins of the box
Abc_NtkForEachPi( pNtkModel, pObj, i )
pObj->pCopy = NULL;
if ( Abc_NtkPiNum(pNtkModel) == 0 )
Start = 1;
else
{
Vec_PtrForEachEntryStart( char *, pNames, pName, i, 1 )
{
pActual = Io_ReadBlifCleanName(pName);
if ( pActual == NULL )
{
p->LineCur = (int)(ABC_PTRINT_T)pBox->pCopy;
sprintf( p->sError, "Cannot parse formal/actual name pair \"%s\".", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
Length = pActual - pName - 1;
pName[Length] = 0;
// find the PI net with this name
pObj = Abc_NtkFindNet( pNtkModel, pName );
if ( pObj == NULL )
{
p->LineCur = (int)(ABC_PTRINT_T)pBox->pCopy;
sprintf( p->sError, "Cannot find formal input \"%s\" as an PI of model \"%s\".", pName, (char*)Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// get the PI
pObj = Abc_ObjFanin0(pObj);
// quit if this is not a PI net
if ( !Abc_ObjIsPi(pObj) )
{
pName[Length] = '=';
Start = i;
break;
}
// remember the actual name in the net
if ( pObj->pCopy != NULL )
{
p->LineCur = (int)(ABC_PTRINT_T)pBox->pCopy;
sprintf( p->sError, "Formal input \"%s\" is used more than once.", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pObj->pCopy = (Abc_Obj_t *)pActual;
// quit if we processed all PIs
if ( i == Abc_NtkPiNum(pNtkModel) )
{
Start = i+1;
break;
}
}
}
// create the fanins of the box
Abc_NtkForEachPi( pNtkModel, pObj, i )
{
pActual = (char *)pObj->pCopy;
if ( pActual == NULL )
{
p->LineCur = (int)(ABC_PTRINT_T)pBox->pCopy;
sprintf( p->sError, "Formal input \"%s\" of model %s is not driven.", pName, (char*)Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pNet = Abc_NtkFindOrCreateNet( pBox->pNtk, pActual );
Abc_ObjAddFanin( pBox, pNet );
}
/**Function*************************************************************
Synopsis [Load the network into manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Map_Man_t * Abc_NtkToMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, float * pSwitching, int fVerbose )
{
Map_Man_t * pMan;
Map_Node_t * pNodeMap;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pNode, * pFanin, * pPrev;
int i;
assert( Abc_NtkIsStrash(pNtk) );
// start the mapping manager and set its parameters
pMan = Map_ManCreate( Abc_NtkPiNum(pNtk) + Abc_NtkLatchNum(pNtk) - pNtk->nBarBufs, Abc_NtkPoNum(pNtk) + Abc_NtkLatchNum(pNtk) - pNtk->nBarBufs, fVerbose );
if ( pMan == NULL )
return NULL;
Map_ManSetAreaRecovery( pMan, fRecovery );
Map_ManSetOutputNames( pMan, Abc_NtkCollectCioNames(pNtk, 1) );
Map_ManSetDelayTarget( pMan, (float)DelayTarget );
Map_ManSetInputArrivals( pMan, Abc_NtkMapCopyCiArrival(pNtk, Abc_NtkGetCiArrivalTimes(pNtk)) );
Map_ManSetOutputRequireds( pMan, Abc_NtkMapCopyCoRequired(pNtk, Abc_NtkGetCoRequiredTimes(pNtk)) );
// create PIs and remember them in the old nodes
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Map_ManReadConst1(pMan);
Abc_NtkForEachCi( pNtk, pNode, i )
{
if ( i == Abc_NtkCiNum(pNtk) - pNtk->nBarBufs )
break;
pNodeMap = Map_ManReadInputs(pMan)[i];
pNode->pCopy = (Abc_Obj_t *)pNodeMap;
if ( pSwitching )
Map_NodeSetSwitching( pNodeMap, pSwitching[pNode->Id] );
}
// load the AIG into the mapper
vNodes = Abc_AigDfsMap( pNtk );
Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i )
{
if ( Abc_ObjIsLatch(pNode) )
{
pFanin = Abc_ObjFanin0(pNode);
pNodeMap = Map_NodeBuf( pMan, Map_NotCond( Abc_ObjFanin0(pFanin)->pCopy, (int)Abc_ObjFaninC0(pFanin) ) );
Abc_ObjFanout0(pNode)->pCopy = (Abc_Obj_t *)pNodeMap;
continue;
}
assert( Abc_ObjIsNode(pNode) );
// add the node to the mapper
pNodeMap = Map_NodeAnd( pMan,
Map_NotCond( Abc_ObjFanin0(pNode)->pCopy, (int)Abc_ObjFaninC0(pNode) ),
Map_NotCond( Abc_ObjFanin1(pNode)->pCopy, (int)Abc_ObjFaninC1(pNode) ) );
assert( pNode->pCopy == NULL );
// remember the node
pNode->pCopy = (Abc_Obj_t *)pNodeMap;
if ( pSwitching )
Map_NodeSetSwitching( pNodeMap, pSwitching[pNode->Id] );
// set up the choice node
if ( Abc_AigNodeIsChoice( pNode ) )
for ( pPrev = pNode, pFanin = (Abc_Obj_t *)pNode->pData; pFanin; pPrev = pFanin, pFanin = (Abc_Obj_t *)pFanin->pData )
{
Map_NodeSetNextE( (Map_Node_t *)pPrev->pCopy, (Map_Node_t *)pFanin->pCopy );
Map_NodeSetRepr( (Map_Node_t *)pFanin->pCopy, (Map_Node_t *)pNode->pCopy );
}
}
assert( Map_ManReadBufNum(pMan) == pNtk->nBarBufs );
Vec_PtrFree( vNodes );
// set the primary outputs in the required phase
Abc_NtkForEachCo( pNtk, pNode, i )
{
if ( i == Abc_NtkCoNum(pNtk) - pNtk->nBarBufs )
break;
Map_ManReadOutputs(pMan)[i] = Map_NotCond( (Map_Node_t *)Abc_ObjFanin0(pNode)->pCopy, (int)Abc_ObjFaninC0(pNode) );
}
return pMan;
}
/**Function*************************************************************
Synopsis [Print the vital stats of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
{
int Num;
// if ( Abc_NtkIsStrash(pNtk) )
// Abc_AigCountNext( pNtk->pManFunc );
fprintf( pFile, "%-13s:", pNtk->pName );
if ( Abc_NtkAssertNum(pNtk) )
fprintf( pFile, " i/o/a = %4d/%4d/%4d", Abc_NtkPiNum(pNtk), Abc_NtkPoNum(pNtk), Abc_NtkAssertNum(pNtk) );
else
fprintf( pFile, " i/o = %4d/%4d", Abc_NtkPiNum(pNtk), Abc_NtkPoNum(pNtk) );
fprintf( pFile, " lat = %4d", Abc_NtkLatchNum(pNtk) );
if ( Abc_NtkIsNetlist(pNtk) )
{
fprintf( pFile, " net = %5d", Abc_NtkNetNum(pNtk) );
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
fprintf( pFile, " wbox = %3d", Abc_NtkWhiteboxNum(pNtk) );
fprintf( pFile, " bbox = %3d", Abc_NtkBlackboxNum(pNtk) );
}
else if ( Abc_NtkIsStrash(pNtk) )
{
fprintf( pFile, " and = %5d", Abc_NtkNodeNum(pNtk) );
if ( Num = Abc_NtkGetChoiceNum(pNtk) )
fprintf( pFile, " (choice = %d)", Num );
if ( Num = Abc_NtkGetExorNum(pNtk) )
fprintf( pFile, " (exor = %d)", Num );
// if ( Num2 = Abc_NtkGetMuxNum(pNtk) )
// fprintf( pFile, " (mux = %d)", Num2-Num );
// if ( Num2 )
// fprintf( pFile, " (other = %d)", Abc_NtkNodeNum(pNtk)-3*Num2 );
}
else
{
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
fprintf( pFile, " net = %5d", Abc_NtkGetTotalFanins(pNtk) );
}
if ( Abc_NtkIsStrash(pNtk) || Abc_NtkIsNetlist(pNtk) )
{
}
else if ( Abc_NtkHasSop(pNtk) )
{
fprintf( pFile, " cube = %5d", Abc_NtkGetCubeNum(pNtk) );
// fprintf( pFile, " lit(sop) = %5d", Abc_NtkGetLitNum(pNtk) );
if ( fFactored )
fprintf( pFile, " lit(fac) = %5d", Abc_NtkGetLitFactNum(pNtk) );
}
else if ( Abc_NtkHasAig(pNtk) )
fprintf( pFile, " aig = %5d", Abc_NtkGetAigNodeNum(pNtk) );
else if ( Abc_NtkHasBdd(pNtk) )
fprintf( pFile, " bdd = %5d", Abc_NtkGetBddNodeNum(pNtk) );
else if ( Abc_NtkHasMapping(pNtk) )
{
fprintf( pFile, " area = %5.2f", Abc_NtkGetMappedArea(pNtk) );
fprintf( pFile, " delay = %5.2f", Abc_NtkDelayTrace(pNtk) );
}
else if ( !Abc_NtkHasBlackbox(pNtk) )
{
assert( 0 );
}
if ( Abc_NtkIsStrash(pNtk) )
fprintf( pFile, " lev = %3d", Abc_AigLevel(pNtk) );
else
fprintf( pFile, " lev = %3d", Abc_NtkLevel(pNtk) );
fprintf( pFile, "\n" );
// Abc_NtkCrossCut( pNtk );
// print the statistic into a file
/*
{
FILE * pTable;
pTable = fopen( "iscas/seqmap__stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pSpec );
fprintf( pTable, "%.0f ", Abc_NtkGetMappedArea(pNtk) );
fprintf( pTable, "%.2f ", Abc_NtkDelayTrace(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "x/stats_new.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
// fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkGetTotalFanins(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
// fprintf( pTable, "%.2f ", (float)(s_MappingMem)/(float)(1<<20) );
fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
// fprintf( pTable, "%.2f", (float)(s_ResynTime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
s_ResynTime = 0;
}
*/
/*
// print the statistic into a file
{
static int Counter = 0;
extern int timeRetime;
FILE * pTable;
Counter++;
pTable = fopen( "a/ret__stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
fprintf( pTable, "%.2f ", (float)(timeRetime)/(float)(CLOCKS_PER_SEC) );
if ( Counter % 4 == 0 )
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
static int Counter = 0;
extern int timeRetime;
FILE * pTable;
Counter++;
pTable = fopen( "d/stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
// fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%.2f ", (float)(timeRetime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
s_TotalNodes += Abc_NtkNodeNum(pNtk);
printf( "Total nodes = %6d %6.2f Mb Changes = %6d.\n",
s_TotalNodes, s_TotalNodes * 20.0 / (1<<20), s_TotalChanges );
*/
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p )
{
ProgressBar * pProgress;
Vec_Ptr_t * vTokens;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pTermPi, * pTermPo, * pNode;
Vec_Str_t ** ppSops;
char Buffer[100];
int nInputs = -1, nOutputs = -1, nProducts = -1;
char * pCubeIn, * pCubeOut;
int i, k, iLine, nDigits, nCubes;
// allocate the empty network
pNtk = Abc_NtkStartRead( Extra_FileReaderGetFileName(p) );
// go through the lines of the file
nCubes = 0;
pProgress = Extra_ProgressBarStart( stdout, Extra_FileReaderGetFileSize(p) );
for ( iLine = 0; vTokens = Extra_FileReaderGetTokens(p); iLine++ )
{
Extra_ProgressBarUpdate( pProgress, Extra_FileReaderGetCurPosition(p), NULL );
// if it is the end of file, quit the loop
if ( strcmp( vTokens->pArray[0], ".e" ) == 0 )
break;
if ( vTokens->nSize == 1 )
{
printf( "%s (line %d): Wrong number of token.\n",
Extra_FileReaderGetFileName(p), iLine+1 );
Abc_NtkDelete( pNtk );
return NULL;
}
if ( strcmp( vTokens->pArray[0], ".i" ) == 0 )
nInputs = atoi(vTokens->pArray[1]);
else if ( strcmp( vTokens->pArray[0], ".o" ) == 0 )
nOutputs = atoi(vTokens->pArray[1]);
else if ( strcmp( vTokens->pArray[0], ".p" ) == 0 )
nProducts = atoi(vTokens->pArray[1]);
else if ( strcmp( vTokens->pArray[0], ".ilb" ) == 0 )
{
if ( vTokens->nSize - 1 != nInputs )
printf( "Warning: Mismatch between the number of PIs on the .i line (%d) and the number of PIs on the .ilb line (%d).\n", nInputs, vTokens->nSize - 1 );
for ( i = 1; i < vTokens->nSize; i++ )
Io_ReadCreatePi( pNtk, vTokens->pArray[i] );
}
else if ( strcmp( vTokens->pArray[0], ".ob" ) == 0 )
{
if ( vTokens->nSize - 1 != nOutputs )
printf( "Warning: Mismatch between the number of POs on the .o line (%d) and the number of POs on the .ob line (%d).\n", nOutputs, vTokens->nSize - 1 );
for ( i = 1; i < vTokens->nSize; i++ )
Io_ReadCreatePo( pNtk, vTokens->pArray[i] );
}
else
{
// check if the input/output names are given
if ( Abc_NtkPiNum(pNtk) == 0 )
{
if ( nInputs == -1 )
{
printf( "%s: The number of inputs is not specified.\n", Extra_FileReaderGetFileName(p) );
Abc_NtkDelete( pNtk );
return NULL;
}
nDigits = Extra_Base10Log( nInputs );
for ( i = 0; i < nInputs; i++ )
{
sprintf( Buffer, "x%0*d", nDigits, i );
Io_ReadCreatePi( pNtk, Buffer );
}
}
if ( Abc_NtkPoNum(pNtk) == 0 )
{
if ( nOutputs == -1 )
{
printf( "%s: The number of outputs is not specified.\n", Extra_FileReaderGetFileName(p) );
Abc_NtkDelete( pNtk );
return NULL;
}
nDigits = Extra_Base10Log( nOutputs );
for ( i = 0; i < nOutputs; i++ )
{
sprintf( Buffer, "z%0*d", nDigits, i );
Io_ReadCreatePo( pNtk, Buffer );
}
}
if ( Abc_NtkNodeNum(pNtk) == 0 )
{ // first time here
// create the PO drivers and add them
// start the SOP covers
ppSops = ALLOC( Vec_Str_t *, nOutputs );
Abc_NtkForEachPo( pNtk, pTermPo, i )
{
ppSops[i] = Vec_StrAlloc( 100 );
// create the node
pNode = Abc_NtkCreateNode(pNtk);
// connect the node to the PO net
Abc_ObjAddFanin( Abc_ObjFanin0Ntk(pTermPo), pNode );
// connect the node to the PI nets
Abc_NtkForEachPi( pNtk, pTermPi, k )
Abc_ObjAddFanin( pNode, Abc_ObjFanout0Ntk(pTermPi) );
}
}
// read the cubes
if ( vTokens->nSize != 2 )
{
printf( "%s (line %d): Input and output cubes are not specified.\n",
Extra_FileReaderGetFileName(p), iLine+1 );
Abc_NtkDelete( pNtk );
return NULL;
}
pCubeIn = vTokens->pArray[0];
pCubeOut = vTokens->pArray[1];
if ( strlen(pCubeIn) != (unsigned)nInputs )
{
printf( "%s (line %d): Input cube length (%d) differs from the number of inputs (%d).\n",
Extra_FileReaderGetFileName(p), iLine+1, strlen(pCubeIn), nInputs );
Abc_NtkDelete( pNtk );
return NULL;
}
if ( strlen(pCubeOut) != (unsigned)nOutputs )
{
printf( "%s (line %d): Output cube length (%d) differs from the number of outputs (%d).\n",
Extra_FileReaderGetFileName(p), iLine+1, strlen(pCubeOut), nOutputs );
Abc_NtkDelete( pNtk );
return NULL;
}
for ( i = 0; i < nOutputs; i++ )
{
if ( pCubeOut[i] == '1' )
{
Vec_StrAppend( ppSops[i], pCubeIn );
Vec_StrAppend( ppSops[i], " 1\n" );
}
}
nCubes++;
}
bRel = b1; Cudd_Ref( bRel );
Abc_NtkForEachLatch( pNtk, pNode, i )
{
bVar = Cudd_bddIthVar( dd, Abc_NtkCiNum(pNtk) + i );
// bProd = Cudd_bddXnor( dd, bVar, pNtk->vFuncsGlob->pArray[i] ); Cudd_Ref( bProd );
bProd = Cudd_bddXnor( dd, bVar, Abc_ObjGlobalBdd(Abc_ObjFanin0(pNode)) ); Cudd_Ref( bProd );
bRel = Cudd_bddAnd( dd, bTemp = bRel, bProd ); Cudd_Ref( bRel );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bProd );
}
// free the global BDDs
// Abc_NtkFreeGlobalBdds( pNtk );
Abc_NtkFreeGlobalBdds( pNtk, 0 );
// quantify the PI variables
bInputs = Extra_bddComputeRangeCube( dd, 0, Abc_NtkPiNum(pNtk) ); Cudd_Ref( bInputs );
bRel = Cudd_bddExistAbstract( dd, bTemp = bRel, bInputs ); Cudd_Ref( bRel );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bInputs );
// reorder and disable reordering
if ( fReorder )
{
if ( fVerbose )
fprintf( stdout, "BDD nodes in the transition relation before reordering %d.\n", Cudd_DagSize(bRel) );
Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
Cudd_AutodynDisable( dd );
if ( fVerbose )
fprintf( stdout, "BDD nodes in the transition relation after reordering %d.\n", Cudd_DagSize(bRel) );
}
Cudd_Deref( bRel );
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkMfs( Abc_Ntk_t * pNtk, Mfs_Par_t * pPars )
{
extern Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters );
Bdc_Par_t Pars = {0}, * pDecPars = &Pars;
ProgressBar * pProgress;
Mfs_Man_t * p;
Abc_Obj_t * pObj;
Vec_Vec_t * vLevels;
Vec_Ptr_t * vNodes;
int i, k, nNodes, nFaninMax;
abctime clk = Abc_Clock(), clk2;
int nTotalNodesBeg = Abc_NtkNodeNum(pNtk);
int nTotalEdgesBeg = Abc_NtkGetTotalFanins(pNtk);
assert( Abc_NtkIsLogic(pNtk) );
nFaninMax = Abc_NtkGetFaninMax(pNtk);
if ( pPars->fResub )
{
if ( nFaninMax > 8 )
{
printf( "Nodes with more than %d fanins will not be processed.\n", 8 );
nFaninMax = 8;
}
}
else
{
if ( nFaninMax > MFS_FANIN_MAX )
{
printf( "Nodes with more than %d fanins will not be processed.\n", MFS_FANIN_MAX );
nFaninMax = MFS_FANIN_MAX;
}
}
// perform the network sweep
// Abc_NtkSweep( pNtk, 0 );
// convert into the AIG
if ( !Abc_NtkToAig(pNtk) )
{
fprintf( stdout, "Converting to AIGs has failed.\n" );
return 0;
}
assert( Abc_NtkHasAig(pNtk) );
// start the manager
p = Mfs_ManAlloc( pPars );
p->pNtk = pNtk;
p->nFaninMax = nFaninMax;
// precomputer power-aware metrics
if ( pPars->fPower )
{
extern Vec_Int_t * Abc_NtkPowerEstimate( Abc_Ntk_t * pNtk, int fProbOne );
if ( pPars->fResub )
p->vProbs = Abc_NtkPowerEstimate( pNtk, 0 );
else
p->vProbs = Abc_NtkPowerEstimate( pNtk, 1 );
#if 0
printf( "Total switching before = %7.2f.\n", Abc_NtkMfsTotalSwitching(pNtk) );
#else
p->TotalSwitchingBeg = Abc_NtkMfsTotalSwitching(pNtk);
#endif
}
if ( pNtk->pExcare )
{
Abc_Ntk_t * pTemp;
if ( Abc_NtkPiNum((Abc_Ntk_t *)pNtk->pExcare) != Abc_NtkCiNum(pNtk) )
printf( "The PI count of careset (%d) and logic network (%d) differ. Careset is not used.\n",
Abc_NtkPiNum((Abc_Ntk_t *)pNtk->pExcare), Abc_NtkCiNum(pNtk) );
else
{
pTemp = Abc_NtkStrash( (Abc_Ntk_t *)pNtk->pExcare, 0, 0, 0 );
p->pCare = Abc_NtkToDar( pTemp, 0, 0 );
Abc_NtkDelete( pTemp );
p->vSuppsInv = Aig_ManSupportsInverse( p->pCare );
}
}
if ( p->pCare != NULL )
printf( "Performing optimization with %d external care clauses.\n", Aig_ManCoNum(p->pCare) );
// prepare the BDC manager
if ( !pPars->fResub )
{
pDecPars->nVarsMax = (nFaninMax < 3) ? 3 : nFaninMax;
pDecPars->fVerbose = pPars->fVerbose;
p->vTruth = Vec_IntAlloc( 0 );
p->pManDec = Bdc_ManAlloc( pDecPars );
}
// label the register outputs
if ( p->pCare )
{
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pData = (void *)(ABC_PTRUINT_T)i;
}
// compute levels
Abc_NtkLevel( pNtk );
Abc_NtkStartReverseLevels( pNtk, pPars->nGrowthLevel );
// compute don't-cares for each node
nNodes = 0;
p->nTotalNodesBeg = nTotalNodesBeg;
p->nTotalEdgesBeg = nTotalEdgesBeg;
if ( pPars->fResub )
{
#if 0
printf( "TotalSwitching (%7.2f --> ", Abc_NtkMfsTotalSwitching(pNtk) );
#endif
if (pPars->fPower)
{
Abc_NtkMfsPowerResub( p, pPars);
} else
{
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkObjNumMax(pNtk) );
Abc_NtkForEachNode( pNtk, pObj, i )
{
if ( p->pPars->nDepthMax && (int)pObj->Level > p->pPars->nDepthMax )
continue;
if ( Abc_ObjFaninNum(pObj) < 2 || Abc_ObjFaninNum(pObj) > nFaninMax )
continue;
if ( !p->pPars->fVeryVerbose )
Extra_ProgressBarUpdate( pProgress, i, NULL );
if ( pPars->fResub )
Abc_NtkMfsResub( p, pObj );
else
Abc_NtkMfsNode( p, pObj );
}
Extra_ProgressBarStop( pProgress );
#if 0
printf( " %7.2f )\n", Abc_NtkMfsTotalSwitching(pNtk) );
#endif
}
} else
/**Function*************************************************************
Synopsis [Solve the QBF problem EpAx[M(p,x)].]
Description [The network should be a Boolean network where, the variables
p go first, followed by variables x.
The number of parameters is nPars.
The number of iterations to try is nItersMax.
The inputs to try are in vPiValues, and it will store the
results if a model is found.
The return value is 1 if the problem is false, 0 if the problem is
true (and an assignment to p returned via vPiValeus), -1 if the
iteration limit reached, and -2 if the sat solver times out. ]
SideEffects []
SeeAlso []
***********************************************************************/
int AbcBridge_NtkQbf( Abc_Ntk_t * pNtk,
int nPars,
int nItersMax,
Vec_Int_t* vPiValues)
{
Abc_Ntk_t * pNtkVer, * pNtkSyn, * pNtkSyn2, * pNtkTemp;
int nIters, nInputs, RetValue, fFound = 0;
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkIsComb(pNtk) );
assert( Abc_NtkPoNum(pNtk) == 1 );
assert( nPars > 0 && nPars < Abc_NtkPiNum(pNtk) );
// assert( Abc_NtkPiNum(pNtk)-nPars < 32 );
nInputs = Abc_NtkPiNum(pNtk) - nPars;
assert(Vec_IntSize(vPiValues) == Abc_NtkPiNum(pNtk));
AbcBridge_NtkVectorClearPars( vPiValues, nPars );
pNtkSyn = Abc_NtkMiterCofactor( pNtk, vPiValues );
// iteratively solve
for ( nIters = 0; nIters < nItersMax; nIters++ )
{
// solve the synthesis instance
// RetValue = Abc_NtkMiterSat( pNtkSyn, 0, 0, 0, NULL, NULL );
RetValue = Abc_NtkDSat( pNtkSyn, (ABC_INT64_T)0, (ABC_INT64_T)0, 0, 0, 0, 1, 0, 0, 0 );
if ( RetValue == 0 )
AbcBridge_NtkModelToVector( pNtkSyn, vPiValues );
// Formula is unsat when forall variables replaced with concrete inputs, and
// thus unsat in general.
if ( RetValue == 1 )
{
Abc_NtkDelete(pNtkSyn);
return 1; // Return UNSAT
}
// Synthesis timed out.
if (RetValue == -1) {
Abc_NtkDelete(pNtkSyn);
return -2;
}
// there is a counter-example
// construct the verification instance
AbcBridge_NtkVectorClearVars( pNtk, vPiValues, nPars );
pNtkVer = Abc_NtkMiterCofactor( pNtk, vPiValues );
// complement the output
Abc_ObjXorFaninC( Abc_NtkPo(pNtkVer,0), 0 );
// solve the verification instance
RetValue = Abc_NtkMiterSat( pNtkVer, 0, 0, 0, NULL, NULL );
if ( RetValue == 0 )
AbcBridge_NtkModelToVector( pNtkVer, vPiValues );
Abc_NtkDelete( pNtkVer );
if ( RetValue == 1 )
{
Abc_NtkDelete( pNtkSyn );
return 0; // Return sat
}
// If verification timed out.
if ( RetValue == -1 ) {
Abc_NtkDelete(pNtkSyn);
return -2;
}
// there is a counter-example
// create a new synthesis network
AbcBridge_NtkVectorClearPars( vPiValues, nPars );
pNtkSyn2 = Abc_NtkMiterCofactor( pNtk, vPiValues );
// add to the synthesis instance
pNtkSyn = Abc_NtkMiterAnd( pNtkTemp = pNtkSyn, pNtkSyn2, 0, 0 );
Abc_NtkDelete( pNtkSyn2 );
Abc_NtkDelete( pNtkTemp );
}
Abc_NtkDelete( pNtkSyn );
// Limit reached.
return -1;
}
/**Function*************************************************************
Synopsis [Checks the integrity of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkDoCheck( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj, * pNet, * pNode;
int i;
// check network types
if ( !Abc_NtkIsNetlist(pNtk) && !Abc_NtkIsLogic(pNtk) && !Abc_NtkIsStrash(pNtk) )
{
fprintf( stdout, "NetworkCheck: Unknown network type.\n" );
return 0;
}
if ( !Abc_NtkHasSop(pNtk) && !Abc_NtkHasBdd(pNtk) && !Abc_NtkHasAig(pNtk) && !Abc_NtkHasMapping(pNtk) && !Abc_NtkHasBlifMv(pNtk) && !Abc_NtkHasBlackbox(pNtk) )
{
fprintf( stdout, "NetworkCheck: Unknown functionality type.\n" );
return 0;
}
if ( Abc_NtkHasMapping(pNtk) )
{
if ( pNtk->pManFunc != Abc_FrameReadLibGen() )
{
fprintf( stdout, "NetworkCheck: The library of the mapped network is not the global library.\n" );
return 0;
}
}
if ( Abc_NtkHasOnlyLatchBoxes(pNtk) )
{
// check CI/CO numbers
if ( Abc_NtkPiNum(pNtk) + Abc_NtkLatchNum(pNtk) != Abc_NtkCiNum(pNtk) )
{
fprintf( stdout, "NetworkCheck: Number of CIs does not match number of PIs and latches.\n" );
fprintf( stdout, "One possible reason is that latches are added twice:\n" );
fprintf( stdout, "in procedure Abc_NtkCreateObj() and in the user's code.\n" );
return 0;
}
if ( Abc_NtkPoNum(pNtk) + Abc_NtkLatchNum(pNtk) != Abc_NtkCoNum(pNtk) )
{
fprintf( stdout, "NetworkCheck: Number of COs does not match number of POs, asserts, and latches.\n" );
fprintf( stdout, "One possible reason is that latches are added twice:\n" );
fprintf( stdout, "in procedure Abc_NtkCreateObj() and in the user's code.\n" );
return 0;
}
}
// check the names
if ( !Abc_NtkCheckNames( pNtk ) )
return 0;
// check PIs and POs
Abc_NtkCleanCopy( pNtk );
if ( !Abc_NtkCheckPis( pNtk ) )
return 0;
if ( !Abc_NtkCheckPos( pNtk ) )
return 0;
if ( Abc_NtkHasBlackbox(pNtk) )
return 1;
// check the connectivity of objects
Abc_NtkForEachObj( pNtk, pObj, i )
if ( !Abc_NtkCheckObj( pNtk, pObj ) )
return 0;
// if it is a netlist change nets and latches
if ( Abc_NtkIsNetlist(pNtk) )
{
if ( Abc_NtkNetNum(pNtk) == 0 )
fprintf( stdout, "NetworkCheck: Warning! Netlist has no nets.\n" );
// check the nets
Abc_NtkForEachNet( pNtk, pNet, i )
if ( !Abc_NtkCheckNet( pNtk, pNet ) )
return 0;
}
else
{
if ( Abc_NtkNetNum(pNtk) != 0 )
/**Function*************************************************************
Synopsis [Starts the record for the given network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkRecStart( Abc_Ntk_t * pNtk, int nVars, int nCuts )
{
Abc_ManRec_t * p;
Abc_Obj_t * pObj, ** ppSpot;
char Buffer[10];
unsigned * pTruth;
int i, RetValue;
int clkTotal = clock(), clk;
assert( s_pMan == NULL );
if ( pNtk == NULL )
{
assert( nVars > 2 && nVars <= 16 );
pNtk = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtk->pName = Extra_UtilStrsav( "record" );
}
else
{
if ( Abc_NtkGetChoiceNum(pNtk) > 0 )
{
printf( "The starting record should be a network without choice nodes.\n" );
return;
}
if ( Abc_NtkPiNum(pNtk) > 16 )
{
printf( "The starting record should be a network with no more than %d primary inputs.\n", 16 );
return;
}
if ( Abc_NtkPiNum(pNtk) > nVars )
printf( "The starting record has %d inputs (warning only).\n", Abc_NtkPiNum(pNtk) );
pNtk = Abc_NtkDup( pNtk );
}
// create the primary inputs
for ( i = Abc_NtkPiNum(pNtk); i < nVars; i++ )
{
pObj = Abc_NtkCreatePi( pNtk );
Buffer[0] = 'a' + i;
Buffer[1] = 0;
Abc_ObjAssignName( pObj, Buffer, NULL );
}
Abc_NtkCleanCopy( pNtk );
Abc_NtkCleanEquiv( pNtk );
// start the manager
p = ABC_ALLOC( Abc_ManRec_t, 1 );
memset( p, 0, sizeof(Abc_ManRec_t) );
p->pNtk = pNtk;
p->nVars = Abc_NtkPiNum(pNtk);
p->nWords = Kit_TruthWordNum( p->nVars );
p->nCuts = nCuts;
p->nVarsInit = nVars;
// create elementary truth tables
p->vTtElems = Vec_PtrAlloc( 0 );
assert( p->vTtElems->pArray == NULL );
p->vTtElems->nSize = p->nVars;
p->vTtElems->nCap = p->nVars;
p->vTtElems->pArray = (void *)Extra_TruthElementary( p->nVars );
// allocate room for node truth tables
if ( Abc_NtkObjNum(pNtk) > (1<<14) )
p->vTtNodes = Vec_PtrAllocSimInfo( 2 * Abc_NtkObjNum(pNtk), p->nWords );
else
p->vTtNodes = Vec_PtrAllocSimInfo( 1<<14, p->nWords );
// create hash table
p->nBins = 50011;
p->pBins = ABC_ALLOC( Abc_Obj_t *, p->nBins );
memset( p->pBins, 0, sizeof(Abc_Obj_t *) * p->nBins );
// set elementary tables
Kit_TruthFill( Vec_PtrEntry(p->vTtNodes, 0), p->nVars );
Abc_NtkForEachPi( pNtk, pObj, i )
Kit_TruthCopy( Vec_PtrEntry(p->vTtNodes, pObj->Id), Vec_PtrEntry(p->vTtElems, i), p->nVars );
// compute the tables
clk = clock();
Abc_AigForEachAnd( pNtk, pObj, i )
{
RetValue = Abc_NtkRecComputeTruth( pObj, p->vTtNodes, p->nVars );
assert( RetValue );
}
