/*============================================================================
*
* Function Name: cVoid chal_audio_earpath_clear_isolation_ctrl(
* CHAL_HANDLE handle, cUInt16 sr_ctrl)
*
* Description: Clear AudioTx isolation Controls
*
* Parameters: handle - audio chal handle.
* sr_ctrl - isolation controls.
* Should be one of the combinations of CHAL_AUDIO_AUDIOTX_ISO_XXXX
*
* Return: None.
*
*============================================================================*/
cVoid chal_audio_earpath_clear_isolation_ctrl(CHAL_HANDLE handle,
cUInt16 iso_ctrl)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_value;
/* Get the current setting */
reg_value = BRCM_READ_REG(base, AUDIOH_AUDIOTX_ISO);
reg_value &= ~(iso_ctrl & CHAL_AUDIO_AUXIOTX_ISO_CTRL_MASK);
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_AUDIOTX_ISO, reg_value);
return;
}
cVoid chal_audio_stpath_clr_fifo(CHAL_HANDLE handle)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->sdt_base;
reg_val = BRCM_READ_REG(base, SDT_SDT_CTRL_3);
reg_val |= SDT_SDT_CTRL_3_FIFO_RESET_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, SDT_SDT_CTRL_3, reg_val);
reg_val &= ~SDT_SDT_CTRL_3_FIFO_RESET_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, SDT_SDT_CTRL_3, reg_val);
return;
}
/* function name changed from chal_audio_mic_pga_set_gain */
void chal_audio_mic_pga(CHAL_HANDLE handle, cUInt32 gain_regval)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *)handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_AUDIORX_VRX1);
reg_val &= ~AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_GAINCTRL_MASK;
if (gain_regval > 0x3f)
gain_regval = 0x3f;
reg_val |= (gain_regval
<< AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_GAINCTRL_SHIFT);
BRCM_WRITE_REG(base, AUDIOH_AUDIORX_VRX1, reg_val);
}
/*============================================================================
*
* Function Name: chal_audio_mic_mute(CHAL_HANDLE handle, Boolean mute_ctrl)
*
* Description: Mute the ANALOG MIC and AUX MIC signals on the DATA line
*
* Parameters: handle : the voice input path handle.
* mute_ctrl : mute control
*
* Return: None.
*
*============================================================================*/
cVoid chal_audio_mic_mute(CHAL_HANDLE handle, Boolean mute_ctrl)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_AUDIORX_VRX1);
reg_val &= ~(AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_ADCRST_MASK);
if (mute_ctrl == TRUE)
reg_val |= AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_ADCRST_MASK;
else
reg_val &= ~(AUDIOH_AUDIORX_VRX1_AUDIORX_VRX_ADCRST_MASK);
BRCM_WRITE_REG(base, AUDIOH_AUDIORX_VRX1, reg_val);
}
cVoid chal_audio_ihfpath_eanc_in(CHAL_HANDLE handle, cUInt16 enable )
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 eanc_ctrl;
// Set the required settings
eanc_ctrl = BRCM_READ_REG(base, AUDIOH_EANC_CTL);
eanc_ctrl &= (~AUDIOH_EANC_CTL_IHF_EANC_ENABLE_MASK);
if(enable == CHAL_AUDIO_ENABLE)
{
eanc_ctrl |= AUDIOH_EANC_CTL_IHF_EANC_ENABLE_MASK;
}
BRCM_WRITE_REG(base, AUDIOH_EANC_CTL, eanc_ctrl);
return;
}
void chal_audio_vinpath_clr_fifo(CHAL_HANDLE handle)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_VIN_FIFO_CTRL);
reg_val |= AUDIOH_VIN_FIFO_CTRL_VIN_FIFO_CLEAR_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_VIN_FIFO_CTRL, reg_val);
reg_val &= ~AUDIOH_VIN_FIFO_CTRL_VIN_FIFO_CLEAR_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_VIN_FIFO_CTRL, reg_val);
return;
}
/*
* ============================================================================
*
* Function Name:
* chal_audio_hspath_sdm_is_dither_enabled(CHAL_HANDLE handle)
*
* Description: Check if dither to sigma delta module on headset path
* enabled
*
* Parameters: handle - audio chal handle.
*
* Return:
* enable : bit 1 for right channel enable/disable
* enable : bit 0 for left channel enable/disable
*
* ============================================================================
*/
cUInt16 chal_audio_hspath_sdm_is_dither_enabled(CHAL_HANDLE handle)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *)handle)->audioh_base;
cUInt16 ret = 0;
reg_val = BRCM_READ_REG(base, AUDIOH_SDM_DITHER_CTL);
if (reg_val & AUDIOH_SDM_DITHER_CTL_STEREO_DITHER_EN_L_MASK)
ret |= AUDIOH_SDM_DITHER_CTL_STEREO_DITHER_EN_L_MASK;
if (reg_val & AUDIOH_SDM_DITHER_CTL_STEREO_DITHER_EN_R_MASK)
ret |= AUDIOH_SDM_DITHER_CTL_STEREO_DITHER_EN_R_MASK;
return ret;
}
cVoid chal_audio_earpath_sidetone_in(CHAL_HANDLE handle, cUInt16 enable )
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 reg_val = 0;
reg_val = BRCM_READ_REG(base, AUDIOH_DAC_CTL);
reg_val &= (~AUDIOH_DAC_CTL_VOUT_SIDETONE_EN_MASK);
if(enable == CHAL_AUDIO_ENABLE)
{
reg_val |= AUDIOH_DAC_CTL_VOUT_SIDETONE_EN_MASK;
}
BRCM_WRITE_REG(base, AUDIOH_DAC_CTL, reg_val);
return;
}
/*============================================================================
*
* Function Name: cVoid chal_audio_hspath_set_filter(CHAL_HANDLE handle,
* cUInt16 filter)
*
* Description: set Filter type for the heaset path
*
* Parameters: handle - audio chal handle.
* filter - 0: Linear Phase, 1 Minimum Phase
* Return: None.
*
*============================================================================*/
cVoid chal_audio_hspath_set_filter(CHAL_HANDLE handle, cUInt16 filter)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_MIN_PHASE);
reg_val &= ~(AUDIOH_MIN_PHASE_HS_MIN_PHASE_MASK);
if (filter & CHAL_AUDIO_MINIMUM_PHASE_FILTER)
reg_val |= AUDIOH_MIN_PHASE_HS_MIN_PHASE_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_MIN_PHASE, reg_val);
return;
}
cVoid chal_audio_earpath_set_gain(CHAL_HANDLE handle, cUInt32 gain)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_EP_DAC_CTRL);
/* Mask the gain bits */
reg_val &= 0xFE7FFFFF;
reg_val |= ((gain&0x03) << 23);
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_EP_DAC_CTRL, reg_val);
return;
}
cVoid chal_audio_ihfpath_set_fifo_thres(CHAL_HANDLE handle, cUInt16 thres, cUInt16 thres_2)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_IHF_FIFO_CTRL);
reg_val &= ~(0x7F);
reg_val &= ~(0xF0);
reg_val |= thres;
reg_val |= thres_2 << 8;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_IHF_FIFO_CTRL, reg_val);
return;
}
void chal_audio_nvinpath_set_fifo_thres(CHAL_HANDLE handle, cUInt16 thres, cUInt16 thres_2 )
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_NVIN_FIFO_CTRL);
reg_val &= ~(AUDIOH_NVIN_FIFO_CTRL_NVIN_FIFO_THRES_MASK);
reg_val &= ~(AUDIOH_NVIN_FIFO_CTRL_NVIN_FIFO_THRES2_MASK);
reg_val |= thres;
reg_val |= thres_2 << AUDIOH_NVIN_FIFO_CTRL_NVIN_FIFO_THRES2_SHIFT;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_NVIN_FIFO_CTRL, reg_val);
return;
}
cVoid chal_audio_hspath_set_bits_per_sample(CHAL_HANDLE handle, cUInt16 bits)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_STEREO_FIFO_CTRL);
if (bits >= 24)
reg_val |= AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_24BIT_MASK;
else
reg_val &= ~AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_24BIT_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_STEREO_FIFO_CTRL, reg_val);
return;
}
/*============================================================================
*
* Function Name: cVoid chal_audio_hspath_dma_enable(CHAL_HANDLE handle,
* cUInt16 dma_enable)
*
* Description: Enable or Disable DMA on headset path
*
* Parameters: handle - audio chal handle.
* dma_enable - true: enable DMA, false : disable DMA.
* Return: None.
*
*============================================================================*/
cVoid chal_audio_hspath_dma_enable(CHAL_HANDLE handle, Boolean dma_enable)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_DMA_CTL);
if (dma_enable)
reg_val |= AUDIOH_DMA_CTL_STEREO_DMA_EN_MASK;
else
reg_val &= ~AUDIOH_DMA_CTL_STEREO_DMA_EN_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_DMA_CTL, reg_val);
return;
}
void chal_audio_eancpath_set_mode(CHAL_HANDLE handle, _Bool mode)
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 eanc_ctrl;
eanc_ctrl = BRCM_READ_REG(base, AUDIOH_EANC_CTL);
eanc_ctrl &= (~AUDIOH_EANC_CTL_EANC_MODE96K_MASK);
if(mode == CHAL_AUDIO_ENABLE)
{
eanc_ctrl |= (AUDIOH_EANC_CTL_EANC_MODE96K_MASK);
}
BRCM_WRITE_REG(base, AUDIOH_EANC_CTL, eanc_ctrl);
return;
}
cVoid chal_audio_hspath_set_pack(CHAL_HANDLE handle, Boolean pack)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_STEREO_FIFO_CTRL);
if (pack == CHAL_AUDIO_ENABLE)
reg_val |= AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_PACK_MASK;
else
reg_val &= ~AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_PACK_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_STEREO_FIFO_CTRL, reg_val);
return;
}
void chal_audio_enable_adc_paths(CHAL_HANDLE handle, cUInt32 adc_mask, cUInt16 enable)
{
cUInt32 reg_val;
cUInt32 reg_adc_mask = 0;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
if((adc_mask&CHAL_AUDIO_PATH_AMIC1) || (adc_mask&CHAL_AUDIO_PATH_AMIC2))
{
reg_adc_mask |= AUDIOH_ADC_CTL_AMIC_EN_MASK;
}
if(adc_mask& CHAL_AUDIO_PATH_DMIC1)
{
reg_adc_mask |= AUDIOH_ADC_CTL_DMIC1_EN_MASK;
}
if(adc_mask& CHAL_AUDIO_PATH_DMIC2)
{
reg_adc_mask |= AUDIOH_ADC_CTL_DMIC2_EN_MASK;
}
if(adc_mask&CHAL_AUDIO_PATH_DMIC3)
{
reg_adc_mask |= AUDIOH_ADC_CTL_DMIC3_EN_MASK;
}
if(adc_mask&CHAL_AUDIO_PATH_DMIC4)
{
reg_adc_mask |= AUDIOH_ADC_CTL_DMIC4_EN_MASK;
}
/*
* Enable/Disable the DAC Paths.
* It is necessary to enable all the paths at the same time
*/
reg_val = BRCM_READ_REG(base, AUDIOH_ADC_CTL);
reg_val &= (~reg_adc_mask);
if(enable == CHAL_AUDIO_ENABLE)
{
reg_val |= reg_adc_mask;
}
BRCM_WRITE_REG(base, AUDIOH_ADC_CTL, reg_val);
return;
}
cVoid chal_audio_hspath_mute(CHAL_HANDLE handle, Boolean mute)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_DAC_CTL);
if (mute == CHAL_AUDIO_ENABLE)
reg_val |= AUDIOH_DAC_CTL_STEREO_MUTE_MASK;
else
reg_val &= ~AUDIOH_DAC_CTL_STEREO_MUTE_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_DAC_CTL, reg_val);
return;
}
void chal_audio_hspath_set_mono_stereo(CHAL_HANDLE handle, _Bool mode)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *)handle)->audioh_base;
reg_val = BRCM_READ_REG(base, AUDIOH_STEREO_FIFO_CTRL);
if (mode == CHAL_AUDIO_ENABLE)
reg_val |= AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_MONO_MASK;
else /* stereo */
reg_val &= ~AUDIOH_STEREO_FIFO_CTRL_STEREO_FIFO_MONO_MASK;
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_STEREO_FIFO_CTRL, reg_val);
return;
}
cVoid chal_audio_stpath_set_fifo_thres(CHAL_HANDLE handle, cUInt16 thres,
cUInt16 thres_2)
{
cUInt32 reg_val;
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->sdt_base;
reg_val = BRCM_READ_REG(base, SDT_SDT_CTRL_3);
reg_val &= ~(SDT_SDT_CTRL_3_THRES_MASK);
reg_val &= ~(SDT_SDT_CTRL_3_THRES2_MASK);
reg_val |= thres << SDT_SDT_CTRL_3_THRES_SHIFT;
reg_val |= thres_2 << SDT_SDT_CTRL_3_THRES2_SHIFT;
/* Set the required setting */
BRCM_WRITE_REG(base, SDT_SDT_CTRL_3, reg_val);
return;
}
/*============================================================================
*
* Function Name: cVoid chal_audio_stpath_enable(CHAL_HANDLE handle,
* cUInt16 enable)
*
* Description: Enable or Disable Sidetone path
*
* Parameters: handle - audio chal handle.
* enable - true : enable, false : disable.
*
* Return: None.
*
*============================================================================*/
cVoid chal_audio_stpath_enable(CHAL_HANDLE handle, cUInt16 enable)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_ADC_CTL);
if (enable == CHAL_AUDIO_ENABLE)
reg_val |= AUDIOH_ADC_CTL_SIDETONE_EN_MASK;
else
reg_val &= ~AUDIOH_ADC_CTL_SIDETONE_EN_MASK;
BRCM_WRITE_REG(base, AUDIOH_ADC_CTL, reg_val);
return;
}
void chal_audio_api_enable_dac(CHAL_HANDLE handle, cUInt32 dac_mask, cUInt16 enable)
{
cUInt32 reg_val;
cUInt32 reg_api_mask = 0;
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
if(dac_mask& CHAL_AUDIO_PATH_HEADSET_LEFT)
{
reg_api_mask |= AUDIOH_AUDIO_API_STEREO_API_EN_MASK;
}
if(dac_mask& CHAL_AUDIO_PATH_HEADSET_RIGHT)
{
reg_api_mask |= AUDIOH_AUDIO_API_STEREO_API_EN_MASK;
}
if(dac_mask&CHAL_AUDIO_PATH_IHF_LEFT)
{
reg_api_mask |= AUDIOH_AUDIO_API_IHF_API_EN_MASK;
}
if(dac_mask&CHAL_AUDIO_PATH_VIBRA)
{
reg_api_mask |= AUDIOH_AUDIO_API_VIBRA_API_EN_MASK;
}
if(dac_mask&CHAL_AUDIO_PATH_EARPIECE)
{
reg_api_mask |= AUDIOH_AUDIO_API_VOUT_API_EN_MASK;
}
/* Enable/Disable the API for the DAC Paths.*/
reg_val = BRCM_READ_REG(base, AUDIOH_AUDIO_API);
reg_val &= (~reg_api_mask);
if(enable == CHAL_AUDIO_ENABLE)
{
reg_val |= reg_api_mask;
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_AUDIO_API, reg_val);
return;
}
/****************************************************************************
*
* Function Name: cVoid chal_caph_cfifo_set_panic_timer(CHAL_HANDLE handle,
* cUInt8 timeout)
*
* Description: set CFIFO channel panic timeout value
*
****************************************************************************/
cVoid chal_caph_cfifo_set_panic_timer(CHAL_HANDLE handle, cUInt8 timeout)
{
cUInt32 base = ((chal_caph_cfifo_cb_t *) handle)->base;
cUInt32 reg_val;
/* Read the panic timer value */
reg_val = BRCM_READ_REG(base, CPH_CFIFO_CPH_ARB_CTL_2);
/* Clear the current timeout value */
reg_val &= ~CPH_CFIFO_CPH_ARB_CTL_2_CH_TIMER_DEFAULTS_MASK;
/* Add the new timeout value */
reg_val |= (timeout << CPH_CFIFO_CPH_ARB_CTL_2_CH_TIMER_DEFAULTS_SHIFT);
/* Program the panic timer value */
BRCM_WRITE_REG(base, CPH_CFIFO_CPH_ARB_CTL_2, reg_val);
return;
}
/*============================================================================*/
void chal_audio_ihfpath_set_filter(CHAL_HANDLE handle, uint16_t filter)
{
uint32_t base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
uint32_t reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_MIN_PHASE);
reg_val &= ~(AUDIOH_MIN_PHASE_IHF_MIN_PHASE_MASK);
if(filter & CHAL_AUDIO_MINIMUM_PHASE_FILTER)
{
reg_val |= AUDIOH_MIN_PHASE_IHF_MIN_PHASE_MASK;
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_MIN_PHASE, reg_val);
return;
}
/*
* ============================================================================
*
* Function Name: void chal_audio_nvinpath_set_each_cic_scale(CHAL_HANDLE handle, CAPH_AUDIOH_MIC_GAIN_e micGainSelect,cUInt32 gain)
*
* Description: Set the each CIC coarse/fine scale for the Digital MIC 3 & 4
*
* Parameters: handle the voice input path handle.
*
* Return: None.
*
* ============================================================================
*/
void chal_audio_nvinpath_set_each_cic_scale(CHAL_HANDLE handle,CAPH_AUDIOH_MIC_GAIN_e micGainSelect,cUInt32 gain)
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 value = 0;
// Read VIN path FIFO status
value = BRCM_READ_REG(base, AUDIOH_NVIN_FILTER_CTRL);
switch(micGainSelect)
{
case CAPH_AUDIOH_MIC3_COARSE_GAIN:
value &= ~(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_BIT_SEL_MASK);
gain <<= (AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_BIT_SEL_SHIFT);
value |= gain;
break;
case CAPH_AUDIOH_MIC3_FINE_GAIN:
value &= ~(AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_FINE_SCL_MASK);
gain <<= (AUDIOH_NVIN_FILTER_CTRL_DMIC3_CIC_FINE_SCL_SHIFT);
value |= gain;
break;
case CAPH_AUDIOH_MIC4_COARSE_GAIN:
value &= ~(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_BIT_SEL_MASK);
gain <<= (AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_BIT_SEL_SHIFT);
value |= gain;
break;
case CAPH_AUDIOH_MIC4_FINE_GAIN:
value &= ~(AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_FINE_SCL_MASK);
gain <<= (AUDIOH_NVIN_FILTER_CTRL_DMIC4_CIC_FINE_SCL_SHIFT);
value |= gain;
break;
default:
break;
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_NVIN_FILTER_CTRL, value);
return;
}
/*============================================================================
*
* Function Name: cVoid chal_audio_earpath_ramp_ctrl(CHAL_HANDLE handle,
* cUInt16 ramp_ctrl)
*
* Description: Set AudioTx Earpiece Ramp Controls
*
* Parameters: handle - audio chal handle.
* ramp_ctrl - Earpiece Ramp controls.
* Should be one of the combinations of CHAL_AUDIO_AUDIOTX_EP_DRV_XXXX
*
* Return: None.
*
*============================================================================*/
cVoid chal_audio_earpath_ramp_ctrl(CHAL_HANDLE handle, cUInt16 ramp_ctrl)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 reg_value;
/* Get the current setting */
reg_value = BRCM_READ_REG(base, AUDIOH_EP_DRV);
if (ramp_ctrl) {
reg_value &= ~AUDIOH_EP_DRV_AUDIOTX_EP_DRV_SPAREBIT_MASK; // ENABLE RAMP
} else {
reg_value |= AUDIOH_EP_DRV_AUDIOTX_EP_DRV_SPAREBIT_MASK; // DISABLE RAMP
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_EP_DRV, reg_value);
return;
}
/****************************************************************************
*
* Function Name: cVoid chal_caph_cfifo_set_arb(CHAL_HANDLE handle,
* cUInt32 key)
*
* Description: set arb pattern
*
****************************************************************************/
cVoid chal_caph_cfifo_set_arb(CHAL_HANDLE handle, cUInt32 key)
{
cUInt32 base = ((chal_caph_cfifo_cb_t *) handle)->base;
cUInt32 arb;
/* Get the current arbitration pattern */
arb = BRCM_READ_REG(base, CPH_CFIFO_CPH_ARB_CTL_3);
/* clear and set the new pattern */
arb &= ~CPH_CFIFO_CPH_ARB_CTL_3_ARB_PATTERN_MASK;
arb |=
((key & CPH_CFIFO_CPH_ARB_CTL_3_ARB_PATTERN_MASK) <<
CPH_CFIFO_CPH_ARB_CTL_3_ARB_PATTERN_SHIFT);
/* Apply the changes to the Hardware */
BRCM_WRITE_REG(base, CPH_CFIFO_CPH_ARB_CTL_3, arb);
return;
}
/*
* ============================================================================
*
* Function Name: void chal_audio_loopback_enable(CHAL_HANDLE handle, cUInt16 enable)
*
* Description: Enable or Disable analog mic loopback
*
* Parameters: handle - audio chal handle.
* enable - true : enable, false : disable.
* Return: None.
*
* ============================================================================
*/
void chal_audio_loopback_enable(CHAL_HANDLE handle, cUInt16 enable)
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 reg_val;
reg_val = BRCM_READ_REG(base, AUDIOH_LOOPBACK_CTRL);
reg_val &= ~(AUDIOH_LOOPBACK_CTRL_LOOPBACK_EN_MASK);
if(enable == CHAL_AUDIO_ENABLE)
{
reg_val |= AUDIOH_LOOPBACK_CTRL_LOOPBACK_EN_MASK;
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_LOOPBACK_CTRL, reg_val);
return;
}
/*
* ============================================================================
*
* Function Name: void chal_audio_loopback_set_out_paths(CHAL_HANDLE handle, cUInt16 enable)
*
* Description: Enable or Disable analog mic loopback to the mentioned dac path
*
* Parameters: handle - audio chal handle.
* dac_mask - bit mask of DAC
* enable - true : enable, false : disable.
* Return: None.
*
* ============================================================================
*/
void chal_audio_loopback_set_out_paths(CHAL_HANDLE handle, cUInt32 dac_mask, cUInt16 enable)
{
cUInt32 base = ((ChalAudioCtrlBlk_t*)handle)->audioh_base;
cUInt32 reg_val;
cUInt32 regDacMask = 0;
if(dac_mask& CHAL_AUDIO_PATH_HEADSET_LEFT)
{
regDacMask |= AUDIOH_LOOPBACK_CTRL_STEREO_LOOPBACK_L_MASK;
}
if(dac_mask& CHAL_AUDIO_PATH_HEADSET_RIGHT)
{
regDacMask |= AUDIOH_LOOPBACK_CTRL_STEREO_LOOPBACK_R_MASK;
}
if(dac_mask&CHAL_AUDIO_PATH_IHF_LEFT)
{
regDacMask |= AUDIOH_LOOPBACK_CTRL_IHF_LOOPBACK_L_MASK;
}
if(dac_mask&CHAL_AUDIO_PATH_EARPIECE)
{
regDacMask |= AUDIOH_LOOPBACK_CTRL_VOUT_LOOPBACK_MASK;
}
reg_val = BRCM_READ_REG(base, AUDIOH_LOOPBACK_CTRL);
reg_val &= (~regDacMask);
if(enable == CHAL_AUDIO_ENABLE)
{
reg_val |= regDacMask;
}
/* Set the required setting */
BRCM_WRITE_REG(base, AUDIOH_LOOPBACK_CTRL, reg_val);
return;
}
cUInt32 chal_audio_hspath_read_int_status(CHAL_HANDLE handle)
{
cUInt32 base = ((ChalAudioCtrlBlk_t *) handle)->audioh_base;
cUInt32 status = 0;
cUInt32 reg_val = 0;
/* Read the Audio FIFO interrupt status of all paths */
reg_val = BRCM_READ_REG(base, AUDIOH_AUDIO_INT_STATUS);
/* Check for Stereo FIFO error interrupt */
if (reg_val & AUDIOH_AUDIO_INT_STATUS_STEREO_FIFO_ERR_MASK)
status |= CHAL_AUDIO_FIFO_STATUS_ERR_INT;
/* Check for Stereo FIFO threshold interrupt */
if (reg_val & AUDIOH_AUDIO_INT_STATUS_STEREO_INT_MASK)
status |= CHAL_AUDIO_FIFO_STATUS_THR_INT;
return status;
}
