C++ (Cpp) BRW_IS_965 Examples

Example #1

File: brw_clip_tri.c Project: MttDs/new-rexeno-tindpe

void brw_emit_tri_clip( struct brw_clip_compile *c )
{
   struct brw_instruction *neg_rhw;
   struct brw_compile *p = &c->func;
   brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
   brw_clip_tri_init_vertices(c);
   brw_clip_init_clipmask(c);
   brw_clip_init_ff_sync(c);

   /* if -ve rhw workaround bit is set, 
      do cliptest */
   if (BRW_IS_965(p->brw)) {
      brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
      brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), 
              brw_imm_ud(1<<20));
      neg_rhw = brw_IF(p, BRW_EXECUTE_1); 
      {
         brw_clip_test(c);
      }
      brw_ENDIF(p, neg_rhw);
   }
   /* Can't push into do_clip_tri because with polygon (or quad)
    * flatshading, need to apply the flatshade here because we don't
    * respect the PV when converting to trifan for emit:
    */
   if (c->key.do_flat_shading) 
      brw_clip_tri_flat_shade(c); 
      
   if ((c->key.clip_mode == BRW_CLIPMODE_NORMAL) ||
       (c->key.clip_mode == BRW_CLIPMODE_KERNEL_CLIP))
      do_clip_tri(c);
   else 
      maybe_do_clip_tri(c);

   brw_clip_tri_emit_polygon(c);

   /* Send an empty message to kill the thread:
    */
   brw_clip_kill_thread(c);
}

Example #2

File: brw_misc_state.c Project: CPFDSoftware-Tony/gmv

static int upload_invarient_state( struct brw_context *brw )
{
   {
      /* 0x61040000  Pipeline Select */
      /*     PipelineSelect            : 0 */
      struct brw_pipeline_select ps;

      memset(&ps, 0, sizeof(ps));
      if (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw))
	 ps.header.opcode = CMD_PIPELINE_SELECT_GM45;
      else
	 ps.header.opcode = CMD_PIPELINE_SELECT_965;
      ps.header.pipeline_select = 0;
      BRW_BATCH_STRUCT(brw, &ps);
   }

   {
      struct brw_global_depth_offset_clamp gdo;
      memset(&gdo, 0, sizeof(gdo));

      /* Disable depth offset clamping. 
       */
      gdo.header.opcode = CMD_GLOBAL_DEPTH_OFFSET_CLAMP;
      gdo.header.length = sizeof(gdo)/4 - 2;
      gdo.depth_offset_clamp = 0.0;

      BRW_BATCH_STRUCT(brw, &gdo);
   }


   /* 0x61020000  State Instruction Pointer */
   {
      struct brw_system_instruction_pointer sip;
      memset(&sip, 0, sizeof(sip));

      sip.header.opcode = CMD_STATE_INSN_POINTER;
      sip.header.length = 0;
      sip.bits0.pad = 0;
      sip.bits0.system_instruction_pointer = 0;
      BRW_BATCH_STRUCT(brw, &sip);
   }

   /* VF Statistics */
   {
      struct brw_vf_statistics vfs;
      memset(&vfs, 0, sizeof(vfs));

      if (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) 
	 vfs.opcode = CMD_VF_STATISTICS_GM45;
      else 
	 vfs.opcode = CMD_VF_STATISTICS_965;

      if (BRW_DEBUG & DEBUG_STATS)
	 vfs.statistics_enable = 1; 

      BRW_BATCH_STRUCT(brw, &vfs);
   }
   
   if (!BRW_IS_965(brw))
   {
      struct brw_aa_line_parameters balp;

      /* use legacy aa line coverage computation */
      memset(&balp, 0, sizeof(balp));
      balp.header.opcode = CMD_AA_LINE_PARAMETERS;
      balp.header.length = sizeof(balp) / 4 - 2;
   
      BRW_BATCH_STRUCT(brw, &balp);
   }

   {
      struct brw_polygon_stipple_offset bpso;
      
      /* This is invarient state in gallium:
       */
      memset(&bpso, 0, sizeof(bpso));
      bpso.header.opcode = CMD_POLY_STIPPLE_OFFSET;
      bpso.header.length = sizeof(bpso)/4-2;
      bpso.bits0.y_offset = 0;
      bpso.bits0.x_offset = 0;

      BRW_BATCH_STRUCT(brw, &bpso);
   }
   
   return 0;
}