void TimerOff(const rtems_raw_irq_connect_data* used) { /* * disable interrrupt at i8259 level */ BSP_irq_disable_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); /* reset timer mode to standard (DOS) value */ }
int BSP_disable_irq_at_pic(const rtems_irq_number name) { #if BSP_ISA_IRQ_NUMBER > 0 if (is_isa_irq(name)) { /* * disable interrupt at PIC level */ return BSP_irq_disable_at_i8259s ((int) name - BSP_ISA_IRQ_LOWEST_OFFSET); } #endif #if BSP_PCI_IRQ_NUMBER > 0 if (is_pci_irq(name)) { /* * disable interrupt at OPENPIC level */ return openpic_disable_irq ((int) name - BSP_PCI_IRQ_LOWEST_OFFSET); } #endif return -1; }
void BSP_uart_off(const rtems_raw_irq_connect_data* used) { BSP_irq_disable_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); }
rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) { BSP_irq_disable_at_i8259s(vector); return RTEMS_SUCCESSFUL; }
/* * RTEMS Global Interrupt Handler Management Routines */ int BSP_setup_the_pic(rtems_irq_global_settings* config) { int i; /* * Store various code accelerators */ default_rtems_entry = config->defaultEntry; rtems_hdl_tbl = config->irqHdlTbl; /* * set up internal tables used by rtems interrupt prologue */ #if BSP_ISA_IRQ_NUMBER > 0 /* * start with ISA IRQ */ compute_i8259_masks_from_prio (config); for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) { if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) { BSP_irq_enable_at_i8259s (i); } else { BSP_irq_disable_at_i8259s (i); } } if ( BSP_ISA_IRQ_NUMBER > 0 ) { /* * must enable slave pic anyway */ BSP_irq_enable_at_i8259s (2); } #endif #if BSP_PCI_IRQ_NUMBER > 0 if ( ! OpenPIC ) return 1; /* * continue with PCI IRQ */ for (i=BSP_PCI_IRQ_LOWEST_OFFSET; i < BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER ; i++) { /* * Note that openpic_set_priority() sets the TASK priority of the PIC */ openpic_set_source_priority(i - BSP_PCI_IRQ_LOWEST_OFFSET, config->irqPrioTbl[i]); if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) { openpic_enable_irq ((int) i - BSP_PCI_IRQ_LOWEST_OFFSET); } else { openpic_disable_irq ((int) i - BSP_PCI_IRQ_LOWEST_OFFSET); } } #ifdef BSP_PCI_ISA_BRIDGE_IRQ /* * Must enable PCI/ISA bridge IRQ */ openpic_enable_irq (BSP_PCI_ISA_BRIDGE_IRQ); #endif #endif return 1; }