Example #1
0
static int
uart_scc_probe(device_t dev)
{
	device_t parent;
	struct uart_softc *sc;
	uintptr_t ch, cl, md, rs;

	parent = device_get_parent(dev);
	sc = device_get_softc(dev);

	if (BUS_READ_IVAR(parent, dev, SCC_IVAR_MODE, &md) ||
	    BUS_READ_IVAR(parent, dev, SCC_IVAR_CLASS, &cl))
		return (ENXIO);
	if (md != SCC_MODE_ASYNC)
		return (ENXIO);
	switch (cl) {
	case SCC_CLASS_QUICC:
		sc->sc_class = &uart_quicc_class;
		break;
	case SCC_CLASS_SAB82532:
		sc->sc_class = &uart_sab82532_class;
		break;
	case SCC_CLASS_Z8530:
		sc->sc_class = &uart_z8530_class;
		break;
	default:
		return (ENXIO);
	}
	if (BUS_READ_IVAR(parent, dev, SCC_IVAR_CHANNEL, &ch) ||
	    BUS_READ_IVAR(parent, dev, SCC_IVAR_CLOCK, &cl) ||
	    BUS_READ_IVAR(parent, dev, SCC_IVAR_REGSHFT, &rs))
		return (ENXIO);

	return (uart_bus_probe(dev, rs, cl, 0, ch));
}
Example #2
0
static struct resource *
ixp425_alloc_resource(device_t dev, device_t child, int type, int *rid,
    u_long start, u_long end, u_long count, u_int flags)
{
	struct ixp425_softc *sc = device_get_softc(dev);
	struct rman *rmanp;
	struct resource *rv;
	uint32_t vbase, addr;
	int irq;

	switch (type) {
	case SYS_RES_IRQ:
		rmanp = &sc->sc_irq_rman;
		/* override per hints */
		if (BUS_READ_IVAR(dev, child, IXP425_IVAR_IRQ, &irq) == 0)
			start = end = irq;
		rv = rman_reserve_resource(rmanp, start, end, count,
			flags, child);
		if (rv != NULL)
			rman_set_rid(rv, *rid);
		break;

	case SYS_RES_MEMORY:
		rmanp = &sc->sc_mem_rman;
		/* override per hints */
		if (BUS_READ_IVAR(dev, child, IXP425_IVAR_ADDR, &addr) == 0) {
			start = addr;
			end = start + 0x1000;	/* XXX */
		}
		if (getvbase(start, end - start, &vbase) != 0) {
			/* likely means above table needs to be updated */
			device_printf(dev, "%s: no mapping for 0x%lx:0x%lx\n",
			    __func__, start, end-start);
			return NULL;
		}
		rv = rman_reserve_resource(rmanp, start, end, count,
			flags, child);
		if (rv != NULL) {
			rman_set_rid(rv, *rid);
			if (strcmp(device_get_name(child), "uart") == 0)
				rman_set_bustag(rv, &ixp425_a4x_bs_tag);
			else
				rman_set_bustag(rv, sc->sc_iot);
			rman_set_bushandle(rv, vbase);
		}
		break;
	default:
		rv = NULL;
		break;
	}
	return rv;
}
void
tsec_get_hwaddr(struct tsec_softc *sc, uint8_t *addr)
{
	union {
		uint32_t reg[2];
		uint8_t addr[6];
	} curmac;
	uint32_t a[6];
	device_t parent;
	uintptr_t macaddr;
	int i;

	parent = device_get_parent(sc->dev);
	if (BUS_READ_IVAR(parent, sc->dev, OCPBUS_IVAR_MACADDR,
	    &macaddr) == 0) {
		bcopy((uint8_t *)macaddr, addr, 6);
		return;
	}

	/*
	 * Fall back -- use the currently programmed address in the hope that
	 * it was set be firmware...
	 */
	curmac.reg[0] = TSEC_READ(sc, TSEC_REG_MACSTNADDR1);
	curmac.reg[1] = TSEC_READ(sc, TSEC_REG_MACSTNADDR2);
	for (i = 0; i < 6; i++)
		a[5-i] = curmac.addr[i];

	addr[0] = a[0];
	addr[1] = a[1];
	addr[2] = a[2];
	addr[3] = a[3];
	addr[4] = a[4];
	addr[5] = a[5];
}
Example #4
0
void
virtio_read_ivar(device_t dev, int ivar, uintptr_t *val)
{

	*val = -1;
	BUS_READ_IVAR(device_get_parent(dev), dev, ivar, val);
}
Example #5
0
File: sbus.c Project: MarginC/kame
static void
sbus_probe_nomatch(device_t dev, device_t child)
{
	char *name;
	char *type;

	if (BUS_READ_IVAR(dev, child, SBUS_IVAR_NAME,
	    (uintptr_t *)&name) != 0 ||
	    BUS_READ_IVAR(dev, child, SBUS_IVAR_DEVICE_TYPE,
	    (uintptr_t *)&type) != 0)
		return;

	if (type == NULL)
		type = "(unknown)";
	device_printf(dev, "<%s>, type %s (no driver attached)\n",
	    name, type);
}
Example #6
0
/*
 * smbus_get_addr()
 *
 * Get the I2C 7 bits address of the device
 */
u_char
smbus_get_addr(device_t dev)
{
	uintptr_t addr;
	device_t parent = device_get_parent(dev);

	BUS_READ_IVAR(parent, dev, SMBUS_IVAR_ADDR, &addr);

	return ((u_char)addr);
}
Example #7
0
static int
sio_puc_attach(device_t dev)
{
	uintptr_t rclk;

	if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_CLOCK,
	    &rclk) != 0)
		rclk = DEFAULT_RCLK;
	return (sioattach(dev, 0, rclk));
}
Example #8
0
/*
 * ppb_get_epp_protocol()
 *
 * Return the chipset EPP protocol
 */
int
ppb_get_epp_protocol(device_t bus)
{
	uintptr_t protocol;

	ppb_assert_locked(bus);
	BUS_READ_IVAR(device_get_parent(bus), bus, PPC_IVAR_EPP_PROTO, &protocol);

	return (protocol);
}
Example #9
0
static int
sio_puc_probe(device_t dev)
{
	device_t parent;
	uintptr_t rclk, type;
	int error;

	parent = device_get_parent(dev);

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_TYPE, &type))
		return (ENXIO);
	if (type != PUC_TYPE_SERIAL)
		return (ENXIO);

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_CLOCK, &rclk))
		rclk = DEFAULT_RCLK;

	error = sioprobe(dev, 0, rclk, 1);
	return ((error > 0) ? error : BUS_PROBE_LOW_PRIORITY);
}
Example #10
0
int
virtio_get_device_type(device_t dev)
{
	uintptr_t devtype;

	devtype = -1;

	BUS_READ_IVAR(device_get_parent(dev), dev,
	    VIRTIO_IVAR_DEVTYPE, &devtype);

	return ((int) devtype);
}
Example #11
0
static int
uart_puc_probe(device_t dev)
{
	device_t parent;
	struct uart_softc *sc;
	uintptr_t rclk, type;

	parent = device_get_parent(dev);
	sc = device_get_softc(dev);

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_TYPE, &type))
		return (ENXIO);
	if (type != PUC_TYPE_SERIAL)
		return (ENXIO);

	sc->sc_class = &uart_ns8250_class;

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_CLOCK, &rclk))
		rclk = 0;
	return (uart_bus_probe(dev, 0, 0, rclk, 0, 0));
}
/*
 * ppb_get_epp_protocol()
 *
 * Return the chipset EPP protocol
 */
int
ppb_get_epp_protocol(device_t bus)
{
#ifdef INVARIANTS
	struct ppb_data *ppb = DEVTOSOFTC(bus);
#endif
	uintptr_t protocol;

	mtx_assert(ppb->ppc_lock, MA_OWNED);
	BUS_READ_IVAR(device_get_parent(bus), bus, PPC_IVAR_EPP_PROTO, &protocol);

	return (protocol);
}
static int
uart_ocp_probe(device_t dev)
{
	device_t parent;
	struct uart_softc *sc;
	uintptr_t clock, devtype;
	int error;

	parent = device_get_parent(dev);

	error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
	if (error)
		return (error);
	if (devtype != OCPBUS_DEVTYPE_UART)
		return (ENXIO);

	sc = device_get_softc(dev);
	sc->sc_class = &uart_ns8250_class;

	if (BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_CLOCK, &clock))
		clock = 0;
	return (uart_bus_probe(dev, 0, clock, 0, 0));
}
Example #14
0
static int
uart_puc_probe(device_t dev)
{
	device_t parent;
	struct uart_softc *sc;
	uintptr_t port, rclk, regshft, type;

	parent = device_get_parent(dev);
	sc = device_get_softc(dev);

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_SUBTYPE, &type))
		return (ENXIO);
	switch (type) {
	case PUC_PORT_UART_NS8250:
		sc->sc_class = &uart_ns8250_class;
		port = 0;
		break;
	case PUC_PORT_UART_SAB82532:
		sc->sc_class = &uart_sab82532_class;
		if (BUS_READ_IVAR(parent, dev, PUC_IVAR_PORT, &port))
			port = 0;
		break;
	case PUC_PORT_UART_Z8530:
		sc->sc_class = &uart_z8530_class;
		if (BUS_READ_IVAR(parent, dev, PUC_IVAR_PORT, &port))
			port = 0;
		break;
	default:
		return (ENXIO);
	}

	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_FREQ, &rclk))
		rclk = 0;
	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_REGSHFT, &regshft))
		regshft = 0;
	return (uart_bus_probe(dev, regshft, rclk, 0, port));
}
Example #15
0
static int
pcf_probe(device_t pcfdev)
{
	struct pcf_softc *pcf = DEVTOSOFTC(pcfdev);
	device_t parent = device_get_parent(pcfdev);
	uintptr_t base;

	device_set_desc(pcfdev, "PCF8584 I2C bus controller");

	bzero(pcf, sizeof(struct pcf_softc));

	pcf->rid_irq = pcf->rid_ioport = 0;
	pcf->res_irq = pcf->res_ioport = NULL;

	/* IO port is mandatory */
	pcf->res_ioport = bus_alloc_resource(pcfdev, SYS_RES_IOPORT,
					     &pcf->rid_ioport, 0ul, ~0ul,
					     IO_PCFSIZE, RF_ACTIVE);
	if (pcf->res_ioport == NULL) {
		device_printf(pcfdev, "cannot reserve I/O port range\n");
		goto error;
	}
	BUS_READ_IVAR(parent, pcfdev, ISA_IVAR_PORT, &base);
	pcf->pcf_base = base;

	pcf->pcf_flags = device_get_flags(pcfdev);

	if (!(pcf->pcf_flags & IIC_POLLED)) {
		pcf->res_irq = bus_alloc_resource(pcfdev, SYS_RES_IRQ, &pcf->rid_irq,
						  0ul, ~0ul, 1, RF_ACTIVE);
		if (pcf->res_irq == NULL) {
			device_printf(pcfdev, "can't reserve irq, polled mode.\n");
			pcf->pcf_flags |= IIC_POLLED;
		}
	}

	/* reset the chip */
	pcf_rst_card(pcfdev, IIC_FASTEST, PCF_DEFAULT_ADDR, NULL);

	return (0);
error:
	if (pcf->res_ioport != NULL) {
		bus_deactivate_resource(pcfdev, SYS_RES_IOPORT, pcf->rid_ioport,
					pcf->res_ioport);
		bus_release_resource(pcfdev, SYS_RES_IOPORT, pcf->rid_ioport,
				     pcf->res_ioport);
	}
	return (ENXIO);
}
Example #16
0
static int
scc_quicc_probe(device_t dev)
{
	device_t parent;
	struct scc_softc *sc;
	uintptr_t devtype, rclk;
	int error;

	parent = device_get_parent(dev);

	error = BUS_READ_IVAR(parent, dev, QUICC_IVAR_DEVTYPE, &devtype);
	if (error)
		return (error);
	if (devtype != QUICC_DEVTYPE_SCC)
		return (ENXIO);

	device_set_desc(dev, "QUICC quad channel SCC");

	sc = device_get_softc(dev);
	sc->sc_class = &scc_quicc_class;
	if (BUS_READ_IVAR(parent, dev, QUICC_IVAR_BRGCLK, &rclk))
		rclk = 0;
	return (scc_bfe_probe(dev, 0, rclk, 0));
}
Example #17
0
static int
ppc_puc_probe(device_t dev)
{
	device_t parent;
	uintptr_t type;

	parent = device_get_parent(dev);
	if (BUS_READ_IVAR(parent, dev, PUC_IVAR_TYPE, &type))
		return (ENXIO);
	if (type != PUC_TYPE_PARALLEL)
		return (ENXIO);

	device_set_desc(dev, "Parallel port");
	return (ppc_probe(dev, 0));
}
Example #18
0
static int
uart_scc_attach(device_t dev)
{
	device_t parent;
	struct uart_softc *sc;
	uintptr_t mtx;

	parent = device_get_parent(dev);
	sc = device_get_softc(dev);

	if (BUS_READ_IVAR(parent, dev, SCC_IVAR_HWMTX, &mtx))
		return (ENXIO);
	sc->sc_hwmtx = (struct mtx *)(void *)mtx;
	return (uart_bus_attach(dev));
}
static int
tsec_ocp_probe(device_t dev)
{
	struct tsec_softc *sc;
	device_t parent;
	uintptr_t devtype;
	int error;
	uint32_t id;

	parent = device_get_parent(dev);

	error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
	if (error)
		return (error);
	if (devtype != OCPBUS_DEVTYPE_TSEC)
		return (ENXIO);

	sc = device_get_softc(dev);

	sc->sc_rrid = 0;
	sc->sc_rres = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->sc_rrid,
	    0ul, ~0ul, TSEC_IO_SIZE, RF_ACTIVE);
	if (sc->sc_rres == NULL)
		return (ENXIO);

	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);

	/* Check if we are eTSEC (enhanced TSEC) */
	id = TSEC_READ(sc, TSEC_REG_ID);
	sc->is_etsec = ((id >> 16) == TSEC_ETSEC_ID) ? 1 : 0;
	id |= TSEC_READ(sc, TSEC_REG_ID2);

	bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);

	if (id == 0) {
		device_printf(dev, "could not identify TSEC type\n");
		return (ENXIO);
	}

	if (sc->is_etsec)
		device_set_desc(dev, "Enhanced Three-Speed Ethernet Controller");
	else
		device_set_desc(dev, "Three-Speed Ethernet Controller");

	return (BUS_PROBE_DEFAULT);
}
Example #20
0
static int
lbc_probe(device_t dev)
{
	device_t parent;
	uintptr_t devtype;
	int error;

	parent = device_get_parent(dev);
	error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
	if (error)
		return (error);
	if (devtype != OCPBUS_DEVTYPE_LBC)
		return (ENXIO);

	device_set_desc(dev, "Freescale MPC85xx Local Bus Controller");
	return (BUS_PROBE_DEFAULT);
}
Example #21
0
static int
coremctl_pci_read_ivar(device_t dev, device_t child, int which,
                       uintptr_t *result)
{
    return BUS_READ_IVAR(device_get_parent(dev), dev, which, result);
}
Example #22
0
int
ata_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{

	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
}
Example #23
0
void
acpi_pci_link_add_reference(device_t dev, int index, device_t pcib, int slot,
    int pin)
{
	struct link *link;
	uint8_t bios_irq;
	uintptr_t bus;

	/*
	 * Look up the PCI bus for the specified PCI bridge device.  Note
	 * that the PCI bridge device might not have any children yet.
	 * However, looking up its bus number doesn't require a valid child
	 * device, so we just pass NULL.
	 */
	if (BUS_READ_IVAR(pcib, NULL, PCIB_IVAR_BUS, &bus) != 0) {
		device_printf(pcib, "Unable to read PCI bus number");
		panic("PCI bridge without a bus number");
	}
		
	/* Bump the reference count. */
	ACPI_SERIAL_BEGIN(pci_link);
	link = acpi_pci_link_lookup(dev, index);
	if (link == NULL) {
		device_printf(dev, "apparently invalid index %d\n", index);
		ACPI_SERIAL_END(pci_link);
		return;
	}
	link->l_references++;
	if (link->l_routed)
		pci_link_interrupt_weights[link->l_irq]++;

	/*
	 * The BIOS only routes interrupts via ISA IRQs using the ATPICs
	 * (8259As).  Thus, if this link is routed via an ISA IRQ, go
	 * look to see if the BIOS routed an IRQ for this link at the
	 * indicated (bus, slot, pin).  If so, we prefer that IRQ for
	 * this link and add that IRQ to our list of known-good IRQs.
	 * This provides a good work-around for link devices whose _CRS
	 * method is either broken or bogus.  We only use the value
	 * returned by _CRS if we can't find a valid IRQ via this method
	 * in fact.
	 *
	 * If this link is not routed via an ISA IRQ (because we are using
	 * APIC for example), then don't bother looking up the BIOS IRQ
	 * as if we find one it won't be valid anyway.
	 */
	if (!link->l_isa_irq) {
		ACPI_SERIAL_END(pci_link);
		return;
	}

	/* Try to find a BIOS IRQ setting from any matching devices. */
	bios_irq = acpi_pci_link_search_irq(bus, slot, pin);
	if (!PCI_INTERRUPT_VALID(bios_irq)) {
		ACPI_SERIAL_END(pci_link);
		return;
	}

	/* Validate the BIOS IRQ. */
	if (!link_valid_irq(link, bios_irq)) {
		device_printf(dev, "BIOS IRQ %u for %d.%d.INT%c is invalid\n",
		    bios_irq, (int)bus, slot, pin + 'A');
	} else if (!PCI_INTERRUPT_VALID(link->l_bios_irq)) {
		link->l_bios_irq = bios_irq;
		if (bios_irq < NUM_ISA_INTERRUPTS)
			pci_link_bios_isa_irqs |= (1 << bios_irq);
		if (bios_irq != link->l_initial_irq &&
		    PCI_INTERRUPT_VALID(link->l_initial_irq))
			device_printf(dev,
			    "BIOS IRQ %u does not match initial IRQ %u\n",
			    bios_irq, link->l_initial_irq);
	} else if (bios_irq != link->l_bios_irq)
		device_printf(dev,
	    "BIOS IRQ %u for %d.%d.INT%c does not match previous BIOS IRQ %u\n",
		    bios_irq, (int)bus, slot, pin + 'A',
		    link->l_bios_irq);
	ACPI_SERIAL_END(pci_link);
}