void ForceSwitchToD3( void ) { //HalTimerWait(50); CLR_BIT(REG_POWER_EN, 0); CBusQueueReset(); fwPowerState = POWER_STATE_D3; }
void SwitchToD3( void ) { if(POWER_STATE_D3 != fwPowerState) { TX_DEBUG_PRINT(("Switch To D3\n")); #ifdef __KERNEL__ //HalGpioSetPin(GPIO_M2U_VBUS_CTRL,1); #else pinM2uVbusCtrlM = 1; #endif #if (SYSTEM_BOARD == SB_EPV5_MARK_II) pinMhlConn = 1; pinUsbConn = 0; #elif (SYSTEM_BOARD == SB_STARTER_KIT_X01) #ifdef __KERNEL__ //HalGpioSetPin(GPIO_MHL_USB,1); #else pinMhlUsb = 1; #endif #endif // change TMDS termination to high impedance //bits 1:0 set to 03 SiiRegWrite(TX_PAGE_2|0x0001, 0x03); SiiRegWrite(REG_MHLTX_CTL1, 0xD0); // clear all interrupt here before go into D3 mode by oscar SiiRegWrite(REG_INTR1,0xFF); SiiRegWrite(REG_INTR2,0xFF); SiiRegWrite(REG_INTR4,0xFF); SiiRegWrite(REG_INTR5,0xFF); SiiRegWrite(REG_CBUS_INTR_STATUS,0xFF); SiiRegWrite(REG_CBUS_MSC_INT2_STATUS,0xFF); #ifndef __KERNEL__ //if(HalGpioGetPin(pinAllowD3)) { #endif ForceUsbIdSwitchOpen(); HalTimerWait(50); ReleaseUsbIdSwitchOpen(); //HalTimerWait(50); CLR_BIT(REG_POWER_EN, 0); CBusQueueReset(); fwPowerState = POWER_STATE_D3; #ifndef __KERNEL__ }/*else { //fwPowerState = POWER_STATE_D0_NO_MHL; } */ #endif } }
void SwitchToD3 (void) { if(POWER_STATE_D3 != fwPowerState) { TX_DEBUG_PRINT(("Drv: Switch To D3\n")); //SiiRegModify(REG_DISC_CTRL6, BIT4, BIT4); //Block RGND INT in Discovery SM. added by garyyuan 20100804 // TX_DEBUG_PRINT(("[%d] Drv: Switch To D3: pinAllowD3 = %d\n", // (int) (HalTimerElapsed( ELAPSED_TIMER ) * MONITORING_PERIOD), (int) pinAllowD3 ) ); //pinM2uVbusCtrlM = 1; //pinMhlConn = 1; //pinUsbConn = 0; ForceUsbIdSwitchOpen(); HalTimerWait(50); // // To allow RGND engine to operate correctly. // So when moving the chip from D0 MHL connected to D3 the values should be // 94[1:0] = 00 reg_cbusmhl_pup_sel[1:0] should be set for open // 93[7:6] = 00 reg_cbusdisc_pup_sel[1:0] should be set for open // 93[5:4] = 00 reg_cbusidle_pup_sel[1:0] = open (default) // // Disable CBUS pull-up during RGND measurement // I2C_WriteByte(PAGE_0_0X72, 0x93, 0x04); // ReadModifyWritePage0(0x93, BIT_7 | BIT_6 | BIT_5 | BIT_4, 0); // ReadModifyWritePage0(0x94, BIT_1 | BIT_0, 0); // 1.8V CBUS VTH & GND threshold // I2C_WriteByte(PAGE_0_0X72, 0x94, 0x64); ReleaseUsbIdSwitchOpen(); // Force HPD to 0 when not in MHL mode. SiiMhlTxDrvAcquireUpstreamHPDControlDriveLow(); // Change TMDS termination to high impedance on disconnection; reduce leakage to QCOM HDMI out, due to QCOM HDMI out can't be truly tri-stated. Each TMDS pin has about 0.1125mA leakage from AVCC33. // Bits 1:0 set to 11 SiiRegWrite(REG_MHLTX_CTL1, 0xD0); // clear all interrupt here before go into D3 mode by oscar SiiRegWrite(TX_PAGE_TPI | 0x0071, 0xFF); SiiRegWrite(TX_PAGE_TPI | 0x0072, 0xFF); SiiRegWrite(TX_PAGE_TPI | 0x0074, 0xBF); // keep BIT6 for fast plug case SiiRegWrite(TX_PAGE_CBUS | 0x0008, 0xFF); SiiRegWrite(TX_PAGE_CBUS | 0x001E, 0xFF); // // GPIO controlled from SiIMon can be utilized to disallow // low power mode, thereby allowing SiIMon to debug register contents. // Otherwise SiIMon reads all registers as 0xFF // // if(pinAllowD3) // { // wait Tsrc:cbus_float HalTimerWait(50); // // Change state to D3 by clearing bit 0 of 3D (SW_TPI, Page 1) register // ReadModifyWriteIndexedRegister(INDEXED_PAGE_1, 0x3D, BIT_0, 0x00); // CLR_BIT(TX_PAGE_L1 | 0x003D, 0); CBusQueueReset(); fwPowerState = POWER_STATE_D3; // } #if (VBUS_POWER_CHK == ENABLE) // Turn VBUS power off when switch to D3(cable out) if( vbusPowerState == false ) { AppVbusControl( vbusPowerState = true ); } #endif } else { fwPowerState = POWER_STATE_D0_NO_MHL; } }