Example #1
0
#define	CLK_PLL10			17

#define	CLK_AXI				19
#define	CLK_AHB1			20
#define	CLK_APB1			21
#define	CLK_APB2			22

#define	CLK_MDFS			107
#define	CLK_SDRAM0			108
#define	CLK_SDRAM1			109

#define	CLK_MBUS0			141
#define	CLK_MBUS1			142

static struct aw_ccung_reset a31_ccu_resets[] = {
	CCU_RESET(RST_USB_PHY0, 0xcc, 0)
	CCU_RESET(RST_USB_PHY1, 0xcc, 1)
	CCU_RESET(RST_USB_PHY2, 0xcc, 2)

	CCU_RESET(RST_AHB1_MIPI_DSI, 0x2c0, 1)
	CCU_RESET(RST_AHB1_SS, 0x2c0, 5)
	CCU_RESET(RST_AHB1_DMA, 0x2c0, 6)
	CCU_RESET(RST_AHB1_MMC0, 0x2c0, 8)
	CCU_RESET(RST_AHB1_MMC1, 0x2c0, 9)
	CCU_RESET(RST_AHB1_MMC2, 0x2c0, 10)
	CCU_RESET(RST_AHB1_MMC3, 0x2c0, 11)
	CCU_RESET(RST_AHB1_NAND1, 0x2c0, 12)
	CCU_RESET(RST_AHB1_NAND0, 0x2c0, 13)
	CCU_RESET(RST_AHB1_SDRAM, 0x2c0, 14)
	CCU_RESET(RST_AHB1_EMAC, 0x2c0, 17)
	CCU_RESET(RST_AHB1_TS, 0x2c0, 18)
Example #2
0
#define	CLK_BUS_SCR		66

#define	CLK_USBPHY0		88
#define	CLK_USBPHY1		89
#define	CLK_USBPHY2		90
#define	CLK_USBPHY3		91
#define	CLK_USBOHCI0		92
#define	CLK_USBOHCI1		93
#define	CLK_USBOHCI2		94
#define	CLK_USBOHCI3		95
#define	CLK_DRAM		96

#define	CLK_MBUS		113

static struct aw_ccung_reset h3_ccu_resets[] = {
	CCU_RESET(RST_USB_PHY0, 0xcc, 0)
	CCU_RESET(RST_USB_PHY1, 0xcc, 1)
	CCU_RESET(RST_USB_PHY2, 0xcc, 2)
	CCU_RESET(RST_USB_PHY3, 0xcc, 3)

	CCU_RESET(RST_MBUS, 0xfc, 31)

	CCU_RESET(RST_BUS_CE, 0x2c0, 5)
	CCU_RESET(RST_BUS_DMA, 0x2c0, 6)
	CCU_RESET(RST_BUS_MMC0, 0x2c0, 8)
	CCU_RESET(RST_BUS_MMC1, 0x2c0, 9)
	CCU_RESET(RST_BUS_MMC2, 0x2c0, 10)
	CCU_RESET(RST_BUS_NAND, 0x2c0, 13)
	CCU_RESET(RST_BUS_DRAM, 0x2c0, 14)
	CCU_RESET(RST_BUS_EMAC, 0x2c0, 17)
	CCU_RESET(RST_BUS_TS, 0x2c0, 18)
Example #3
0
#define	CLK_APB1		16
#define	CLK_APB2		17
#define	CLK_AHB2		18

#define	CLK_CCI400		58

#define CLK_DRAM		82

#define	CLK_MBUS		95

/* Non-exported fixed clocks */
#define CLK_OSC_12M		150


static struct aw_ccung_reset a83t_ccu_resets[] = {
	CCU_RESET(RST_USB_PHY0, 0xcc, 0)
	CCU_RESET(RST_USB_PHY1, 0xcc, 1)
	CCU_RESET(RST_USB_HSIC, 0xcc, 2)

	CCU_RESET(RST_DRAM, 0xf4, 31)
	CCU_RESET(RST_MBUS, 0xfc, 31)

	CCU_RESET(RST_BUS_MIPI_DSI, 0x2c0, 1)
	CCU_RESET(RST_BUS_SS, 0x2c0, 5)
	CCU_RESET(RST_BUS_DMA, 0x2c0, 6)
	CCU_RESET(RST_BUS_MMC0, 0x2c0, 8)
	CCU_RESET(RST_BUS_MMC1, 0x2c0, 9)
	CCU_RESET(RST_BUS_MMC2, 0x2c0, 10)
	CCU_RESET(RST_BUS_NAND, 0x2c0, 13)
	CCU_RESET(RST_BUS_DRAM, 0x2c0, 14)
	CCU_RESET(RST_BUS_EMAC, 0x2c0, 17)