/** Initialize the GPIO pin
*
* @param obj The GPIO object to initialize
* @param pin The GPIO pin to initialize
*/
void gpio_init(gpio_t *obj, PinName pin)
{
/* Initialize the GPIO membase */
obj->GPIOMEMBASE = GPIOREG;
/* Initialize the pin to be GPIO */
obj->gpioPin = pin;
obj->gpioMask = gpio_set(pin);
/* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO);
/* Set the drive strength of the pin to 1 by default */
/** - Get PAD IO register address for the PAD number */
PadReg_t *PadRegOffset = (PadReg_t*)(PADREG_BASE + (pin * PAD_REG_ADRS_BYTE_SIZE));
/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
/** - Enable the clock for PAD peripheral device */
CLOCK_ENABLE(CLOCK_PAD);
/** - Set drive type, pulltype & drive strength */
PadRegOffset->PADIO0.BITS.POWER = 1;
/** - Disable the clock for PAD peripheral device */
CLOCK_DISABLE(CLOCK_PAD);
}
/** Find description at pad.h */
void fPadInit()
{
/** - Enable the clock for PAD peripheral device */
CLOCK_ENABLE(CLOCK_PAD);
/** - Set pad parameters, output drive strength, pull piece control, output drive type */
PADREG->PADIO0.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 TXD */
PADREG->PADIO1.WORD = PAD_INPUT_PD_L1_PP; /* UART1 RXD */
PADREG->PADIO2.WORD = PAD_INPUT_PD_L1_PP; /* UART1 CTS */
PADREG->PADIO3.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 RTS */
PADREG->PADIO4.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO5.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO6.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO7.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO8.WORD = PAD_OUTPUT_PN_L1_OD; /* UART2 TXD */
PADREG->PADIO9.WORD = PAD_INPUT_PD_L1_PP; /* UART2 RXD */
PADREG->PADIO10.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO11.WORD = PAD_INPUT_PD_L1_PP; /* SWO */
PADREG->PADIO12.WORD = PAD_INPUT_PD_L1_PP; /* SWCLK */
PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */
PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP;
PADREG->PADIO15.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO16.WORD = PAD_UNUSED_PD_L0_PP;
PADREG->PADIO17.WORD = PAD_UNUSED_PD_L0_PP;
/** - Disable the clock for PAD peripheral device */
CLOCK_DISABLE(CLOCK_PAD);
}
/* Initializes PMU module */
void fPmuInit()
{
/** Enable the clock for PMU peripheral device */
CLOCK_ENABLE(CLOCK_PMU);
/** Unset wakeup on pending (only enabled irq can wakeup) */
SCB->SCR &= ~SCB_SCR_SEVONPEND_Msk;
/** Unset auto sleep when returning from wakeup irq */
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
/** Set regulator timings */
PMUREG->FVDD_TSETTLE = 160;
PMUREG->FVDD_TSTARTUP = 400;
/** Keep SRAMA & SRAMB powered in coma mode */
PMUREG->CONTROL.BITS.SRAMA = False;
PMUREG->CONTROL.BITS.SRAMB = False;
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
/** Disable the clock for PMU peripheral device, all settings are done */
CLOCK_DISABLE(CLOCK_PMU);
}
/** Read the input value
*
* @param obj The GPIO object
* @return An integer value 1 or 0
*/
int gpio_read(gpio_t *obj)
{
int ret;
/* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO);
ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;
/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
return ret;
}
/** Set the pin direction
*
* @param obj The GPIO object
* @param direction The pin direction to be set
*/
void gpio_dir(gpio_t *obj, PinDirection direction)
{
/* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO);
if (direction == PIN_INPUT) {
obj->GPIOMEMBASE->W_IN = obj->gpioMask;
} else if (direction == PIN_OUTPUT) {
obj->GPIOMEMBASE->W_OUT = obj->gpioMask;
}
/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
}
/** Set the output value
*
* @param obj The GPIO object
* @param value The value to be set
*/
void gpio_write(gpio_t *obj, int value)
{
/* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO);
/* Set the GPIO based on value */
if (value) {
obj->GPIOMEMBASE->R_STATE_W_SET = obj->gpioMask;
} else {
obj->GPIOMEMBASE->R_IRQ_W_CLEAR = obj->gpioMask;
}
/* - Disable the GPIO clock */
CLOCK_DISABLE(CLOCK_GPIO);
}
int main(void) {
// setup t10 internal clock speed
CCP = 0xD8;
CLKMSR = 0x00; // internal 8MHz
CCP = 0xD8;
CLKPSR = 0x03; // 1/8 prescaler -> 1MHz
si5351_init();
CLOCK_DISABLE(); // Power down all output drivers
SETUP_XTAL_CAP(CAP_10PF); // Set the load capacitance for the XTAL
PLL_SOURCE_XTAL(); // input source of PLAA PLLB to xtal
// PLLA
// VCO Frequency (MHz) = 696.204000000
SETUP_PLLA(26UL, 5051UL, 6500UL); // Input Frequency (MHz) = 26.000000000, Feedback Divider = 26 5051/6500
// PLLB
// VCO Frequency (MHz) = 832.000000000
SETUP_PLLB(32UL, 0UL, 1UL); // Input Frequency (MHz) = 26.000000000, Feedback Divider = 32
// Channel 0
// Output Frequency (MHz) = 4.194000000
SETUP_DIV0(166UL, 0UL, 1UL, OD_PARAM(1)); // Multisynth Output Frequency (MHz) = 4.194000000, Multisynth Divider = 166, R Divider = 1
CLOCK0_CONTROL(SOURCE_PLLA, MODE_INT); // PLL source = PLLA
// Channel 1
// Output Frequency (MHz) = 12.80000000
SETUP_DIV1(65UL, 0UL, 1UL, OD_PARAM(1)); // Multisynth Output Frequency (MHz) = 12.800000000, Multisynth Divider = 65, R Divider = 1
CLOCK1_CONTROL(SOURCE_PLLB, MODE_INT); // PLL source = PLLB
// Channel 2
// Output Frequency (MHz) = 0.010000000
SETUP_DIV2(1300UL, 0UL, 1UL, OD_PARAM(64)); // Multisynth Output Frequency (MHz) = 0.640000000, Multisynth Divider = 1300, R Divider = 64
CLOCK2_CONTROL(SOURCE_PLLB, MODE_INT); // PLL source = PLLB
PLL_SOFTRESET(); // Apply PLLA and PLLB soft reset
ENABLE_OUTPUT(); // Enable all outputs
while(1) {
sleep_cpu();
}
}
/** Find description at pad.h */
boolean fPadIOCtrl(uint8_t PadNum, uint8_t OutputDriveStrength, uint8_t OutputDriveType, uint8_t PullType)
{
PadReg_t *PadRegOffset;
/** \verbatim
Table: O/p drive strength
Drive strength 3.3V (min/typ/max) 1V (min/typ/max)
000 1/1.4/2.1 mA 0.043/0.07/0.11 mA
001 2/2.7/4.1 mA 0.086/0.15/0.215 mA
010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA
011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA
100 20.8/26/37 mA* 1/1.6/2.2 mA
101 40.5/50/70 mA* 2/3/4.3 mA
11x 57/73/102 mA* 3/4.6/6.2 mA
*Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */
if((PadNum <= PAD_NUM_OF_IO) &&
(OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) &&
(OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX)) {
/** - Get PAD IO register address for the PAD number */
PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE));
/** - Enable the clock for PAD peripheral device */
CLOCK_ENABLE(CLOCK_PAD);
/** - Set drive type, pulltype & drive strength */
PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) |
(OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) |
(OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS));
/** - Disable the clock for PAD peripheral device */
CLOCK_DISABLE(CLOCK_PAD);
return True;
}
/* Invalid parameter/s */
return False;
}
