int boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int status;
/* Avoid timer calibration on slave cpus. Use the value calibrated
* on master cpu. This reduces the bringup time for each slave cpu
* by around 260ms.
*/
preset_lpj = loops_per_jiffy;
if (is_lp_cluster()) {
struct clk *cpu_clk, *cpu_g_clk;
/* The G CPU may not be available for a variety of reasons. */
status = is_g_cluster_available(cpu);
if (status)
goto done;
cpu_clk = tegra_get_clock_by_name("cpu");
cpu_g_clk = tegra_get_clock_by_name("cpu_g");
/* Switch to G CPU before continuing. */
if (!cpu_clk || !cpu_g_clk) {
/* Early boot, clock infrastructure is not initialized
- CPU mode switch is not allowed */
status = -EINVAL;
} else
status = clk_set_parent(cpu_clk, cpu_g_clk);
if (status)
goto done;
}
smp_wmb();
/* Force the CPU into reset. The CPU must remain in reset when the
flow controller state is cleared (which will cause the flow
controller to stop driving reset if the CPU has been power-gated
via the flow controller). This will have no effect on first boot
of the CPU since it should already be in reset. */
writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET);
dmb();
/* Unhalt the CPU. If the flow controller was used to power-gate the
CPU this will cause the flow controller to stop driving reset.
The CPU will remain in reset because the clock and reset block
is now driving reset. */
flowctrl_writel(0, FLOW_CTRL_HALT_CPU(cpu));
status = power_up_cpu(cpu);
if (status)
goto done;
/* Take the CPU out of reset. */
writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
wmb();
done:
return status;
}
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int status;
/*
* Force the CPU into reset. The CPU must remain in reset when the
* flow controller state is cleared (which will cause the flow
* controller to stop driving reset if the CPU has been power-gated
* via the flow controller). This will have no effect on first boot
* of the CPU since it should already be in reset.
*/
writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET);
dmb();
/*
* Unhalt the CPU. If the flow controller was used to power-gate the
* CPU this will cause the flow controller to stop driving reset.
* The CPU will remain in reset because the clock and reset block
* is now driving reset.
*/
flowctrl_write_cpu_halt(cpu, 0);
switch (tegra_chip_id) {
case TEGRA20:
status = tegra20_power_up_cpu(cpu);
break;
case TEGRA30:
status = tegra30_power_up_cpu(cpu);
break;
default:
status = -EINVAL;
break;
}
if (status)
goto done;
/* Take the CPU out of reset. */
writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
wmb();
done:
return status;
}
static
void zynq_cpu1_init(void)
{
#if 0
unsigned long r;
unsigned long orig_reset;
unsigned long loop;
unsigned long ctrl;
/* Initialize Snoop Control Unit */
ctrl = mmio_readl(ZYNQ_SCU_PHYS_BASE + SCU_CONTROL_0);
ctrl |= 1;
mmio_writel(ctrl, ZYNQ_SCU_PHYS_BASE + SCU_CONTROL_0);
/* Set boot entry */
mmio_writel(virt_to_phys(secondary_startup),
IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + EVP_CPU_RESET_VECTOR_0);
dsb();
isb();
/* Halt CPU */
mmio_writel(0, IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + FLOW_CTRL_HALT_CPUx_EVENTS(1));
dsb();
isb();
/* CPU Clock Stop */
r = mmio_readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE) + CLK_RST_CONTROLLER_CLK_CPU_CMPLX_0);
r &= ~CPU_CLK_STOP(1);
mmio_writel(r, IO_ADDRESS(TEGRA_CLK_RESET_BASE) + CLK_RST_CONTROLLER_CLK_CPU_CMPLX_0);
dsb();
isb();
/* Restart Slave CPU */
mmio_writel(CPU_RESET(1), IO_ADDRESS(TEGRA_CLK_RESET_BASE) + CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR_0);
dsb();
isb();
#endif
}
int statsave_load(const OEMCHAR *filename) {
SFFILEH sffh;
int ret;
BOOL done;
const SFENTRY *tbl;
const SFENTRY *tblterm;
sffh = statflag_open(filename, NULL, 0);
if (sffh == NULL) {
return(STATFLAG_FAILURE);
}
// PCCORE read!
ret = statflag_readsection(sffh);
if ((ret != STATFLAG_SUCCESS) ||
(memcmp(sffh->sfh.hdr.index, np2tbl[0].index, sizeof(sffh->sfh.hdr.index)))) {
statflag_close(sffh);
return(STATFLAG_FAILURE);
}
soundmng_stop();
rs232c_midipanic();
mpu98ii_midipanic();
pc9861k_midipanic();
sxsi_alltrash();
ret |= flagload_common(&sffh->sfh, np2tbl);
CPU_RESET();
CPU_SETEXTSIZE((UINT32)pccore.extmem);
nevent_allreset();
sound_changeclock();
beep_changeclock();
sound_reset();
fddmtrsnd_bind();
iocore_reset(&np2cfg); // サウンドでpicを呼ぶので…
cbuscore_reset(&np2cfg);
fmboard_reset(&np2cfg, pccore.sound);
done = FALSE;
while((!done) && (ret != STATFLAG_FAILURE)) {
ret |= statflag_readsection(sffh);
tbl = np2tbl + 1;
tblterm = np2tbl + NELEMENTS(np2tbl);
while(tbl < tblterm) {
if (!memcmp(sffh->sfh.hdr.index, tbl->index, sizeof(sffh->sfh.hdr.index))) {
break;
}
tbl++;
}
if (tbl < tblterm) {
switch(tbl->type) {
case STATFLAG_BIN:
ret |= flagload_common(&sffh->sfh, tbl);
break;
case STATFLAG_TERM:
done = TRUE;
break;
case STATFLAG_COM:
ret |= flagload_com(&sffh->sfh, tbl);
break;
case STATFLAG_DMA:
ret |= flagload_dma(&sffh->sfh, tbl);
break;
case STATFLAG_EGC:
ret |= flagload_egc(&sffh->sfh, tbl);
break;
case STATFLAG_EPSON:
ret |= flagload_epson(&sffh->sfh, tbl);
break;
case STATFLAG_EVT:
ret |= flagload_evt(&sffh->sfh, tbl);
break;
case STATFLAG_EXT:
ret |= flagload_ext(&sffh->sfh, tbl);
break;
case STATFLAG_FDD:
ret |= flagload_fdd(&sffh->sfh, tbl);
break;
#if !defined(DISABLE_SOUND)
case STATFLAG_FM:
ret |= flagload_fm(&sffh->sfh, tbl);
break;
#endif
case STATFLAG_GIJ:
ret |= flagload_gij(&sffh->sfh, tbl);
break;
#if defined(SUPPORT_HOSTDRV)
case STATFLAG_HDRV:
ret |= hostdrv_sfload(&sffh->sfh, tbl);
break;
#endif
case STATFLAG_MEM:
ret |= flagload_mem(&sffh->sfh, tbl);
break;
case STATFLAG_SXSI:
ret |= flagload_sxsi(&sffh->sfh, tbl);
break;
default:
ret |= STATFLAG_WARNING;
break;
}
}
else {
ret |= STATFLAG_WARNING;
}
}
statflag_close(sffh);
// I/O作り直し
MEMM_ARCH((pccore.model & PCMODEL_EPSON)?1:0);
iocore_build();
iocore_bind();
cbuscore_bind();
fmboard_bind();
gdcs.textdisp |= GDCSCRN_EXT;
gdcs.textdisp |= GDCSCRN_ALLDRAW2;
gdcs.grphdisp |= GDCSCRN_EXT;
gdcs.grphdisp |= GDCSCRN_ALLDRAW2;
gdcs.palchange = GDCSCRN_REDRAW;
tramflag.renewal = 1;
cgwindow.writable |= 0x80;
#if defined(CPUSTRUC_FONTPTR)
FONTPTR_LOW = fontrom + cgwindow.low;
FONTPTR_HIGH = fontrom + cgwindow.high;
#endif
MEMM_VRAM(vramop.operate);
fddmtr_reset();
soundmng_play();
return(ret);
}