int board_early_init_f (void)
{
volatile immap_t *im = (immap_t *) CFG_IMMR;
u32 lpcaw;
/*
* Initialize Local Window for the CPLD registers access (CS2 selects
* the CPLD chip)
*/
im->sysconf.lpcs2aw = CSAW_START(CFG_CPLD_BASE) |
CSAW_STOP(CFG_CPLD_BASE, CFG_CPLD_SIZE);
im->lpc.cs_cfg[2] = CFG_CS2_CFG;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
lpcaw = im->sysconf.lpcs2aw;
__asm__ __volatile__ ("isync");
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
*
* Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID.
*/
#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
#else
if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
}
#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG;
if (SVR_MJREV (im->sysconf.spridr) >= 2) {
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS_ALE_TIMING_CONFIG)) = CFG_CS_ALETIMING;
}
/*
* Enable clocks
*/
im->clk.sccr[0] = SCCR1_CLOCKS_EN;
im->clk.sccr[1] = SCCR2_CLOCKS_EN;
return 0;
}
int board_early_init_f (void)
{
volatile immap_t *im = (immap_t *) CFG_IMMR;
u32 lpcaw;
/*
* Initialize Local Window for the CPLD registers access (CS2 selects
* the CPLD chip)
*/
im->sysconf.lpcs2aw = CSAW_START(CFG_CPLD_BASE) |
CSAW_STOP(CFG_CPLD_BASE, CFG_CPLD_SIZE);
im->lpc.cs_cfg[2] = CFG_CS2_CFG;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
lpcaw = im->sysconf.lpcs2aw;
__asm__ __volatile__ ("isync");
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
*
* Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID.
*/
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
/*
* Enable clocks
*/
im->clk.sccr[0] = SCCR1_CLOCKS_EN;
im->clk.sccr[1] = SCCR2_CLOCKS_EN;
return 0;
}
int misc_init_r(void)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
/*
* Re-configure flash setup using auto-detected info
*/
if (flash_info[1].size > 0) {
out_be32(&im->sysconf.lpcs1aw,
CSAW_START(gd->bd->bi_flashstart + flash_info[1].size) |
CSAW_STOP(gd->bd->bi_flashstart + flash_info[1].size,
flash_info[1].size));
sync_law(&im->sysconf.lpcs1aw);
/*
* Re-check to get correct base address
*/
flash_get_size (gd->bd->bi_flashstart + flash_info[1].size, 1);
} else {
/* Disable Bank 1 */
out_be32(&im->sysconf.lpcs1aw, 0x01000100);
sync_law(&im->sysconf.lpcs1aw);
}
out_be32(&im->sysconf.lpcs0aw,
CSAW_START(gd->bd->bi_flashstart) |
CSAW_STOP(gd->bd->bi_flashstart, flash_info[0].size));
sync_law(&im->sysconf.lpcs0aw);
/*
* Re-check to get correct base address
*/
flash_get_size (gd->bd->bi_flashstart, 0);
/*
* Re-do flash protection upon new addresses
*/
flash_protect (FLAG_PROTECT_CLEAR,
gd->bd->bi_flashstart, 0xffffffff,
&flash_info[0]);
/* Monitor protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
&flash_info[0]);
/* Environment protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#ifdef CONFIG_ENV_ADDR_REDUND
/* Redundant environment protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CONFIG_ENV_ADDR_REDUND,
CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#endif
#ifdef CONFIG_FSL_DIU_FB
set_lcd_brightness(0);
/* Switch LCD-Backlight and LVDS-Interface on */
setbits_be32(&im->gpio.gpdir, 0x01040000);
clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000);
#endif
#if defined(CONFIG_HARD_I2C)
if (!getenv("ethaddr")) {
uchar buf[6];
uchar ifm_oui[3] = { 0, 2, 1, };
int ret;
/* I2C-0 for on-board eeprom */
i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
/* Read ethaddr from EEPROM */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
if (ret != 0) {
printf("Error: Unable to read MAC from I2C"
" EEPROM at address %02X:%02X\n",
CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
return 1;
}
/* Owned by IFM ? */
if (memcmp(buf, ifm_oui, sizeof(ifm_oui))) {
printf("Illegal MAC address in EEPROM: %pM\n", buf);
return 1;
}
eth_setenv_enetaddr("ethaddr", buf);
}
#endif /* defined(CONFIG_HARD_I2C) */
return 0;
}
