Example #1
0
/*
 * csi2_irq_ctx_set - Enables CSI2 Context IRQs.
 * @enable: Enable/disable CSI2 Context interrupts
 */
static void csi2_irq_ctx_set(struct iss_csi2_device *csi2, int enable)
{
	u32 reg = CSI2_CTX_IRQ_FE;
	int i;

	if (csi2->use_fs_irq)
		reg |= CSI2_CTX_IRQ_FS;

	for (i = 0; i < 8; i++) {
		iss_reg_write(csi2->iss, csi2->regs1, CSI2_CTX_IRQSTATUS(i),
			      reg);
		if (enable)
			iss_reg_set(csi2->iss, csi2->regs1,
				    CSI2_CTX_IRQENABLE(i), reg);
		else
			iss_reg_clr(csi2->iss, csi2->regs1,
				    CSI2_CTX_IRQENABLE(i), reg);
	}
}
Example #2
0
/*
 * csi2_irq_ctx_set - Enables CSI2 Context IRQs.
 * @enable: Enable/disable CSI2 Context interrupts
 */
static void csi2_irq_ctx_set(struct iss_csi2_device *csi2, int enable)
{
	u32 reg = CSI2_CTX_IRQ_FE;
	int i;

	if (csi2->use_fs_irq)
		reg |= CSI2_CTX_IRQ_FS;

	for (i = 0; i < 8; i++) {
		writel(reg, csi2->regs1 + CSI2_CTX_IRQSTATUS(i));
		if (enable)
			writel(readl(csi2->regs1 + CSI2_CTX_IRQENABLE(i)) | reg,
				csi2->regs1 + CSI2_CTX_IRQENABLE(i));
		else
			writel(readl(csi2->regs1 + CSI2_CTX_IRQENABLE(i)) &
				~reg,
				csi2->regs1 + CSI2_CTX_IRQENABLE(i));
	}
}