/**
* version of printf that works better in exception context.
*
* @param format
*
* XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
*/
void cvmx_safe_printf(const char *format, ...)
{
char buffer[256];
char *ptr = buffer;
int count;
va_list args;
va_start(args, format);
#ifndef __U_BOOT__
count = vsnprintf(buffer, sizeof(buffer), format, args);
#else
count = vsprintf(buffer, format, args);
#endif
va_end(args);
while (count-- > 0)
{
cvmx_uart_lsr_t lsrval;
/* Spin until there is room */
do
{
lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
#if !defined(CONFIG_OCTEON_SIM_SPEED)
if (lsrval.s.temt == 0)
cvmx_wait(10000); /* Just to reduce the load on the system */
#endif
}
while (lsrval.s.temt == 0);
if (*ptr == '\n')
cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
}
}
/**
* version of printf that works better in exception context.
*
* @param format
*/
static void safe_printf(const char *format, ...)
{
static char buffer[256];
va_list args;
va_start(args, format);
int count = vsnprintf(buffer, sizeof(buffer), format, args);
va_end(args);
char *ptr = buffer;
while (count-- > 0)
{
cvmx_uart_lsr_t lsrval;
/* Spin until there is room */
do
{
lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
if (lsrval.s.temt == 0)
cvmx_wait(10000); /* Just to reduce the load on the system */
}
while (lsrval.s.temt == 0);
if (*ptr == '\n')
cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
}
}
/**
* Put a single byte to uart port.
*
* @param uart_index Uart to write to (0 or 1)
* @param ch Byte to write
*/
static inline void uart_write_byte(int uart, uint8_t ch)
{
cvmx_uart_lsr_t lsrval;
uint8_t uart_index = GET_UART_INDEX(uart);
uint8_t node = GET_UART_NODE(uart);
/* Spin until there is room */
do {
lsrval.u64 = cvmx_read_csr_node(node,
CVMX_MIO_UARTX_LSR(uart_index));
} while (lsrval.s.thre == 0);
WATCHDOG_RESET();
/* Write the byte */
cvmx_write_csr_node(node, CVMX_MIO_UARTX_THR(uart_index), ch);
}
/**
* Put a single byte to uart port.
*
* @param uart_index Uart to write to (0 or 1)
* @param ch Byte to write
*/
inline void uart_write_byte( int uart_index, uint8_t ch )
{
if ( !pci_console )
{
cvmx_uart_lsr_t lsrval;
// Spin until there is room
do
{
lsrval.u64 = cvmx_read_csr( CVMX_MIO_UARTX_LSR( uart_index ) );
if ( lsrval.s.thre == 0 )
{
cvmx_wait( 10000 ); /* Just to reduce the load on the system */
}
}
while ( lsrval.s.thre == 0 );
// Write the byte
cvmx_write_csr( CVMX_MIO_UARTX_THR( uart_index ), ch );
return;
}
else
{
char r = '\r';
if ( pci_cons_desc_addr )
{
if (ch == '\n')
octeon_pci_console_write(pci_cons_desc_addr, 0, &r, 1, OCT_PCI_CON_FLAG_NONBLOCK);
octeon_pci_console_write(pci_cons_desc_addr, 0, (char *)&ch, 1, OCT_PCI_CON_FLAG_NONBLOCK);
}
else
{
printf( "pci_console read error\n" );
}
}
}