static void spi_ensure_settings(spi_desc_t *desc) { /* * Ensure SPI module is set up with the correct * settings, etc. */ /* * XXX: plenty of scope for optimization, by not doing this over and * over again if things are compatible. */ /* * Chip_SSP_SetClock_Rate(..., clk_rate, prescale) * The bit frequency is PCLK / (prescale * [clk_rate+1]) */ Chip_SSP_SetClockRate(desc->spi_dev, 0, 4); //dev->clock_khz = desc->max_clock_khz; Chip_SSP_SetFormat(desc->spi_dev, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0); //dev->clock_pol = desc->clock_pol; Chip_SSP_SetMaster(desc->spi_dev, 1); Chip_SSP_Enable(desc->spi_dev); }
/* Set the clock frequency for SSP interface */ void Chip_SSP_SetBitRate(LPC_SSP_T *pSSP, uint32_t bitRate) { uint32_t ssp_clk, cr0_div, cmp_clk, prescale; ssp_clk = Chip_Clock_GetRate(Chip_SSP_GetClockIndex(pSSP)); cr0_div = 0; cmp_clk = 0xFFFFFFFF; prescale = 2; while (cmp_clk > bitRate) { cmp_clk = ssp_clk / ((cr0_div + 1) * prescale); if (cmp_clk > bitRate) { cr0_div++; if (cr0_div > 0xFF) { cr0_div = 0; prescale += 2; } } } Chip_SSP_SetClockRate(pSSP, cr0_div, prescale); }
void Chip_ADS1248_Init() { Chip_SSP_DeInit(ADS_SSP); //Clear previous setup Chip_GPIO_Init(LPC_GPIO); //Init GPIO Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_SCLK, IOCON_FUNC2); //SCLK Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MOSI, IOCON_FUNC2); //MOSI Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MISO, IOCON_FUNC2); //MISO Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL1, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START1, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET1,IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL0, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START0, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET0,IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY0, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY1, IOCON_FUNC0 | IOCON_MODE_PULLUP); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL1); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START1); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET1); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL0); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START0); Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET0); Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY0); Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY1); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL1); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET1); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START1); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL0); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET0); Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START0); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT); Chip_SYSCTL_SetPinInterrupt(0, ADS_nDRDY0); Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(0)); Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(0)); Chip_SYSCTL_EnablePINTWakeup(0); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT); Chip_SYSCTL_SetPinInterrupt(1, ADS_nDRDY1); Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(1)); Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(1)); Chip_SYSCTL_EnablePINTWakeup(1); Chip_SSP_Init(ADS_SSP); ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI; //SPI Frame ssp_format.bits = SSP_BITS_8; //8bits ssp_format.clockMode = SSP_CLOCK_CPHA1_CPOL0; //CPHA=1, CPOL=0 Chip_SSP_SetFormat(ADS_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode); Chip_SSP_Set_Mode(ADS_SSP, SSP_MODE_MASTER); Chip_SSP_SetClockRate(ADS_SSP, 1, 16); Chip_Clock_SetSSP1ClockDiv(1); Chip_SSP_Enable(ADS_SSP); ADS1248_PeriphInit(CHIP_U1); ADS1248_PeriphInit(CHIP_U3); }