/* Clock and PLL initialization based on the external clock input */
void Chip_SetupExtInClocking(uint32_t iFreq)
{
PLL_CONFIG_T pllConfig;
PLL_SETUP_T pllSetup;
PLL_ERROR_T pllError;
/* IOCON clock left on, this is needed is CLKIN is used. */
Chip_Clock_EnablePeriphClock(SYSCON_CLOCK_IOCON);
/* Select external clock input pin */
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, (IOCON_MODE_PULLUP |
IOCON_FUNC1 | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF));
/* Select the PLL input to the EXT clock input */
Chip_Clock_SetSystemPLLSource(SYSCON_PLLCLKSRC_CLKIN);
/* Setup FLASH access */
setupFlashClocks(iFreq);
/* Power down PLL to change the PLL divider ratio */
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Setup PLL configuration */
pllConfig.desiredRate = iFreq;
pllConfig.InputRate = 0;
pllConfig.flags = PLL_CONFIGFLAG_FORCENOFRACT;
pllError = Chip_Clock_SetupPLLData(&pllConfig, &pllSetup);
if (pllError == PLL_ERROR_SUCCESS) {
pllSetup.flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_ADGVOLT;
pllError = Chip_Clock_SetupSystemPLLPrec(&pllSetup);
}
/* Set system clock divider to 1 */
Chip_Clock_SetSysClockDiv(1);
/* Set main clock source to the system PLL. This will drive 24MHz
for the main clock and 24MHz for the system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
/* ASYSNC SYSCON needs to be on or all serial peripheral won't work.
Be careful if PLL is used or not, ASYNC_SYSCON source needs to be
selected carefully. */
Chip_SYSCON_Enable_ASYNC_Syscon(true);
Chip_Clock_SetAsyncSysconClockDiv(1);
Chip_Clock_SetAsyncSysconClockSource(SYSCON_ASYNC_IRC);
}
/* Clock and PLL initialization based on the internal oscillator */
void Chip_SetupIrcClocking(uint32_t iFreq)
{
PLL_CONFIG_T pllConfig;
PLL_SETUP_T pllSetup;
PLL_ERROR_T pllError;
/* Turn on the IRC by clearing the power down bit */
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_IRC_OSC | SYSCON_PDRUNCFG_PD_IRC);
/* Select the PLL input to the IRC */
Chip_Clock_SetSystemPLLSource(SYSCON_PLLCLKSRC_IRC);
/* Setup FLASH access */
setupFlashClocks(iFreq);
/* Power down PLL to change the PLL divider ratio */
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Setup PLL configuration */
pllConfig.desiredRate = iFreq;
pllConfig.InputRate = 0;
pllConfig.flags = PLL_CONFIGFLAG_FORCENOFRACT;
pllError = Chip_Clock_SetupPLLData(&pllConfig, &pllSetup);
if (pllError == PLL_ERROR_SUCCESS) {
pllSetup.flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_ADGVOLT;
pllError = Chip_Clock_SetupSystemPLLPrec(&pllSetup);
}
Chip_Clock_SetSysClockDiv(1);
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
//Chip_Clock_SetCLKOUTSource(SYSCON_CLKOUTSRC_MAINCLK, 1);
/* ASYSNC SYSCON needs to be on or all serial peripheral won't work.
Be careful if PLL is used or not, ASYNC_SYSCON source needs to be
selected carefully. */
Chip_SYSCON_Enable_ASYNC_Syscon(true);
Chip_Clock_SetAsyncSysconClockDiv(4);
Chip_Clock_SetAsyncSysconClockSource(SYSCON_ASYNC_MAINCLK);//SYSCON_ASYNC_IRC);//SYSCON_ASYNC_SYSPLLOUT
}
/**
* @brief Main program body
* @return Does not return
*/
int main(void)
{
/* Generic Initialization */
SystemCoreClockUpdate();
/* Board_Init calls Chip_GPIO_Init and enables GPIO clock if needed,
Chip_GPIO_Init is not called again */
Board_Init();
Board_LED_Set(0, false);
Chip_PININT_Init(LPC_PININT);
/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure pin as GPIO */
Chip_IOCON_PinMuxSet(LPC_IOCON, GPIO_PININT_PORT, GPIO_PININT_PIN,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
/* Configure pin interrupt selection for the GPIO pin in Input Mux Block */
Chip_INMUX_PinIntSel(GPIO_PININT_INDEX, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
/* Enable interrupt in the NVIC */
NVIC_EnableIRQ(PININT_NVIC_NAME);
/* Enable wakeup for PININT0 */
Chip_SYSCON_EnableWakeup(SYSCON_STARTER_PINT0);
/* save the clock source, power down the PLL */
saved_clksrc = Chip_Clock_GetMainClockSource();
/* Go to sleep mode - LED will toggle on each wakeup event */
while (1) {
/* Go to sleep state - will wake up automatically on interrupt */
/* Disable PLL, if previously enabled, prior to sleep */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
}
/* Lower system voltages to current lock (likely IRC) */
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetMainClockRate());
/* Go to sleep leaving SRAM powered during sleep. Use lower
voltage during sleep. */
Chip_POWER_EnterPowerMode(PDOWNMODE,
(SYSCON_PDRUNCFG_PD_SRAM0A | SYSCON_PDRUNCFG_PD_SRAM0B));
/* On wakeup, restore PLL power if needed */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Wait for PLL lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetSystemPLLOutClockRate(false));
/* Use PLL for system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
}
}
return 0;
}
