void SPI_select(int dev)
{
SPI_deselect();
switch(dev) {
case MEMCS:
ClearPin(PORTB, MEM_SEL);
break;
case VSXCS:
ClearPin(PORTD, VS_XCS);
break;
case VSXDCS:
ClearPin(PORTD, VS_XDCS);
break;
}
}
void ChannelPinMapper::SetNPins(int nPins)
{
if (nPins<0) nPins=0;
else if (nPins>CHANNELPINMAPPER_MAXPINS) nPins=CHANNELPINMAPPER_MAXPINS;
int i;
for (i = m_nPins; i < nPins; ++i) {
ClearPin(i);
if (i < m_nCh) {
SetPin(i, i, true);
}
}
m_nPins = nPins;
}
// Initializes mem card
char MEM_init()
{
char val;
mem_bus_granted = 0;
// acquire the SPI bus and other necesary signals
val = MEM_acquireControl();
if(val)
return(val);
// reset to known idle state
// assert reset, wait and deassert reset
ClearPin(PORTC, MEM_RESET);
delay(1);
SetPin(PORTC, MEM_RESET);
// get memory status
// select memory
SPI_select(MEMCS);
// read status register
SPI_send(READ_STATUS_REGISTER);
// get return value
val = SPI_receive(0x00);
SPI_deselect();
if(((val >> 2) & 0x0f) == 0x0f) {
if(!(val & 0x01)) {
MEM.mem_size = 8650752;
MEM.page_size = 1056;
}
else {
blinkLED(10);
}
MEM.fbell_offset = MEM.page_size;
MEM.rbell_offset = MEM.mem_size / 2;
}
else
void IOAPIC::ClearIOAPIC() {
for(int apic = 0; apic < system->smp->nr_ioapics; apic++)
for(int pin = 0; pin < nr_ioapic_registers[apic]; pin++)
ClearPin(apic, pin);
}
