enum MACHTYPE ProbeArch()
{
enum ARCHFAM fam;
enum MACHTYPE mach=MACHOther;
int ierr, i;
char res[1024];
fam = ProbeArchFam(NULL);
switch(fam)
{
case AFIA64:
res[0] = '\0';
ierr = CmndOneLine(NULL, "hinv -c processor | fgrep 'Itanium'", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "Itanium 2")) mach = IA64Itan2;
else if (strstr(res, "Itanium")) mach = IA64Itan;
}
break;
case AFMIPS:
res[0] = '\0';
ierr = CmndOneLine(NULL, "hinv -c processor | fgrep 'CPU'", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "R12000") || strstr(res, "R10000") ||
strstr(res, "R14000") || strstr(res, "R16000"))
mach = MIPSR1xK;
}
break;
}
return(mach);
}
int ProbeThrottle()
/*
* RETURNS: 1 if cpu throttling is detected, 0 otherwise
*/
{
int iret=0;
int imax=0, imin=0, icur=0;
char res[1024];
/*
* If cpufreq directory doesn't exist, guess no throttling. If
* cpufreq exists, and cur Mhz < max, throttling is enabled,
* throttling also enabled if governer is not "performance", and min freq
* is less than max
*/
if (!CmndOneLine(NULL,
"cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq", res) )
{
imax = GetFirstInt(res);
assert(!CmndOneLine(NULL,
"cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq", res));
imin = GetFirstInt(res);
assert(!CmndOneLine(NULL,
"cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq", res));
icur = GetFirstInt(res);
assert(!CmndOneLine(NULL,
"cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor", res));
if (icur < imax)
iret = 1;
else if (!strstr(res, "performance") && imin < imax)
iret = 1;
}
return(iret);
}
int ProbeNCPU()
{
int ncpu = 0;
char *reslns, res[1024];
if (!CmndOneLine(NULL, "uname -X | fgrep NumCPU", res))
ncpu = GetFirstInt(res);
else if (!CmndOneLine(NULL, "/bin/uname -X | fgrep NumCPU", res))
ncpu = GetFirstInt(res);
return(ncpu);
}
int ProbeMhz()
{
int mhz=0;
char res[1024];
if (!CmndOneLine(NULL, "fgrep 'cpu MHz' /proc/cpuinfo", res))
mhz = GetFirstInt(res);
if (!mhz &&
!CmndOneLine(NULL, "cat /proc/cpuinfo | fgrep clock | fgrep MHz", res))
mhz = GetLastInt(res);
return(mhz);
}
void GetInstInfo()
{
GetMakeMacro("F77", F77);
FixString(F77);
GetMakeMacro("F77FLAGS", F77FLAGS);
FixString(F77FLAGS);
GetMakeMacro("ICC", ICC);
FixString(ICC);
GetMakeMacro("ICCFLAGS", ICCFLAGS);
FixString(ICCFLAGS);
GetMakeMacro("SMC", SMC);
FixString(SMC);
GetMakeMacro("SMCFLAGS", SMCFLAGS);
FixString(SMCFLAGS);
GetMakeMacro("DMC", DMC);
FixString(DMC);
GetMakeMacro("DMCFLAGS", DMCFLAGS);
FixString(DMCFLAGS);
GetMakeMacro("SKC", SKC);
FixString(SKC);
GetMakeMacro("SKCFLAGS", SKCFLAGS);
FixString(SKCFLAGS);
GetMakeMacro("DKC", DKC);
FixString(DKC);
GetMakeMacro("DKCFLAGS", DKCFLAGS);
FixString(DKCFLAGS);
GetMakeMacro("ARCHDEFS", ARCHDEFS);
FixString(ARCHDEFS);
GetMakeMacro("F2CDEFS", F2CDEFS);
FixString(F2CDEFS);
GetMakeMacro("INSTFLAGS", INSTFLAGS);
FixString(INSTFLAGS);
GetMakeMacro("ARCH", ARCH);
FixString(ARCH);
GetVers(DKC, DKCVERS);
FixString(DKCVERS);
GetVers(SKC, SKCVERS);
FixString(SKCVERS);
GetVers(DMC, DMCVERS);
FixString(DMCVERS);
GetVers(SMC, SMCVERS);
FixString(SMCVERS);
GetVers(ICC, ICCVERS);
FixString(ICCVERS);
GetVers(F77, F77VERS);
FixString(F77VERS);
if (CmndOneLine("uname -a", SYS)) strcpy(UNAM, "UNKNOWN");
else FixString(SYS);
if (CmndOneLine("whoami", UNAM)) strcpy(UNAM, "UNKNOWN");
FixString(UNAM);
if (CmndOneLine("date", DATE)) strcpy(DATE, "UNKNOWN");
FixString(DATE);
}
int ProbeMhz()
{
int mhz=0;
char res[1024];
if (!CmndOneLine(NULL, "/usr/sbin/psrinfo -v | fgrep MHz", res))
{
mhz = GetIntBeforeWord("MHz", res);
if (mhz == BADINT) mhz = 0;
}
if (!mhz && !CmndOneLine(NULL, "/usr/sbin/psrinfo -v | fgrep GHz", res))
{
mhz = GetIntBeforeWord("GHz", res);
mhz = (mhz == BADINT) ? 0 : mhz*1000;
}
return(mhz);
}
enum MACHTYPE ProbeArch()
{
enum ARCHFAM fam;
enum MACHTYPE mach=MACHOther;
int ierr, i;
char res[1024];
fam = ProbeArchFam(NULL);
switch(fam)
{
case AFSPARC:
if (!CmndOneLine(NULL, "/usr/sbin/psrinfo -pv | fgrep UltraSPARC", res))
{
if (strstr(res, "UltraSPARC-IV"))
mach = SunUSIV;
else if (strstr(res, "UltraSPARC-III"))
mach = SunUSIII;
else if (strstr(res, "UltraSPARC-II"))
mach = SunUSII;
else if (strstr(res, "UltraSPARC-I"))
mach = SunUSI;
}
/*
* sparcv9 could be UltraSPARC I,II, III or IV. Only USIII/IV run faster
* than 650Mhz (AFAIK), and as far as ATLAS is concerned, USIII & IV are
* same processor; so declare anything with Mhz > 700 as an USIII. Newer
* chips should have the newer psrinfo used above, which allows more
* precise determination anyway. Actually, USIII redesign happened at
* 1050Mhz, so I should probably call anything Mhz > 1040 an USIV, but
* I assume most USIV will have the newer SunOS/psrinfo above, so declare
* anything using this to be USIII, to minimize user confusion.
*/
else if (!CmndOneLine(NULL, "/usr/sbin/psrinfo -v | fgrep sparcv9", res))
{
mach = SunUSX;
if (!CmndOneLine(NULL, "/usr/sbin/psrinfo -v | fgrep MHz", res))
{
i = GetIntBeforeWord("MHz", res);
if (i != BADINT && i > 700) mach = SunUSIII;
}
else if (!CmndOneLine(NULL, "/usr/sbin/psrinfo -v | fgrep GHz", res))
mach = SunUSIII;
}
break;
}
return(mach);
}
int ProbeNCPU()
{
int ncpu = 0;
char *reslns, res[1024];
if (!CmndOneLine(NULL,
"hinv -c processor | fgrep Processor | fgrep -v 'CPU:'", res))
ncpu = GetFirstInt(res);
return(ncpu);
}
int ProbeMhz()
{
int mhz=0;
char res[1024];
if (!CmndOneLine(NULL, "hinv -c processor | fgrep MHz", res))
{ /* Itanium's use MHz */
mhz = GetIntBeforeWord("MHz", res);
if (mhz == BADINT) mhz = 0;
}
if (!mhz && !CmndOneLine(NULL, "hinv -c processor | fgrep MHZ", res))
{ /* MIPS uses MHZ */
mhz = GetIntBeforeWord("MHZ", res);
if (mhz == BADINT) mhz = 0;
}
if (!mhz && !CmndOneLine(NULL, "hinv -c processor | fgrep GHz", res))
{ /* Don't think MIPS will ever get hear, nobody pres uses GHz */
mhz = GetIntBeforeWord("GHz", res);
mhz = (mhz == BADINT) ? 0 : mhz*1000;
}
return(mhz);
}
void GetVers(char *comp, char *vers)
{
char *vflag[4] = {"--version", "-V", "-v", "-version"};
char ln[LNLEN];
int i, iret;
for (i=0; i < 4; i++)
{
sprintf(ln, "%s %s", comp, vflag[i]);
iret = CmndOneLine(ln, vers);
if (!iret) return;
}
strcpy(vers, "UNKNOWN");
}
int ProbeNCPU()
{
int ncpu = 0;
char *reslns, res[1024];
#if 0
if (mach == Dec21264 || mach == Dec21164 || mach == Dec21064)
{
if ( !CmndOneLine(NULL, "fgrep 'cpus detected' /proc/cpuinfo", res) )
ncpu = GetLastInt(res);
}
#endif
if (!ncpu)
{
reslns = CmndResults(NULL, "grep '^processor' /proc/cpuinfo");
if (reslns) ncpu = fNumLines(reslns);
}
return(ncpu);
}
int ProbePointerBits(int *sure)
{
int iret = 32;
char *uname;
char cmnd[1024], res[1024];
*sure = 0;
/*
* Note this is a weak probe, archinfo_x86 much better . . .
*/
uname = FindUname(NULL);
sprintf(cmnd, "%s -a", uname);
/*
* This probe should be running on backend; if its ptr length is 8, we've
* definitely got a 64 bit machine
* NOTE: getting 4 could be a result of compiler flags on a 64-bit arch,
* so reverse is not dispositive
*/
if (sizeof(void*) == 8)
{
iret = 64;
*sure = 1;
}
else if (!CmndOneLine(NULL, cmnd, res))
{
/*
* If uname is a known 64-bit platform, we're sure we've got OS support
* for 64bits (may not have compiler support, but that's not our fault)
*/
if (strstr(res, "x86_64") || strstr(res, "ppc64") || strstr(res, "ia64"))
{
iret = 64;
*sure = 1;
}
}
return(iret);
}
int RunISAProbe(char *isaxnam, int verb, char *targ, char *opt)
{
char ln[512], ln2[512];
if (targ)
sprintf(ln2, "make IRun_%s atlrun=atlas_runX targ=%s MYFLAGS='%s' 2> /dev/null | fgrep SUCCESS",
isaxnam, targ, opt);
else
sprintf(ln2, "make IRun_%s MYFLAGS='%s' 2> /dev/null | fgrep SUCCESS",
isaxnam, opt);
if(!CmndOneLine(NULL, ln2, ln))
{
if (strstr(ln, "SUCCESS"))
{
if (verb)
fprintf(stdout, " %s: DETECTED!\n", isaxnam);
return(1);
}
}
if (verb > 1)
fprintf(stdout, " cmnd='%s' out='%s'\n", ln2, ln);
if (verb)
fprintf(stdout, " %s: NO.\n", isaxnam);
return(0);
}
void GetMakeMacro(char *str, char *val)
{
char ln[128];
sprintf(ln, "make print_%s | fgrep -v make", str);
if (CmndOneLine(ln, val)) strcpy(val, "UNKNOWN");
}
enum MACHTYPE ProbeArch()
{
enum ARCHFAM fam;
enum MACHTYPE mach=MACHOther;
int ierr, i;
char res[1024];
fam = ProbeArchFam(NULL);
switch(fam)
{
case AFPPC:
if ( !CmndOneLine(NULL, "cat /proc/cpuinfo | fgrep cpu", res) )
{
#if 0
if (strstr(res, "604e")) mach = PPC604e;
else if (strstr(res, "604")) mach = PPC604;
else
#endif
if (strstr(res, "G4")) mach = PPCG4;
else if (strstr(res, "7400")) mach = PPCG4;
else if (strstr(res, "7410")) mach = PPCG4;
else if (strstr(res, "7447")) mach = PPCG4;
else if (strstr(res, "7455")) mach = PPCG4;
else if (strstr(res, "PPC970FX")) mach = PPCG5;
else if (strstr(res, "PPC970MP")) mach = PPCG5;
else if (strstr(res, "POWER7")) mach = IbmPwr7;
else if (strstr(res, "POWER6")) mach = IbmPwr6;
else if (strstr(res, "POWER5")) mach = IbmPwr5;
else if (strstr(res, "POWER4")) mach = IbmPwr4;
}
break;
case AFMIPS:
res[0] = '\0';
ierr = CmndOneLine(NULL, "fgrep 'cpu model' /proc/cpuinfo", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "ICE9"))
mach = MIPSICE9;
/*
* I have no access to what cpuinfo on Linux does for this procs, so this
* is a WAG as to what it would say
*/
else if (strstr(res, "R10000") || strstr(res, "R12000") ||
strstr(res, "R12000") || strstr(res, "R14000"))
mach = MIPSR1xK;
}
break;
case AFIA64:
res[0] = '\0';
ierr = CmndOneLine(NULL, "fgrep 'IA-64' /proc/cpuinfo", res);
if (ierr || res[0] == '\0')
ierr = CmndOneLine(NULL, "fgrep \"model name\" /proc/cpuinfo", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "IA-64") || strstr(res, "McKinley"))
mach = IA64Itan2;
else if (strstr(res, "Itanium")) mach = IA64Itan;
}
break;
case AFX86:
res[0] = '\0';
ierr = CmndOneLine(NULL, "fgrep 'model name' /proc/cpuinfo", res);
if (ierr || res[0] == '\0')
ierr = CmndOneLine(NULL, "fgrep model /proc/cpuinfo", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "Pentium"))
{ /* Pentium of some flavor */
if (strstr(res, " III ")) mach = IntPIII;
else if (strstr(res, " II ")) mach = IntPII;
else if (strstr(res, "Pro")) mach = IntPPRO;
else if (strstr(res, "MMX")) mach = IntP5MMX;
else if (strstr(res, " 4 "))
{
ierr = CmndOneLine(NULL,
"fgrep 'model' /proc/cpuinfo | fgrep -v 'name'", res);
if (!ierr)
{
i = GetLastInt(res);
if (i < 3) mach = IntP4;
else if (i == 3) mach = IntP4E;
}
}
}
else if (strstr(res, "Core"))
{
if (strstr(res, "i7"))
{
if (strstr(res, "2600"))
mach = IntCorei2;
else
mach = IntCorei1;
}
if (strstr(res, "i5"))
{
if (strstr(res, "i5-2500") || strstr(res, "i5-2400") ||
strstr(res, "i5-2390") || strstr(res, "i5-2300"))
mach = IntCorei2;
else
mach = IntCorei1;
}
}
else if (strstr(res, "Xeon")) /* dreaded Xeon-is-anything */
{
if (strstr(res, "E5420")) mach = IntCore2;
}
else if (strstr(res, "Efficeon")) mach = TMEff;
else if (strstr(res, "Athlon HX")) mach = AmdHammer;
else if (strstr(res, "Opteron") || strstr(res, "Hammer") ||
strstr(res, "Athlon(tm) 64"))
mach = AmdHammer;
else if (strstr(res, "Athlon")) mach = AmdAthlon;
else if (strstr(res, "AMD-K7")) mach = AmdAthlon;
}
break;
/*
* Add these back if we get machine access and can test
*/
case AFSPARC: /* don't know here anymore */
#if 0
if ( !CmndOneLine(NULL, "fgrep cpu /proc/cpuinfo", res) )
{
if (strstr(res, "UltraSparc II")) mach = SunUS2;
else if (strstr(res, "UltraSparc I")) mach = SunUS1;
else if (strstr(res, "UltraSparc")) mach = SunUSX;
}
#endif
break;
case AFALPHA:
#if 0
res[0] = '\0';
ierr = CmndOneLine(NULL, "fgrep 'model name' /proc/cpuinfo", res);
if (ierr || res[0] == '\0')
ierr = CmndOneLine(NULL, "fgrep model /proc/cpuinfo", res);
if (!ierr && res[0] != '\0')
{
if (strstr(res, "EV5")) mach = Dec21164;
else if (strstr(res, "EV4")) mach = Dec21064;
else if (strstr(res, "EV6")) mach = Dec21264;
}
#endif
break;
default:
#if 0
if (!CmndOneLine(NULL, "fgrep 'cpu family' /proc/cpuinfo", res))
if (strstr(res, "PA-RISC 2.0")) mach = HPPA20;
#else
;
#endif
}
return(mach);
}
