void Jit::Comp_FPUComp(MIPSOpcode op) { CONDITIONAL_DISABLE; int fs = _FS; int ft = _FT; switch (op & 0xf) { case 0: //f case 8: //sf MOV(32, M(¤tMIPS->fpcond), Imm32(0)); break; case 1: //un case 9: //ngle CompFPComp(fs, ft, CMP_UNORD); break; case 2: //eq case 10: //seq CompFPComp(fs, ft, CMP_EQ); break; case 3: //ueq case 11: //ngl CompFPComp(fs, ft, CMP_EQ, true); break; case 4: //olt case 12: //lt CompFPComp(fs, ft, CMP_LT); break; case 5: //ult case 13: //nge CompFPComp(ft, fs, CMP_NLE); break; case 6: //ole case 14: //le CompFPComp(fs, ft, CMP_LE); break; case 7: //ule case 15: //ngt CompFPComp(ft, fs, CMP_NLT); break; default: DISABLE; } }
void Jit::Comp_FPUComp(MIPSOpcode op) { CONDITIONAL_DISABLE(FPU_COMP); int fs = _FS; int ft = _FT; switch (op & 0xf) { case 0: //f case 8: //sf gpr.SetImm(MIPS_REG_FPCOND, 0); break; case 1: //un case 9: //ngle CompFPComp(fs, ft, CMP_UNORD); break; case 2: //eq case 10: //seq CompFPComp(fs, ft, CMP_EQ); break; case 3: //ueq case 11: //ngl CompFPComp(fs, ft, CMP_EQ, true); break; case 4: //olt case 12: //lt CompFPComp(fs, ft, CMP_LT); break; case 5: //ult case 13: //nge CompFPComp(ft, fs, CMP_NLE); break; case 6: //ole case 14: //le CompFPComp(fs, ft, CMP_LE); break; case 7: //ule case 15: //ngt CompFPComp(ft, fs, CMP_NLT); break; default: DISABLE; } }