/****************************************************************************
*
* NAME: vInitialiseApp
*
* DESCRIPTION:
* Initialises JenOS modules and application.
*
* RETURNS:
* void
*
****************************************************************************/
PRIVATE void vInitialiseApp(void)
{
#ifdef OVERLAYS_BUILD
sInitData.u32ImageOffset = 0;
sInitData.prGetMutex = vGrabLock;
sInitData.prReleaseMutex = vReleaseLock;
sInitData.prOverlayEvent = &vOverlayEvent;
OVLY_bInit(&sInitData);
#endif
/* UART 1 cannot be used as it shares DIO with the LEDS */
DBG_vUartInit(DBG_E_UART_0, DBG_E_UART_BAUD_RATE_115200);
/* initialise JenOS modules */
PWRM_vInit(E_AHI_SLEEP_OSCON_RAMON);
/*
* Initialise the PDM, use an application supplied key (g_sKey),
* The key value can be set to the desired value here, or the key in eFuse can be used.
* To use the key stored in eFuse set the pointer to the key to Null, and remove the
* key structure here.
*/
PDM_vInit(7, 1, 64 * 1024 , NULL, mutexMEDIA, NULL, &g_sKey);
PDUM_vInit();
/* initialise application */
APP_vInitialiseSensorNode();
}
/****************************************************************************
*
* NAME: vAppMain
*
* DESCRIPTION:
* Entry point for application from a cold start.
*
* RETURNS:
* Never returns.
*
****************************************************************************/
PUBLIC void vAppMain(void)
{
/* Initialise the debug diagnostics module to use UART0 at 115K Baud;
* UART 1 cannot be used as it shares DIO with the LEDS */
DBG_vUartInit(DBG_E_UART_0, DBG_E_UART_BAUD_RATE_115200);
/*
* Initialise the stack overflow exception to trigger if the end of the
* stack is reached. See the linker command file to adjust the allocated
* stack size.
*/
vAHI_SetStackOverflow(TRUE, (uint32)&stack_low_water_mark);
/*
* Catch resets due to watchdog timer expiry.
*/
if (bAHI_WatchdogResetEvent())
{
DBG_vPrintf(TRACE_APP, "APP: Watchdog timer has reset device!\n");
/* un-comment to trap watchdog resets here */
//vAHI_WatchdogStop();
//while (1);
}
/* initialise ROM based software modules */
u32AppApiInit(NULL, NULL, NULL, NULL, NULL, NULL);
/* Un-comment this line in order to enable high power module */
//vAHI_HighPowerModuleEnable(TRUE, TRUE);
/* start the RTOS */
OS_vStart(vInitialiseApp, vUnclaimedInterrupt);
/* idle task commences here */
while (TRUE)
{
/* Re-load the watch-dog timer. Execution must return through the idle
* task before the CPU is suspended by the power manager. This ensures
* that at least one task / ISR has executed with in the watchdog period
* otherwise the system will be reset. APP_bAppHealthy is a belt-and-braces check
* on correct application functionality and is a flag set by the main sensor task.
*/
if (APP_bAppHealthy)
{
vAHI_WatchdogRestart();
APP_bAppHealthy = FALSE;
}
/*
* suspends CPU operation when the system is idle or puts the device to
* sleep if there are no activities in progress
*/
PWRM_vManagePower();
}
}
/****************************************************************************
*
* NAME: vAppRegisterPWRMCallbacks
*
* DESCRIPTION:
* Stack called function for registering PWRM callbacks.
*
* RETURNS:
* Never returns.
*
****************************************************************************/
PUBLIC void vAppRegisterPWRMCallbacks(void)
{
/* Debug */
DBG_vUartInit(DBG_E_UART_1, DBG_E_UART_BAUD_RATE_115200);
DBG_vPrintf(RTR_TRACE, "\n%d RTR < vAppRegisterPWRMCallbacks()", NODE_sData.u32Timer);
/* Register the PWRM callbacks */
PWRM_vRegisterPreSleepCallback(RTR_PreSleep);
PWRM_vRegisterWakeupCallback(RTR_Wakeup);
}
/****************************************************************************
*
* NAME: vAppMain
*
* DESCRIPTION:
* Entry point for application from a cold start.
*
* RETURNS:
* void
*
****************************************************************************/
PUBLIC void vAppMain(void)
{
#if JENNIC_CHIP_FAMILY == JN516x
/* Wait until FALSE i.e. on XTAL - otherwise uart data will be at wrong speed */
while (bAHI_GetClkSource() == TRUE);
/* Now we are running on the XTAL, optimise the flash memory wait states */
vAHI_OptimiseWaitStates();
#endif
/*
* Don't use RTS/CTS pins on UART0 as they are used for buttons
* */
vAHI_UartSetRTSCTS(E_AHI_UART_0, FALSE);
/*
* Initialize the debug diagnostics module to use UART0 at 115K Baud;
* Do not use UART 1 if LEDs are used, as it shares DIO with the LEDS
* */
DBG_vUartInit(DBG_E_UART_0, DBG_E_UART_BAUD_RATE_115200);
DBG_vPrintf(TRACE_START, "\nAPP Start: Switch Power Up");
/*
* Initialise the stack overflow exception to trigger if the end of the
* stack is reached. See the linker command file to adjust the allocated
* stack size.
*/
vAHI_SetStackOverflow(TRUE, (uint32)&_stack_low_water_mark);
/*
* Catch resets due to watchdog timer expiry. Comment out to harden code.
*/
if (bAHI_WatchdogResetEvent())
{
DBG_vPrintf(TRACE_START, "\nAPP Start: Watchdog timer has reset device!");
DBG_vDumpStack();
#if HALT_ON_EXCEPTION
vAHI_WatchdogStop();
while (1);
#endif
}
/* initialise ROM based software modules */
#ifndef JENNIC_MAC_MiniMacShim
u32AppApiInit(NULL, NULL, NULL, NULL, NULL, NULL);
#endif
/* Define HIGH_POWER_ENABLE to enable high power module */
#ifdef HIGH_POWER_ENABLE
vAHI_HighPowerModuleEnable(TRUE, TRUE);
#endif
/* start the RTOS */
OS_vStart(vInitialiseApp, vUnclaimedInterrupt, vOSError);
DBG_vPrintf(TRACE_START, "OS started\n");
/* idle task commences here */
while (TRUE)
{
/* Re-load the watch-dog timer. Execution must return through the idle
* task before the CPU is suspended by the power manager. This ensures
* that at least one task / ISR has executed with in the watchdog period
* otherwise the system will be reset.
*/
DBG_vPrintf(TRACE_START, "#");
vAHI_WatchdogRestart();
/*
* suspends CPU operation when the system is idle or puts the device to
* sleep if there are no activities in progress
*/
PWRM_vManagePower();
DBG_vPrintf(TRACE_START, "?");
}
}
/****************************************************************************
*
* NAME: vAppMain
*
* DESCRIPTION:
* Entry point for application from a cold start.
*
* RETURNS:
* Never returns.
*
****************************************************************************/
PUBLIC void vAppMain(void)
{
#ifdef DBG_ENABLE
dbg_vPatchInit();
#endif
os_vPatchInit();
/* Debug */
DBG_vUartInit(DBG_E_UART_1, DBG_E_UART_BAUD_RATE_115200);
vAHI_UartSetRTSCTS(DBG_E_UART_1, FALSE);
DBG_vPrintf(RTR_TRACE, "\n%d RTR < vAppMain()", NODE_sData.u32Timer);
/* Initialise and turn on LEDs */
vLedInitRfd();
vLedControl(0, TRUE);
vLedControl(1, TRUE);
/* Initialise buttons */
vButtonInitRfd();
/* Watchdog ? */
#if NODE_FUNC_WATCHDOG
{
DBG_vPrintf(RTR_TRACE, " Stack low water mark = %08x", &stack_low_water_mark);
*(volatile uint32 *)0x020010e0 = ((uint32)&stack_low_water_mark) | 0x8000000;
if ((*(volatile uint32 *)0x02000004) & 0x80 )
{
DBG_vPrintf(RTR_TRACE, " Watchdog timer has reset device!");
vAHI_WatchdogStop();
while(1);
}
}
#else
{
/* Don't use watchdog */
vAHI_WatchdogStop();
}
#endif
/* Initialise application API */
u32AppApiInit(NULL, NULL, NULL, NULL, NULL, NULL);
/* Start OS */
OS_vStart(RTR_vInit, RTR_vUncInt);
/* Turn off LEDs */
vLedControl(0, FALSE);
vLedControl(1, FALSE);
/* Idle task commences on exit from OS start call */
while (TRUE)
{
/* Watchdog ? */
#if NODE_FUNC_WATCHDOG
{
/* Restart watchdog */
vAHI_WatchdogRestart();
}
#endif
/* Manage power */
PWRM_vManagePower();
}
}
/****************************************************************************
*
* NAME: Device_vInit
*
* DESCRIPTION:
* Entry point for application
*
* RETURNS:
* void, never returns
*
****************************************************************************/
PUBLIC void Device_vInit(bool_t bWarmStart)
{
bool_t bFactoryReset;
/* Initialise stack and hardware interfaces */
v6LP_InitHardware();
/* Cold start ? */
if (FALSE == bWarmStart)
{
/* Initialise exception handler */
Exception_vInit();
/* Initialise all DIO as outputs and drive low */
vAHI_DioSetDirection(0, 0xFFFFFFFE);
vAHI_DioSetOutput(0, 0xFFFFFFFE);
}
/* Debug ? */
#ifdef DBG_ENABLE
{
/* Initialise debugging */
DBG_vUartInit(DEBUG_UART, DEBUG_BAUD_RATE);
/* Disable the debug port flow control lines to turn off LED2 */
vAHI_UartSetRTSCTS(DEBUG_UART, FALSE);
}
#endif
/* 6x chip family ? */
#ifdef JENNIC_CHIP_FAMILY_JN516x
/* Wait for clock to stablise */
while(bAHI_Clock32MHzStable() == FALSE);
#endif
/* 42J01 chip ? */
#ifdef JENNIC_CHIP_JN5142J01
/* Wait for clock to stablise */
while(bAHI_Clock32MHzStable() == FALSE);
#endif
/* Debug */
DBG_vPrintf(TRUE, " ");
DBG_vPrintf(TRUE, "\n\nDEVICE DIO");
DBG_vPrintf(DEBUG_DEVICE_FUNC, "\nDevice_vInit(%d)", bWarmStart);
/* Node initialisation */
Node_vInit(bWarmStart);
/* Cold start ? */
if (FALSE == bWarmStart)
{
/* 4x chip family ? */
#ifdef JENNIC_CHIP_FAMILY_JN514x
{
/* Check for factory reset using flags from flash */
bFactoryReset = Node_bTestFactoryResetFlash();
}
#else
{
/* Check for factory reset using flags from EEPROM */
bFactoryReset = Node_bTestFactoryResetEeprom();
}
#endif
/* Reset the tick queue */
u8TickQueue = 0;
/* Initialise PDM and MIB data */
Device_vPdmInit();
/* Apply factory reset if required */
if (bFactoryReset) Device_vReset(TRUE);
/* Initialise JIP */
(void) Device_eJipInit();
}
#ifdef MK_BLD_NODE_TYPE_END_DEVICE
else
{
/* Debug */
DBG_vPrintf(DEBUG_DEVICE_FUNC, "\ni6LP_ResumeStack()");
/* Resume 6LoWPAN */
i6LP_ResumeStack();
}
#endif
/* Now initialised */
bInitialised = TRUE;
/* Enter main loop */
Device_vMain();
/* Allow sleeping ? */
#ifdef MK_BLD_NODE_TYPE_END_DEVICE
{
/* Go to sleep if we exit main loop */
Device_vSleep();
}
#endif
}
