static void dump_ddrp_register(void)
{
#ifdef CONFIG_DWC_DEBUG
printf("DDRP_PIR 0x%x\n", ddr_readl(DDRP_PIR));
printf("DDRP_PGCR 0x%x\n", ddr_readl(DDRP_PGCR));
printf("DDRP_PGSR 0x%x\n", ddr_readl(DDRP_PGSR));
printf("DDRP_PTR0 0x%x\n", ddr_readl(DDRP_PTR0));
printf("DDRP_PTR1 0x%x\n", ddr_readl(DDRP_PTR1));
printf("DDRP_PTR2 0x%x\n", ddr_readl(DDRP_PTR2));
printf("DDRP_DCR 0x%x\n", ddr_readl(DDRP_DCR));
printf("DDRP_DTPR0 0x%x\n", ddr_readl(DDRP_DTPR0));
printf("DDRP_DTPR1 0x%x\n", ddr_readl(DDRP_DTPR1));
printf("DDRP_DTPR2 0x%x\n", ddr_readl(DDRP_DTPR2));
printf("DDRP_MR0 0x%x\n", ddr_readl(DDRP_MR0));
printf("DDRP_MR1 0x%x\n", ddr_readl(DDRP_MR1));
printf("DDRP_MR2 0x%x\n", ddr_readl(DDRP_MR2));
printf("DDRP_MR3 0x%x\n", ddr_readl(DDRP_MR3));
printf("DDRP_ODTCR 0x%x\n", ddr_readl(DDRP_ODTCR));
int i=0;
for(i=0;i<4;i++) {
printf("DX%dGSR0: %x\n", i, ddr_readl(DDRP_DXGSR0(i)));
printf("@pas:DXDQSTR(%d)= 0x%x\n", i,ddr_readl(DDRP_DXDQSTR(i)));
}
#endif
}
static int dump_out_ddr(struct seq_file *m, void *v)
{
int len = 0;
int i = 0;
len += seq_printf(m ,"--------------------dump the DDRC1---------------\n");
len += seq_printf(m ,"DDRC_STATUS\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_STATUS),DDRC_BASE + DDRC_STATUS);
len += seq_printf(m ,"DDRC_CFG\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_CFG),DDRC_BASE + DDRC_CFG);
len += seq_printf(m ,"DDRC_CTRL\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_CTRL),DDRC_BASE + DDRC_CTRL);
len += seq_printf(m ,"DDRC_LMR\t:0x%08x\taddress\t:0x%08x\n",ddr_readl(DDRC_LMR),DDRC_BASE + DDRC_LMR);
len += seq_printf(m ,"DDRC_TIMING1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(1)),DDRC_BASE + DDRC_TIMING(1));
len += seq_printf(m ,"DDRC_TIMING2\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(2)),DDRC_BASE + DDRC_TIMING(2));
len += seq_printf(m ,"DDRC_TIMING3\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(3)),DDRC_BASE + DDRC_TIMING(3));
len += seq_printf(m ,"DDRC_TIMING4\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(4)),DDRC_BASE + DDRC_TIMING(4));
len += seq_printf(m ,"DDRC_TIMING5\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(5)),DDRC_BASE + DDRC_TIMING(5));
len += seq_printf(m ,"DDRC_TIMING6\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_TIMING(6)),DDRC_BASE + DDRC_TIMING(6));
len += seq_printf(m ,"DDRC_REFCNT\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REFCNT),DDRC_BASE + DDRC_REFCNT);
len += seq_printf(m ,"DDRC_MMAP0\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_MMAP0),DDRC_BASE + DDRC_MMAP0);
len += seq_printf(m ,"DDRC_MMAP1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_MMAP1),DDRC_BASE + DDRC_MMAP1);
len += seq_printf(m ,"DDRC_REMAP1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REMAP(1)),DDRC_BASE + DDRC_REMAP(1));
len += seq_printf(m ,"DDRC_REMAP2\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REMAP(2)),DDRC_BASE + DDRC_REMAP(2));
len += seq_printf(m ,"DDRC_REMAP3\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REMAP(3)),DDRC_BASE + DDRC_REMAP(3));
len += seq_printf(m ,"DDRC_REMAP4\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REMAP(4)),DDRC_BASE + DDRC_REMAP(4));
len += seq_printf(m ,"DDRC_REMAP5\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_REMAP(5)),DDRC_BASE + DDRC_REMAP(5));
len += seq_printf(m ,"DDRC_AUTOSR_EN\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRC_AUTOSR_EN),DDRC_BASE + DDRC_AUTOSR_EN);
len += seq_printf(m ,"--------------------dump the DDRP---------------\n");
len += seq_printf(m ,"DDRP_PIR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PIR),DDRC_BASE + DDRP_PIR);
len += seq_printf(m ,"DDRP_PGCR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PGCR),DDRC_BASE + DDRP_PGCR);
len += seq_printf(m ,"DDRP_PGSR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PGSR),DDRC_BASE + DDRP_PGSR);
len += seq_printf(m ,"DDRP_PTR0\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PTR0),DDRC_BASE + DDRP_PTR0);
len += seq_printf(m ,"DDRP_PTR1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PTR1),DDRC_BASE + DDRP_PTR1);
len += seq_printf(m ,"DDRP_PTR2\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_PTR2),DDRC_BASE + DDRP_PTR2);
len += seq_printf(m ,"DDRP_DSGCR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_DSGCR),DDRC_BASE + DDRP_DSGCR);
len += seq_printf(m ,"DDRP_DCR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_DCR),DDRC_BASE + DDRP_DCR);
len += seq_printf(m ,"DDRP_DTPR0\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_DTPR0),DDRC_BASE + DDRP_DTPR0);
len += seq_printf(m ,"DDRP_DTPR1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_DTPR1),DDRC_BASE + DDRP_DTPR1);
len += seq_printf(m ,"DDRP_DTPR2\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_DTPR2),DDRC_BASE + DDRP_DTPR2);
len += seq_printf(m ,"DDRP_MR0\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_MR0),DDRC_BASE + DDRP_MR0);
len += seq_printf(m ,"DDRP_MR1\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_MR1),DDRC_BASE + DDRP_MR1);
len += seq_printf(m ,"DDRP_MR2\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_MR2),DDRC_BASE + DDRP_MR2);
len += seq_printf(m ,"DDRP_MR3\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_MR3),DDRC_BASE + DDRP_MR3);
len += seq_printf(m ,"DDRP_ODTCR\t:0x%08x\taddress\t:0x%08x\n", ddr_readl(DDRP_ODTCR),DDRC_BASE + DDRP_ODTCR);
for(i=0;i<4;i++) {
len += seq_printf(m ,"DX%dGSR0 \t:0x%08x\taddress\t:0x%08x\n", i, ddr_readl(DDRP_DXGSR0(i)),DDRC_BASE + DDRP_DXGSR0(i));
len += seq_printf(m ,"@pas:DXDQSTR(%d)\t:0x%08x\taddress\t:0x%08x\n", i,ddr_readl(DDRP_DXDQSTR(i)),DDRC_BASE + DDRP_DXDQSTR(i));
}
return len;
}
static void ddr_training(unsigned int mode)
{
unsigned int training_state = -1;
dwc_debug("DDR training\n");
#ifndef CONFIG_DDR_FORCE_SOFT_TRAINING
training_state = ddr_training_hardware(mode);
#endif
if(training_state)
{
int i = 0;
for (i = 0; i < 4; i++) {
dwc_debug("DX%dGSR0: %x\n", i, ddr_readl(DDRP_DXGSR0(i)));
}
dump_ddrp_register();
#ifdef CONFIG_SPL_DDR_SOFT_TRAINING
training_state = ddr_training_software(mode);
#endif // CONFIG_SPL_DDR_SOFT_TRAINING
}
if(DDR_TYPE_MODE(mode) == LPDDR)
training_state = lpddr_retrain_bypass();
if(training_state)
hang();
}
