void vsli_extra(void)
{
/* Test cases with maximum shift amount (this amount is different
from vsri). */
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector2);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
/* Initialize input "vector" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
/* Fill input vector2 with arbitrary values. */
VDUP(vector2, , int, s, 8, 8, 2);
VDUP(vector2, , int, s, 16, 4, -4);
VDUP(vector2, , int, s, 32, 2, 3);
VDUP(vector2, , int, s, 64, 1, 100);
VDUP(vector2, , uint, u, 8, 8, 20);
VDUP(vector2, , uint, u, 16, 4, 30);
VDUP(vector2, , uint, u, 32, 2, 40);
VDUP(vector2, , uint, u, 64, 1, 2);
VDUP(vector2, , poly, p, 8, 8, 20);
VDUP(vector2, , poly, p, 16, 4, 30);
VDUP(vector2, q, int, s, 8, 16, -10);
VDUP(vector2, q, int, s, 16, 8, -20);
VDUP(vector2, q, int, s, 32, 4, -30);
VDUP(vector2, q, int, s, 64, 2, 24);
VDUP(vector2, q, uint, u, 8, 16, 12);
VDUP(vector2, q, uint, u, 16, 8, 3);
VDUP(vector2, q, uint, u, 32, 4, 55);
VDUP(vector2, q, uint, u, 64, 2, 3);
VDUP(vector2, q, poly, p, 8, 16, 12);
VDUP(vector2, q, poly, p, 16, 8, 3);
/* Use maximum allowed shift amount. */
TEST_VSXI_N(INSN_NAME, , int, s, 8, 8, 7);
TEST_VSXI_N(INSN_NAME, , int, s, 16, 4, 15);
TEST_VSXI_N(INSN_NAME, , int, s, 32, 2, 31);
TEST_VSXI_N(INSN_NAME, , int, s, 64, 1, 63);
TEST_VSXI_N(INSN_NAME, , uint, u, 8, 8, 7);
TEST_VSXI_N(INSN_NAME, , uint, u, 16, 4, 15);
TEST_VSXI_N(INSN_NAME, , uint, u, 32, 2, 31);
TEST_VSXI_N(INSN_NAME, , uint, u, 64, 1, 63);
TEST_VSXI_N(INSN_NAME, , poly, p, 8, 8, 7);
TEST_VSXI_N(INSN_NAME, , poly, p, 16, 4, 15);
TEST_VSXI_N(INSN_NAME, q, int, s, 8, 16, 7);
TEST_VSXI_N(INSN_NAME, q, int, s, 16, 8, 15);
TEST_VSXI_N(INSN_NAME, q, int, s, 32, 4, 31);
TEST_VSXI_N(INSN_NAME, q, int, s, 64, 2, 63);
TEST_VSXI_N(INSN_NAME, q, uint, u, 8, 16, 7);
TEST_VSXI_N(INSN_NAME, q, uint, u, 16, 8, 15);
TEST_VSXI_N(INSN_NAME, q, uint, u, 32, 4, 31);
TEST_VSXI_N(INSN_NAME, q, uint, u, 64, 2, 63);
TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 7);
TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 15);
CHECK_RESULTS_NAMED (TEST_MSG, expected_max_shift, "(max shift amount)");
}
void exec_vld1 (void)
{
/* Basic test vec=vld1(buffer); then store vec: vst1(result, vector) */
/* This test actually tests vdl1 and vst1 at the same time */
#define TEST_VLD1(VAR, BUF, Q, T1, T2, W, N) \
VECT_VAR(VAR, T1, W, N) = vld1##Q##_##T2##W(VECT_VAR(BUF, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(VAR, T1, W, N))
/* With ARM RVCT, we need to declare variables before any executable
statement */
DECL_VARIABLE_ALL_VARIANTS(vector);
#if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
DECL_VARIABLE(vector, float, 16, 4);
DECL_VARIABLE(vector, float, 16, 8);
#endif
clean_results ();
TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLD1, vector, buffer);
TEST_VLD1(vector, buffer, , float, f, 32, 2);
TEST_VLD1(vector, buffer, q, float, f, 32, 4);
#if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
TEST_VLD1(vector, buffer, , float, f, 16, 4);
TEST_VLD1(vector, buffer, q, float, f, 16, 8);
#endif
dump_results_hex (TEST_MSG);
}
void exec_vdup_lane (void)
{
/* Basic test: vec1=vdup_lane(vec2, lane), then store the result. */
#define TEST_VDUP_LANE(Q, T1, T2, W, N, N2, L) \
VECT_VAR(vector_res, T1, W, N) = \
vdup##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N2), L); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
/* Input vector can only have 64 bits. */
DECL_VARIABLE_64BITS_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector, buffer);
#if defined (FP16_SUPPORTED)
VLOAD(vector, buffer, , float, f, 16, 4);
#endif
VLOAD(vector, buffer, , float, f, 32, 2);
/* Choose lane arbitrarily. */
TEST_VDUP_LANE(, int, s, 8, 8, 8, 1);
TEST_VDUP_LANE(, int, s, 16, 4, 4, 2);
TEST_VDUP_LANE(, int, s, 32, 2, 2, 1);
TEST_VDUP_LANE(, int, s, 64, 1, 1, 0);
TEST_VDUP_LANE(, uint, u, 8, 8, 8, 7);
TEST_VDUP_LANE(, uint, u, 16, 4, 4, 3);
TEST_VDUP_LANE(, uint, u, 32, 2, 2, 1);
TEST_VDUP_LANE(, uint, u, 64, 1, 1, 0);
TEST_VDUP_LANE(, poly, p, 8, 8, 8, 7);
TEST_VDUP_LANE(, poly, p, 16, 4, 4, 3);
#if defined (FP16_SUPPORTED)
TEST_VDUP_LANE(, float, f, 16, 4, 4, 3);
#endif
TEST_VDUP_LANE(, float, f, 32, 2, 2, 1);
TEST_VDUP_LANE(q, int, s, 8, 16, 8, 2);
TEST_VDUP_LANE(q, int, s, 16, 8, 4, 3);
TEST_VDUP_LANE(q, int, s, 32, 4, 2, 1);
TEST_VDUP_LANE(q, int, s, 64, 2, 1, 0);
TEST_VDUP_LANE(q, uint, u, 8, 16, 8, 5);
TEST_VDUP_LANE(q, uint, u, 16, 8, 4, 1);
TEST_VDUP_LANE(q, uint, u, 32, 4, 2, 0);
TEST_VDUP_LANE(q, uint, u, 64, 2, 1, 0);
TEST_VDUP_LANE(q, poly, p, 8, 16, 8, 5);
TEST_VDUP_LANE(q, poly, p, 16, 8, 4, 1);
#if defined (FP16_SUPPORTED)
TEST_VDUP_LANE(q, float, f, 16, 8, 4, 3);
#endif
TEST_VDUP_LANE(q, float, f, 32, 4, 2, 1);
#if defined (FP16_SUPPORTED)
CHECK_RESULTS (TEST_MSG, "");
#else
CHECK_RESULTS_NO_FP16 (TEST_MSG, "");
#endif
}
void exec_vld1 (void)
{
/* Basic test vec=vld1(buffer); then store vec: vst1(result, vector). */
/* This test actually tests vdl1 and vst1 at the same time. */
#define TEST_VLD1(VAR, BUF, Q, T1, T2, W, N) \
VECT_VAR(VAR, T1, W, N) = vld1##Q##_##T2##W(VECT_VAR(BUF, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(VAR, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector);
clean_results ();
TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLD1, vector, buffer);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VLD1(vector, buffer, , float, f, 16, 4);
TEST_VLD1(vector, buffer, q, float, f, 16, 8);
#endif
TEST_VLD1(vector, buffer, , float, f, 32, 2);
TEST_VLD1(vector, buffer, q, float, f, 32, 4);
CHECK_RESULTS (TEST_MSG, "");
}
void FNNAME (INSN_NAME) (void)
{
/* In this case, output variables are arrays of vectors. */
#define DECL_VZIP(T1, W, N) \
VECT_ARRAY_TYPE(T1, W, N, 2) VECT_ARRAY_VAR(result_vec, T1, W, N, 2); \
VECT_VAR_DECL(result_bis, T1, W, N)[2 * N]
/* We need to use a temporary result buffer (result_bis), because
the one used for other tests is not large enough. A subset of the
result data is moved from result_bis to result, and it is this
subset which is used to check the actual behaviour. The next
macro enables to move another chunk of data from result_bis to
result. */
#define TEST_VZIP(INSN, Q, T1, T2, W, N) \
VECT_ARRAY_VAR(result_vec, T1, W, N, 2) = \
INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N)); \
vst2##Q##_##T2##W(VECT_VAR(result_bis, T1, W, N), \
VECT_ARRAY_VAR(result_vec, T1, W, N, 2)); \
memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(result_bis, T1, W, N), \
sizeof(VECT_VAR(result, T1, W, N)));
/* Overwrite "result" with the contents of "result_bis"[X]. */
#define TEST_EXTRA_CHUNK(T1, W, N, X) \
memcpy(VECT_VAR(result, T1, W, N), &(VECT_VAR(result_bis, T1, W, N)[X*N]), \
sizeof(VECT_VAR(result, T1, W, N)));
DECL_VARIABLE_ALL_VARIANTS(vector1);
DECL_VARIABLE_ALL_VARIANTS(vector2);
/* We don't need 64 bits variants. */
#define DECL_ALL_VZIP() \
DECL_VZIP(int, 8, 8); \
DECL_VZIP(int, 16, 4); \
DECL_VZIP(int, 32, 2); \
DECL_VZIP(uint, 8, 8); \
DECL_VZIP(uint, 16, 4); \
DECL_VZIP(uint, 32, 2); \
DECL_VZIP(poly, 8, 8); \
DECL_VZIP(poly, 16, 4); \
DECL_VZIP(float, 32, 2); \
DECL_VZIP(int, 8, 16); \
DECL_VZIP(int, 16, 8); \
DECL_VZIP(int, 32, 4); \
DECL_VZIP(uint, 8, 16); \
DECL_VZIP(uint, 16, 8); \
DECL_VZIP(uint, 32, 4); \
DECL_VZIP(poly, 8, 16); \
DECL_VZIP(poly, 16, 8); \
DECL_VZIP(float, 32, 4)
DECL_ALL_VZIP();
/* Initialize input "vector" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
/* Choose arbitrary initialization values. */
VDUP(vector2, , int, s, 8, 8, 0x11);
VDUP(vector2, , int, s, 16, 4, 0x22);
VDUP(vector2, , int, s, 32, 2, 0x33);
VDUP(vector2, , uint, u, 8, 8, 0x55);
VDUP(vector2, , uint, u, 16, 4, 0x66);
VDUP(vector2, , uint, u, 32, 2, 0x77);
VDUP(vector2, , poly, p, 8, 8, 0x55);
VDUP(vector2, , poly, p, 16, 4, 0x66);
VDUP(vector2, , float, f, 32, 2, 33.6f);
VDUP(vector2, q, int, s, 8, 16, 0x11);
VDUP(vector2, q, int, s, 16, 8, 0x22);
VDUP(vector2, q, int, s, 32, 4, 0x33);
VDUP(vector2, q, uint, u, 8, 16, 0x55);
VDUP(vector2, q, uint, u, 16, 8, 0x66);
VDUP(vector2, q, uint, u, 32, 4, 0x77);
VDUP(vector2, q, poly, p, 8, 16, 0x55);
VDUP(vector2, q, poly, p, 16, 8, 0x66);
VDUP(vector2, q, float, f, 32, 4, 33.8f);
#define TEST_ALL_VZIP(INSN) \
TEST_VZIP(INSN, , int, s, 8, 8); \
TEST_VZIP(INSN, , int, s, 16, 4); \
TEST_VZIP(INSN, , int, s, 32, 2); \
TEST_VZIP(INSN, , uint, u, 8, 8); \
TEST_VZIP(INSN, , uint, u, 16, 4); \
TEST_VZIP(INSN, , uint, u, 32, 2); \
TEST_VZIP(INSN, , poly, p, 8, 8); \
TEST_VZIP(INSN, , poly, p, 16, 4); \
TEST_VZIP(INSN, , float, f, 32, 2); \
TEST_VZIP(INSN, q, int, s, 8, 16); \
TEST_VZIP(INSN, q, int, s, 16, 8); \
TEST_VZIP(INSN, q, int, s, 32, 4); \
TEST_VZIP(INSN, q, uint, u, 8, 16); \
TEST_VZIP(INSN, q, uint, u, 16, 8); \
TEST_VZIP(INSN, q, uint, u, 32, 4); \
TEST_VZIP(INSN, q, poly, p, 8, 16); \
TEST_VZIP(INSN, q, poly, p, 16, 8); \
TEST_VZIP(INSN, q, float, f, 32, 4)
#define TEST_ALL_EXTRA_CHUNKS() \
TEST_EXTRA_CHUNK(int, 8, 8, 1); \
TEST_EXTRA_CHUNK(int, 16, 4, 1); \
TEST_EXTRA_CHUNK(int, 32, 2, 1); \
TEST_EXTRA_CHUNK(uint, 8, 8, 1); \
TEST_EXTRA_CHUNK(uint, 16, 4, 1); \
TEST_EXTRA_CHUNK(uint, 32, 2, 1); \
TEST_EXTRA_CHUNK(poly, 8, 8, 1); \
TEST_EXTRA_CHUNK(poly, 16, 4, 1); \
TEST_EXTRA_CHUNK(float, 32, 2, 1); \
TEST_EXTRA_CHUNK(int, 8, 16, 1); \
TEST_EXTRA_CHUNK(int, 16, 8, 1); \
TEST_EXTRA_CHUNK(int, 32, 4, 1); \
TEST_EXTRA_CHUNK(uint, 8, 16, 1); \
TEST_EXTRA_CHUNK(uint, 16, 8, 1); \
TEST_EXTRA_CHUNK(uint, 32, 4, 1); \
TEST_EXTRA_CHUNK(poly, 8, 16, 1); \
TEST_EXTRA_CHUNK(poly, 16, 8, 1); \
TEST_EXTRA_CHUNK(float, 32, 4, 1)
clean_results ();
/* Execute the tests. */
TEST_ALL_VZIP(INSN_NAME);
CHECK_RESULTS_NAMED (TEST_MSG, expected0, "(chunk 0)");
TEST_ALL_EXTRA_CHUNKS();
CHECK_RESULTS_NAMED (TEST_MSG, expected1, "(chunk 1)");
}
void vqsub_extras(void)
{
DECL_VARIABLE_ALL_VARIANTS(vector1);
DECL_VARIABLE_ALL_VARIANTS(vector2);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
/* Initialize input "vector1" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
/* Use a second vector full of 0. */
VDUP(vector2, , int, s, 64, 1, 0x0);
VDUP(vector2, , uint, u, 64, 1, 0x0);
VDUP(vector2, q, int, s, 64, 2, 0x0);
VDUP(vector2, q, uint, u, 64, 2, 0x0);
#define MSG "64 bits saturation when adding zero"
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64, MSG);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64, MSG);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64, MSG);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64, MSG);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64, MSG);
/* Another set of tests with non-zero values. */
VDUP(vector2, , int, s, 64, 1, 0x44);
VDUP(vector2, , uint, u, 64, 1, 0x88);
VDUP(vector2, q, int, s, 64, 2, 0x44);
VDUP(vector2, q, uint, u, 64, 2, 0x88);
#undef MSG
#define MSG "64 bits saturation cumulative_sat (2)"
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_2, MSG);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_2, MSG);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_2, MSG);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_2, MSG);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_2, MSG);
/* Another set of tests, with input values chosen to set
cumulative_sat in all cases. */
VDUP(vector2, , int, s, 64, 1, 0x7fffffffffffffffLL);
VDUP(vector2, , uint, u, 64, 1, 0xffffffffffffffffULL);
/* To check positive saturation, we need to write a positive value
in vector1. */
VDUP(vector1, q, int, s, 64, 2, 0x3fffffffffffffffLL);
VDUP(vector2, q, int, s, 64, 2, 0x8000000000000000LL);
VDUP(vector2, q, uint, u, 64, 2, 0xffffffffffffffffULL);
#undef MSG
#define MSG "64 bits saturation cumulative_sat (3)"
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_3, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_3, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_3, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_3, MSG);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_3, MSG);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_3, MSG);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_3, MSG);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_3, MSG);
/* To improve coverage, check saturation with less than 64 bits
too. */
VDUP(vector2, , int, s, 8, 8, 0x7F);
VDUP(vector2, , int, s, 16, 4, 0x7FFF);
VDUP(vector2, , int, s, 32, 2, 0x7FFFFFFF);
VDUP(vector2, q, int, s, 8, 16, 0x7F);
VDUP(vector2, q, int, s, 16, 8, 0x7FFF);
VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF);
#undef MSG
#define MSG "less than 64 bits saturation cumulative_sat (1)"
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 8, 8, expected_csat_lt_64_1, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 16, 4, expected_csat_lt_64_1, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 32, 2, expected_csat_lt_64_1, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 8, 16, expected_csat_lt_64_1, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 16, 8, expected_csat_lt_64_1, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_csat_lt_64_1, MSG);
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_lt_64_1, MSG);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_lt_64_1, MSG);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_lt_64_1, MSG);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_lt_64_1, MSG);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_lt_64_1, MSG);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_lt_64_1, MSG);
/* Another set of tests with vector1 values smaller than
vector2. */
VDUP(vector1, , uint, u, 8, 8, 0x10);
VDUP(vector1, , uint, u, 16, 4, 0x10);
VDUP(vector1, , uint, u, 32, 2, 0x10);
VDUP(vector1, q, uint, u, 8, 16, 0x10);
VDUP(vector1, q, uint, u, 16, 8, 0x10);
VDUP(vector1, q, uint, u, 32, 4, 0x10);
VDUP(vector2, , uint, u, 8, 8, 0x20);
VDUP(vector2, , uint, u, 16, 4, 0x20);
VDUP(vector2, , uint, u, 32, 2, 0x20);
VDUP(vector2, q, uint, u, 8, 16, 0x20);
VDUP(vector2, q, uint, u, 16, 8, 0x20);
VDUP(vector2, q, uint, u, 32, 4, 0x20);
#undef MSG
#define MSG "less than 64 bits saturation cumulative_sat (2)"
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 8, 8, expected_csat_lt_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 16, 4, expected_csat_lt_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 32, 2, expected_csat_lt_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 8, 16, expected_csat_lt_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 16, 8, expected_csat_lt_64_2, MSG);
TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 32, 4, expected_csat_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_lt_64_2, MSG);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_lt_64_2, MSG);
}
void exec_vget_lane (void)
{
/* vec=vget_lane(vec, lane), then store the result. */
#define TEST_VGET_LANE(Q, T1, T2, W, N, L) \
VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
if (VAR(var, T1, W) != expected##Q##_##T2##W) { \
fprintf(stderr, \
"ERROR in %s (%s line %d in result '%s') at type %s " \
"got 0x%" PRIx##W " != 0x%" PRIx##W "\n", \
TEST_MSG, __FILE__, __LINE__, \
STR(expected##Q##_##T2##W), \
STR(VECT_NAME(T1, W, N)), \
VAR(var, T1, W), \
expected##Q##_##T2##W); \
error_found = 1; \
}
/* Special variant for floating-point. */
union {
uint32_t var_int32;
float32_t var_float32;
} var_int32_float32;
union {
uint16_t var_int16;
float16_t var_float16;
} var_int16_float16;
#define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L) \
VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
var_int##W##_float##W.var_float##W = VAR(var, T1, W); \
if (var_int##W##_float##W.var_int##W != expected##Q##_##T2##W) { \
fprintf(stderr, \
"ERROR in %s (%s line %d in result '%s') at type %s " \
"got 0x%" PRIx##W " != 0x%" PRIx##W "\n", \
TEST_MSG, __FILE__, __LINE__, \
STR(expected##Q##_##T2##W), \
STR(VECT_NAME(T1, W, N)), \
var_int##W##_float##W.var_int##W, \
expected##Q##_##T2##W); \
error_found = 1; \
}
DECL_VARIABLE_ALL_VARIANTS(vector);
/* Scalar variables. */
VAR_DECL(var, int, 8);
VAR_DECL(var, int, 16);
VAR_DECL(var, int, 32);
VAR_DECL(var, int, 64);
VAR_DECL(var, uint, 8);
VAR_DECL(var, uint, 16);
VAR_DECL(var, uint, 32);
VAR_DECL(var, uint, 64);
VAR_DECL(var, poly, 8);
VAR_DECL(var, poly, 16);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
VAR_DECL(var, float, 16);
#endif
VAR_DECL(var, float, 32);
/* Initialize input values. */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
VLOAD(vector, buffer, , float, f, 16, 4);
VLOAD(vector, buffer, q, float, f, 16, 8);
#endif
VLOAD(vector, buffer, , float, f, 32, 2);
VLOAD(vector, buffer, q, float, f, 32, 4);
/* Choose lane arbitrarily. */
TEST_VGET_LANE(, int, s, 8, 8, 7);
TEST_VGET_LANE(, int, s, 16, 4, 3);
TEST_VGET_LANE(, int, s, 32, 2, 1);
TEST_VGET_LANE(, int, s, 64, 1, 0);
TEST_VGET_LANE(, uint, u, 8, 8, 6);
TEST_VGET_LANE(, uint, u, 16, 4, 2);
TEST_VGET_LANE(, uint, u, 32, 2, 1);
TEST_VGET_LANE(, uint, u, 64, 1, 0);
TEST_VGET_LANE(, poly, p, 8, 8, 6);
TEST_VGET_LANE(, poly, p, 16, 4, 2);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VGET_LANE_FP(, float, f, 16, 4, 1);
#endif
TEST_VGET_LANE_FP(, float, f, 32, 2, 1);
TEST_VGET_LANE(q, int, s, 8, 16, 15);
TEST_VGET_LANE(q, int, s, 16, 8, 5);
TEST_VGET_LANE(q, int, s, 32, 4, 3);
TEST_VGET_LANE(q, int, s, 64, 2, 1);
TEST_VGET_LANE(q, uint, u, 8, 16, 14);
TEST_VGET_LANE(q, uint, u, 16, 8, 6);
TEST_VGET_LANE(q, uint, u, 32, 4, 2);
TEST_VGET_LANE(q, uint, u, 64, 2, 1);
TEST_VGET_LANE(q, poly, p, 8, 16, 14);
TEST_VGET_LANE(q, poly, p, 16, 8, 6);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VGET_LANE_FP(q, float, f, 16, 8, 3);
#endif
TEST_VGET_LANE_FP(q, float, f, 32, 4, 3);
}
void exec_vrev (void)
{
/* Basic test: y=vrev(x), then store the result. */
#define TEST_VREV(Q, T1, T2, W, N, W2) \
VECT_VAR(vector_res, T1, W, N) = \
vrev##W2##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
/* With ARM RVCT, we need to declare variables before any executable
statement */
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
/* Initialize input "vector" from "buffer" */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
VLOAD(vector, buffer, , float, f, 32, 2);
VLOAD(vector, buffer, q, float, f, 32, 4);
/* Check vrev in each of the existing combinations */
#define TEST_MSG "VREV16"
TEST_VREV(, int, s, 8, 8, 16);
TEST_VREV(, uint, u, 8, 8, 16);
TEST_VREV(, poly, p, 8, 8, 16);
TEST_VREV(q, int, s, 8, 16, 16);
TEST_VREV(q, uint, u, 8, 16, 16);
TEST_VREV(q, poly, p, 8, 16, 16);
dump_results_hex (TEST_MSG);
#undef TEST_MSG
#define TEST_MSG "VREV32"
TEST_VREV(, int, s, 8, 8, 32);
TEST_VREV(, int, s, 16, 4, 32);
TEST_VREV(, uint, u, 8, 8, 32);
TEST_VREV(, uint, u, 16, 4, 32);
TEST_VREV(, poly, p, 8, 8, 32);
TEST_VREV(, poly, p, 16, 4, 32);
TEST_VREV(q, int, s, 8, 16, 32);
TEST_VREV(q, int, s, 16, 8, 32);
TEST_VREV(q, uint, u, 8, 16, 32);
TEST_VREV(q, uint, u, 16, 8, 32);
TEST_VREV(q, poly, p, 8, 16, 32);
TEST_VREV(q, poly, p, 16, 8, 32);
dump_results_hex (TEST_MSG);
#undef TEST_MSG
#define TEST_MSG "VREV64"
TEST_VREV(, int, s, 8, 8, 64);
TEST_VREV(, int, s, 16, 4, 64);
TEST_VREV(, int, s, 32, 2, 64);
TEST_VREV(, uint, u, 8, 8, 64);
TEST_VREV(, uint, u, 16, 4, 64);
TEST_VREV(, uint, u, 32, 2, 64);
TEST_VREV(, poly, p, 8, 8, 64);
TEST_VREV(, poly, p, 16, 4, 64);
TEST_VREV(q, int, s, 8, 16, 64);
TEST_VREV(q, int, s, 16, 8, 64);
TEST_VREV(q, int, s, 32, 4, 64);
TEST_VREV(q, uint, u, 8, 16, 64);
TEST_VREV(q, uint, u, 16, 8, 64);
TEST_VREV(q, uint, u, 32, 4, 64);
TEST_VREV(q, poly, p, 8, 16, 64);
TEST_VREV(q, poly, p, 16, 8, 64);
TEST_VREV(, float, f, 32, 2, 64);
TEST_VREV(q, float, f, 32, 4, 64);
dump_results_hex (TEST_MSG);
}
void exec_vrshl (void)
{
/* Basic test: v3=vrshl(v1,v2), then store the result. */
#define TEST_VRSHL(T3, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
VECT_VAR(vector_shift, T3, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
/* With ARM RVCT, we need to declare variables before any executable
statement */
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
clean_results ();
/* Fill input vector with 0, to check behavior on limits */
VDUP(vector, , int, s, 8, 8, 0);
VDUP(vector, , int, s, 16, 4, 0);
VDUP(vector, , int, s, 32, 2, 0);
VDUP(vector, , int, s, 64, 1, 0);
VDUP(vector, , uint, u, 8, 8, 0);
VDUP(vector, , uint, u, 16, 4, 0);
VDUP(vector, , uint, u, 32, 2, 0);
VDUP(vector, , uint, u, 64, 1, 0);
VDUP(vector, q, int, s, 8, 16, 0);
VDUP(vector, q, int, s, 16, 8, 0);
VDUP(vector, q, int, s, 32, 4, 0);
VDUP(vector, q, int, s, 64, 2, 0);
VDUP(vector, q, uint, u, 8, 16, 0);
VDUP(vector, q, uint, u, 16, 8, 0);
VDUP(vector, q, uint, u, 32, 4, 0);
VDUP(vector, q, uint, u, 64, 2, 0);
/* Choose init value arbitrarily, will be used as shift amount */
/* Use values equal to one-less-than the type width to check
behaviour on limits */
VDUP(vector_shift, , int, s, 8, 8, 7);
VDUP(vector_shift, , int, s, 16, 4, 15);
VDUP(vector_shift, , int, s, 32, 2, 31);
VDUP(vector_shift, , int, s, 64, 1, 63);
VDUP(vector_shift, q, int, s, 8, 16, 7);
VDUP(vector_shift, q, int, s, 16, 8, 15);
VDUP(vector_shift, q, int, s, 32, 4, 31);
VDUP(vector_shift, q, int, s, 64, 2, 63);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (with input = 0)");
/* Use negative shift amounts */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -2);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -4);
VDUP(vector_shift, q, int, s, 8, 16, -7);
VDUP(vector_shift, q, int, s, 16, 8, -11);
VDUP(vector_shift, q, int, s, 32, 4, -13);
VDUP(vector_shift, q, int, s, 64, 2, -20);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (input 0 and negative shift amount)");
/* Test again, with predefined input values */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
/* Choose init value arbitrarily, will be used as shift amount */
VDUP(vector_shift, , int, s, 8, 8, 1);
VDUP(vector_shift, , int, s, 16, 4, 3);
VDUP(vector_shift, , int, s, 32, 2, 8);
VDUP(vector_shift, , int, s, 64, 1, -3);
VDUP(vector_shift, q, int, s, 8, 16, 10);
VDUP(vector_shift, q, int, s, 16, 8, 12);
VDUP(vector_shift, q, int, s, 32, 4, 32);
VDUP(vector_shift, q, int, s, 64, 2, 63);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex (TEST_MSG);
/* Use negative shift amounts */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -2);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -4);
VDUP(vector_shift, q, int, s, 8, 16, -7);
VDUP(vector_shift, q, int, s, 16, 8, -11);
VDUP(vector_shift, q, int, s, 32, 4, -13);
VDUP(vector_shift, q, int, s, 64, 2, -20);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (negative shift amount)");
/* Fill input vector with max value, to check behavior on limits */
VDUP(vector, , int, s, 8, 8, 0x7F);
VDUP(vector, , int, s, 16, 4, 0x7FFF);
VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, , uint, u, 8, 8, 0xFF);
VDUP(vector, , uint, u, 16, 4, 0xFFFF);
VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
VDUP(vector, q, int, s, 8, 16, 0x7F);
VDUP(vector, q, int, s, 16, 8, 0x7FFF);
VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, q, uint, u, 8, 16, 0xFF);
VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
/* Use -1 shift amount to check overflow with round_const */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -1);
VDUP(vector_shift, , int, s, 32, 2, -1);
VDUP(vector_shift, , int, s, 64, 1, -1);
VDUP(vector_shift, q, int, s, 8, 16, -1);
VDUP(vector_shift, q, int, s, 16, 8, -1);
VDUP(vector_shift, q, int, s, 32, 4, -1);
VDUP(vector_shift, q, int, s, 64, 2, -1);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (checking round_const overflow: shift by -1)");
/* Use -3 shift amount to check overflow with round_const */
VDUP(vector_shift, , int, s, 8, 8, -3);
VDUP(vector_shift, , int, s, 16, 4, -3);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -3);
VDUP(vector_shift, q, int, s, 8, 16, -3);
VDUP(vector_shift, q, int, s, 16, 8, -3);
VDUP(vector_shift, q, int, s, 32, 4, -3);
VDUP(vector_shift, q, int, s, 64, 2, -3);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (checking round_const overflow: shift by -3)");
/* Use negative shift amount as large as input vector width */
VDUP(vector_shift, , int, s, 8, 8, -8);
VDUP(vector_shift, , int, s, 16, 4, -16);
VDUP(vector_shift, , int, s, 32, 2, -32);
VDUP(vector_shift, , int, s, 64, 1, -64);
VDUP(vector_shift, q, int, s, 8, 16, -8);
VDUP(vector_shift, q, int, s, 16, 8, -16);
VDUP(vector_shift, q, int, s, 32, 4, -32);
VDUP(vector_shift, q, int, s, 64, 2, -64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (checking negative shift amount as large as input vector width)");
/* Test large shift amount */
VDUP(vector_shift, , int, s, 8, 8, 10);
VDUP(vector_shift, , int, s, 16, 4, 20);
VDUP(vector_shift, , int, s, 32, 2, 33);
VDUP(vector_shift, , int, s, 64, 1, 65);
VDUP(vector_shift, q, int, s, 8, 16, 9);
VDUP(vector_shift, q, int, s, 16, 8, 16);
VDUP(vector_shift, q, int, s, 32, 4, 32);
VDUP(vector_shift, q, int, s, 64, 2, 64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (large shift amount)");
/* Test large negative shift amount */
VDUP(vector_shift, , int, s, 8, 8, -10);
VDUP(vector_shift, , int, s, 16, 4, -20);
VDUP(vector_shift, , int, s, 32, 2, -33);
VDUP(vector_shift, , int, s, 64, 1, -65);
VDUP(vector_shift, q, int, s, 8, 16, -9);
VDUP(vector_shift, q, int, s, 16, 8, -16);
VDUP(vector_shift, q, int, s, 32, 4, -32);
VDUP(vector_shift, q, int, s, 64, 2, -64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
dump_results_hex2 (TEST_MSG, " (large negative shift amount)");
}
void exec_vext (void)
{
/* vector_res = vext(vector1,vector2,offset), then store the result. */
#define TEST_VEXT(Q, T1, T2, W, N, V) \
VECT_VAR(vector_res, T1, W, N) = \
vext##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N), \
V); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector1);
DECL_VARIABLE_ALL_VARIANTS(vector2);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
/* Choose arbitrary initialization values. */
VDUP(vector2, , int, s, 8, 8, 0x11);
VDUP(vector2, , int, s, 16, 4, 0x22);
VDUP(vector2, , int, s, 32, 2, 0x33);
VDUP(vector2, , int, s, 64, 1, 0x44);
VDUP(vector2, , uint, u, 8, 8, 0x55);
VDUP(vector2, , uint, u, 16, 4, 0x66);
VDUP(vector2, , uint, u, 32, 2, 0x77);
VDUP(vector2, , uint, u, 64, 1, 0x88);
VDUP(vector2, , poly, p, 8, 8, 0x55);
VDUP(vector2, , poly, p, 16, 4, 0x66);
VDUP(vector2, , float, f, 32, 2, 33.6f);
VDUP(vector2, q, int, s, 8, 16, 0x11);
VDUP(vector2, q, int, s, 16, 8, 0x22);
VDUP(vector2, q, int, s, 32, 4, 0x33);
VDUP(vector2, q, int, s, 64, 2, 0x44);
VDUP(vector2, q, uint, u, 8, 16, 0x55);
VDUP(vector2, q, uint, u, 16, 8, 0x66);
VDUP(vector2, q, uint, u, 32, 4, 0x77);
VDUP(vector2, q, uint, u, 64, 2, 0x88);
VDUP(vector2, q, poly, p, 8, 16, 0x55);
VDUP(vector2, q, poly, p, 16, 8, 0x66);
VDUP(vector2, q, float, f, 32, 4, 33.2f);
/* Choose arbitrary extract offsets. */
TEST_VEXT(, int, s, 8, 8, 7);
TEST_VEXT(, int, s, 16, 4, 3);
TEST_VEXT(, int, s, 32, 2, 1);
TEST_VEXT(, int, s, 64, 1, 0);
TEST_VEXT(, uint, u, 8, 8, 6);
TEST_VEXT(, uint, u, 16, 4, 2);
TEST_VEXT(, uint, u, 32, 2, 1);
TEST_VEXT(, uint, u, 64, 1, 0);
TEST_VEXT(, poly, p, 8, 8, 6);
TEST_VEXT(, poly, p, 16, 4, 2);
TEST_VEXT(, float, f, 32, 2, 1);
TEST_VEXT(q, int, s, 8, 16, 14);
TEST_VEXT(q, int, s, 16, 8, 7);
TEST_VEXT(q, int, s, 32, 4, 3);
TEST_VEXT(q, int, s, 64, 2, 1);
TEST_VEXT(q, uint, u, 8, 16, 12);
TEST_VEXT(q, uint, u, 16, 8, 6);
TEST_VEXT(q, uint, u, 32, 4, 3);
TEST_VEXT(q, uint, u, 64, 2, 1);
TEST_VEXT(q, poly, p, 8, 16, 12);
TEST_VEXT(q, poly, p, 16, 8, 6);
TEST_VEXT(q, float, f, 32, 4, 3);
CHECK_RESULTS (TEST_MSG, "");
}
void FNNAME (INSN_NAME) (void)
{
/* Basic test: v3=vshl(v1,v2), then store the result. */
#define TEST_VSHL(T3, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
vshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
VECT_VAR(vector_shift, T3, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
clean_results ();
/* Initialize input "vector" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
/* Choose init value arbitrarily, will be used as shift amount. */
VDUP(vector_shift, , int, s, 8, 8, 1);
VDUP(vector_shift, , int, s, 16, 4, 3);
VDUP(vector_shift, , int, s, 32, 2, 8);
VDUP(vector_shift, , int, s, 64, 1, 3);
VDUP(vector_shift, q, int, s, 8, 16, 5);
VDUP(vector_shift, q, int, s, 16, 8, 12);
VDUP(vector_shift, q, int, s, 32, 4, 30);
VDUP(vector_shift, q, int, s, 64, 2, 63);
/* Execute the tests. */
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
/* Test large shift amount (larger or equal to the type width. */
VDUP(vector_shift, , int, s, 8, 8, 8);
VDUP(vector_shift, , int, s, 16, 4, 16);
VDUP(vector_shift, , int, s, 32, 2, 32);
VDUP(vector_shift, , int, s, 64, 1, 64);
VDUP(vector_shift, q, int, s, 8, 16, 8);
VDUP(vector_shift, q, int, s, 16, 8, 17);
VDUP(vector_shift, q, int, s, 32, 4, 33);
VDUP(vector_shift, q, int, s, 64, 2, 65);
/* Execute the tests. */
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
#define COMMENT1 "(large shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_large_shift, COMMENT1);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_large_shift, COMMENT1);
/* Test negative shift amount. */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -1);
VDUP(vector_shift, , int, s, 32, 2, -2);
VDUP(vector_shift, , int, s, 64, 1, -4);
VDUP(vector_shift, q, int, s, 8, 16, -2);
VDUP(vector_shift, q, int, s, 16, 8, -5);
VDUP(vector_shift, q, int, s, 32, 4, -3);
VDUP(vector_shift, q, int, s, 64, 2, -5);
/* Execute the tests. */
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
#define COMMENT2 "(negative shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_negative_shift, COMMENT2);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_negative_shift, COMMENT2);
}
void exec_vdup_vmov (void)
{
int i;
/* Basic test: vec=vdup(x), then store the result. */
#undef TEST_VDUP
#define TEST_VDUP(Q, T1, T2, W, N) \
VECT_VAR(vector, T1, W, N) = \
vdup##Q##_n_##T2##W(VECT_VAR(buffer_dup, T1, W, N)[i]); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector, T1, W, N))
/* Basic test: vec=vmov(x), then store the result. */
#define TEST_VMOV(Q, T1, T2, W, N) \
VECT_VAR(vector, T1, W, N) = \
vmov##Q##_n_##T2##W(VECT_VAR(buffer_dup, T1, W, N)[i]); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector);
/* Try to read different places from the input buffer. */
for (i=0; i< 3; i++) {
clean_results ();
TEST_VDUP(, int, s, 8, 8);
TEST_VDUP(, int, s, 16, 4);
TEST_VDUP(, int, s, 32, 2);
TEST_VDUP(, int, s, 64, 1);
TEST_VDUP(, uint, u, 8, 8);
TEST_VDUP(, uint, u, 16, 4);
TEST_VDUP(, uint, u, 32, 2);
TEST_VDUP(, uint, u, 64, 1);
TEST_VDUP(, poly, p, 8, 8);
TEST_VDUP(, poly, p, 16, 4);
TEST_VDUP(, float, f, 32, 2);
TEST_VDUP(q, int, s, 8, 16);
TEST_VDUP(q, int, s, 16, 8);
TEST_VDUP(q, int, s, 32, 4);
TEST_VDUP(q, int, s, 64, 2);
TEST_VDUP(q, uint, u, 8, 16);
TEST_VDUP(q, uint, u, 16, 8);
TEST_VDUP(q, uint, u, 32, 4);
TEST_VDUP(q, uint, u, 64, 2);
TEST_VDUP(q, poly, p, 8, 16);
TEST_VDUP(q, poly, p, 16, 8);
TEST_VDUP(q, float, f, 32, 4);
switch (i) {
case 0:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected0, "");
break;
case 1:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected1, "");
break;
case 2:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected2, "");
break;
default:
abort();
}
}
/* Do the same tests with vmov. Use the same expected results. */
#undef TEST_MSG
#define TEST_MSG "VMOV/VMOVQ"
for (i=0; i< 3; i++) {
clean_results ();
TEST_VMOV(, int, s, 8, 8);
TEST_VMOV(, int, s, 16, 4);
TEST_VMOV(, int, s, 32, 2);
TEST_VMOV(, int, s, 64, 1);
TEST_VMOV(, uint, u, 8, 8);
TEST_VMOV(, uint, u, 16, 4);
TEST_VMOV(, uint, u, 32, 2);
TEST_VMOV(, uint, u, 64, 1);
TEST_VMOV(, poly, p, 8, 8);
TEST_VMOV(, poly, p, 16, 4);
TEST_VMOV(, float, f, 32, 2);
TEST_VMOV(q, int, s, 8, 16);
TEST_VMOV(q, int, s, 16, 8);
TEST_VMOV(q, int, s, 32, 4);
TEST_VMOV(q, int, s, 64, 2);
TEST_VMOV(q, uint, u, 8, 16);
TEST_VMOV(q, uint, u, 16, 8);
TEST_VMOV(q, uint, u, 32, 4);
TEST_VMOV(q, uint, u, 64, 2);
TEST_VMOV(q, poly, p, 8, 16);
TEST_VMOV(q, poly, p, 16, 8);
TEST_VMOV(q, float, f, 32, 4);
switch (i) {
case 0:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected0, "");
break;
case 1:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected1, "");
break;
case 2:
CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected2, "");
break;
default:
abort();
}
}
}
void exec_vrshr_n (void)
{
/* Basic test: y=vrshr_n(x,v), then store the result. */
#define TEST_VRSHR_N(Q, T1, T2, W, N, V) \
VECT_VAR(vector_res, T1, W, N) = \
vrshr##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
V); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
/* Initialize input "vector" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
/* Choose shift amount arbitrarily. */
TEST_VRSHR_N(, int, s, 8, 8, 1);
TEST_VRSHR_N(, int, s, 16, 4, 12);
TEST_VRSHR_N(, int, s, 32, 2, 2);
TEST_VRSHR_N(, int, s, 64, 1, 32);
TEST_VRSHR_N(, uint, u, 8, 8, 2);
TEST_VRSHR_N(, uint, u, 16, 4, 3);
TEST_VRSHR_N(, uint, u, 32, 2, 5);
TEST_VRSHR_N(, uint, u, 64, 1, 33);
TEST_VRSHR_N(q, int, s, 8, 16, 1);
TEST_VRSHR_N(q, int, s, 16, 8, 12);
TEST_VRSHR_N(q, int, s, 32, 4, 2);
TEST_VRSHR_N(q, int, s, 64, 2, 32);
TEST_VRSHR_N(q, uint, u, 8, 16, 2);
TEST_VRSHR_N(q, uint, u, 16, 8, 3);
TEST_VRSHR_N(q, uint, u, 32, 4, 5);
TEST_VRSHR_N(q, uint, u, 64, 2, 33);
#define CMT ""
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
/* Use maximum positive input value. */
VDUP(vector, , int, s, 8, 8, 0x7F);
VDUP(vector, , int, s, 16, 4, 0x7FFF);
VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, , uint, u, 8, 8, 0xFF);
VDUP(vector, , uint, u, 16, 4, 0xFFFF);
VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
VDUP(vector, q, int, s, 8, 16, 0x7F);
VDUP(vector, q, int, s, 16, 8, 0x7FFF);
VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, q, uint, u, 8, 16, 0xFF);
VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
/* Use max shift amount, to exercise saturation. */
TEST_VRSHR_N(, int, s, 8, 8, 8);
TEST_VRSHR_N(, int, s, 16, 4, 16);
TEST_VRSHR_N(, int, s, 32, 2, 32);
TEST_VRSHR_N(, int, s, 64, 1, 64);
TEST_VRSHR_N(, uint, u, 8, 8, 8);
TEST_VRSHR_N(, uint, u, 16, 4, 16);
TEST_VRSHR_N(, uint, u, 32, 2, 32);
TEST_VRSHR_N(, uint, u, 64, 1, 64);
TEST_VRSHR_N(q, int, s, 8, 16, 8);
TEST_VRSHR_N(q, int, s, 16, 8, 16);
TEST_VRSHR_N(q, int, s, 32, 4, 32);
TEST_VRSHR_N(q, int, s, 64, 2, 64);
TEST_VRSHR_N(q, uint, u, 8, 16, 8);
TEST_VRSHR_N(q, uint, u, 16, 8, 16);
TEST_VRSHR_N(q, uint, u, 32, 4, 32);
TEST_VRSHR_N(q, uint, u, 64, 2, 64);
#undef CMT
#define CMT " (overflow test: max shift amount, max positive input)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_max, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_max, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_max, CMT);
/* Use 1 as shift amount, to exercise saturation. */
TEST_VRSHR_N(, int, s, 8, 8, 1);
TEST_VRSHR_N(, int, s, 16, 4, 1);
TEST_VRSHR_N(, int, s, 32, 2, 1);
TEST_VRSHR_N(, int, s, 64, 1, 1);
TEST_VRSHR_N(, uint, u, 8, 8, 1);
TEST_VRSHR_N(, uint, u, 16, 4, 1);
TEST_VRSHR_N(, uint, u, 32, 2, 1);
TEST_VRSHR_N(, uint, u, 64, 1, 1);
TEST_VRSHR_N(q, int, s, 8, 16, 1);
TEST_VRSHR_N(q, int, s, 16, 8, 1);
TEST_VRSHR_N(q, int, s, 32, 4, 1);
TEST_VRSHR_N(q, int, s, 64, 2, 1);
TEST_VRSHR_N(q, uint, u, 8, 16, 1);
TEST_VRSHR_N(q, uint, u, 16, 8, 1);
TEST_VRSHR_N(q, uint, u, 32, 4, 1);
TEST_VRSHR_N(q, uint, u, 64, 2, 1);
#undef CMT
#define CMT " (overflow test: shift by 1, with max input)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_1, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_1, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_1, CMT);
/* Use 3 as shift amount, to exercise saturation. */
TEST_VRSHR_N(, int, s, 8, 8, 3);
TEST_VRSHR_N(, int, s, 16, 4, 3);
TEST_VRSHR_N(, int, s, 32, 2, 3);
TEST_VRSHR_N(, int, s, 64, 1, 3);
TEST_VRSHR_N(, uint, u, 8, 8, 3);
TEST_VRSHR_N(, uint, u, 16, 4, 3);
TEST_VRSHR_N(, uint, u, 32, 2, 3);
TEST_VRSHR_N(, uint, u, 64, 1, 3);
TEST_VRSHR_N(q, int, s, 8, 16, 3);
TEST_VRSHR_N(q, int, s, 16, 8, 3);
TEST_VRSHR_N(q, int, s, 32, 4, 3);
TEST_VRSHR_N(q, int, s, 64, 2, 3);
TEST_VRSHR_N(q, uint, u, 8, 16, 3);
TEST_VRSHR_N(q, uint, u, 16, 8, 3);
TEST_VRSHR_N(q, uint, u, 32, 4, 3);
TEST_VRSHR_N(q, uint, u, 64, 2, 3);
#undef CMT
#define CMT " (overflow test: shift by 3, with max input)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_3, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_3, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_3, CMT);
/* Use minimum negative input for signed types. */
VDUP(vector, , int, s, 8, 8, 0x80);
VDUP(vector, , int, s, 16, 4, 0x8000);
VDUP(vector, , int, s, 32, 2, 0x80000000);
VDUP(vector, , int, s, 64, 1, 0x8000000000000000LL);
VDUP(vector, , uint, u, 8, 8, 0xFF);
VDUP(vector, , uint, u, 16, 4, 0xFFFF);
VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
VDUP(vector, q, int, s, 8, 16, 0x80);
VDUP(vector, q, int, s, 16, 8, 0x8000);
VDUP(vector, q, int, s, 32, 4, 0x80000000);
VDUP(vector, q, int, s, 64, 2, 0x8000000000000000LL);
VDUP(vector, q, uint, u, 8, 16, 0xFF);
VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
/* Use 1 as shift amount, to exercise saturation code. */
TEST_VRSHR_N(, int, s, 8, 8, 1);
TEST_VRSHR_N(, int, s, 16, 4, 1);
TEST_VRSHR_N(, int, s, 32, 2, 1);
TEST_VRSHR_N(, int, s, 64, 1, 1);
TEST_VRSHR_N(, uint, u, 8, 8, 1);
TEST_VRSHR_N(, uint, u, 16, 4, 1);
TEST_VRSHR_N(, uint, u, 32, 2, 1);
TEST_VRSHR_N(, uint, u, 64, 1, 1);
TEST_VRSHR_N(q, int, s, 8, 16, 1);
TEST_VRSHR_N(q, int, s, 16, 8, 1);
TEST_VRSHR_N(q, int, s, 32, 4, 1);
TEST_VRSHR_N(q, int, s, 64, 2, 1);
TEST_VRSHR_N(q, uint, u, 8, 16, 1);
TEST_VRSHR_N(q, uint, u, 16, 8, 1);
TEST_VRSHR_N(q, uint, u, 32, 4, 1);
TEST_VRSHR_N(q, uint, u, 64, 2, 1);
#undef CMT
#define CMT " (overflow test: shift by 1, with negative input)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_neg_sh_1, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_neg_sh_1, CMT);
/* Use 3 as shift amount, to exercise saturation code. */
TEST_VRSHR_N(, int, s, 8, 8, 3);
TEST_VRSHR_N(, int, s, 16, 4, 3);
TEST_VRSHR_N(, int, s, 32, 2, 3);
TEST_VRSHR_N(, int, s, 64, 1, 3);
TEST_VRSHR_N(, uint, u, 8, 8, 3);
TEST_VRSHR_N(, uint, u, 16, 4, 3);
TEST_VRSHR_N(, uint, u, 32, 2, 3);
TEST_VRSHR_N(, uint, u, 64, 1, 3);
TEST_VRSHR_N(q, int, s, 8, 16, 3);
TEST_VRSHR_N(q, int, s, 16, 8, 3);
TEST_VRSHR_N(q, int, s, 32, 4, 3);
TEST_VRSHR_N(q, int, s, 64, 2, 3);
TEST_VRSHR_N(q, uint, u, 8, 16, 3);
TEST_VRSHR_N(q, uint, u, 16, 8, 3);
TEST_VRSHR_N(q, uint, u, 32, 4, 3);
TEST_VRSHR_N(q, uint, u, 64, 2, 3);
#undef CMT
#define CMT " (overflow test: shift by 3, with negative input)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_neg_sh_3, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_neg_sh_3, CMT);
}
void exec_vrshl (void)
{
/* Basic test: v3=vrshl(v1,v2), then store the result. */
#define TEST_VRSHL(T3, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
VECT_VAR(vector_shift, T3, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
clean_results ();
/* Fill input vector with 0, to check behavior on limits. */
VDUP(vector, , int, s, 8, 8, 0);
VDUP(vector, , int, s, 16, 4, 0);
VDUP(vector, , int, s, 32, 2, 0);
VDUP(vector, , int, s, 64, 1, 0);
VDUP(vector, , uint, u, 8, 8, 0);
VDUP(vector, , uint, u, 16, 4, 0);
VDUP(vector, , uint, u, 32, 2, 0);
VDUP(vector, , uint, u, 64, 1, 0);
VDUP(vector, q, int, s, 8, 16, 0);
VDUP(vector, q, int, s, 16, 8, 0);
VDUP(vector, q, int, s, 32, 4, 0);
VDUP(vector, q, int, s, 64, 2, 0);
VDUP(vector, q, uint, u, 8, 16, 0);
VDUP(vector, q, uint, u, 16, 8, 0);
VDUP(vector, q, uint, u, 32, 4, 0);
VDUP(vector, q, uint, u, 64, 2, 0);
/* Choose init value arbitrarily, will be used as shift amount. */
/* Use values equal to one-less-than the type width to check
behaviour on limits. */
VDUP(vector_shift, , int, s, 8, 8, 7);
VDUP(vector_shift, , int, s, 16, 4, 15);
VDUP(vector_shift, , int, s, 32, 2, 31);
VDUP(vector_shift, , int, s, 64, 1, 63);
VDUP(vector_shift, q, int, s, 8, 16, 7);
VDUP(vector_shift, q, int, s, 16, 8, 15);
VDUP(vector_shift, q, int, s, 32, 4, 31);
VDUP(vector_shift, q, int, s, 64, 2, 63);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#define CMT " (with input = 0)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0, CMT);
/* Use negative shift amounts. */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -2);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -4);
VDUP(vector_shift, q, int, s, 8, 16, -7);
VDUP(vector_shift, q, int, s, 16, 8, -11);
VDUP(vector_shift, q, int, s, 32, 4, -13);
VDUP(vector_shift, q, int, s, 64, 2, -20);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (input 0 and negative shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0_sh_neg, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0_sh_neg, CMT);
/* Test again, with predefined input values. */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
/* Choose init value arbitrarily, will be used as shift amount. */
VDUP(vector_shift, , int, s, 8, 8, 1);
VDUP(vector_shift, , int, s, 16, 4, 3);
VDUP(vector_shift, , int, s, 32, 2, 8);
VDUP(vector_shift, , int, s, 64, 1, -3);
VDUP(vector_shift, q, int, s, 8, 16, 10);
VDUP(vector_shift, q, int, s, 16, 8, 12);
VDUP(vector_shift, q, int, s, 32, 4, 32);
VDUP(vector_shift, q, int, s, 64, 2, 63);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT ""
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
/* Use negative shift amounts. */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -2);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -4);
VDUP(vector_shift, q, int, s, 8, 16, -7);
VDUP(vector_shift, q, int, s, 16, 8, -11);
VDUP(vector_shift, q, int, s, 32, 4, -13);
VDUP(vector_shift, q, int, s, 64, 2, -20);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (negative shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_sh_neg, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh_neg, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh_neg, CMT);
/* Fill input vector with max value, to check behavior on limits. */
VDUP(vector, , int, s, 8, 8, 0x7F);
VDUP(vector, , int, s, 16, 4, 0x7FFF);
VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, , uint, u, 8, 8, 0xFF);
VDUP(vector, , uint, u, 16, 4, 0xFFFF);
VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
VDUP(vector, q, int, s, 8, 16, 0x7F);
VDUP(vector, q, int, s, 16, 8, 0x7FFF);
VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
VDUP(vector, q, uint, u, 8, 16, 0xFF);
VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
/* Use -1 shift amount to check overflow with round_const. */
VDUP(vector_shift, , int, s, 8, 8, -1);
VDUP(vector_shift, , int, s, 16, 4, -1);
VDUP(vector_shift, , int, s, 32, 2, -1);
VDUP(vector_shift, , int, s, 64, 1, -1);
VDUP(vector_shift, q, int, s, 8, 16, -1);
VDUP(vector_shift, q, int, s, 16, 8, -1);
VDUP(vector_shift, q, int, s, 32, 4, -1);
VDUP(vector_shift, q, int, s, 64, 2, -1);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (max input, shift by -1)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
/* Use -3 shift amount to check overflow with round_const. */
VDUP(vector_shift, , int, s, 8, 8, -3);
VDUP(vector_shift, , int, s, 16, 4, -3);
VDUP(vector_shift, , int, s, 32, 2, -3);
VDUP(vector_shift, , int, s, 64, 1, -3);
VDUP(vector_shift, q, int, s, 8, 16, -3);
VDUP(vector_shift, q, int, s, 16, 8, -3);
VDUP(vector_shift, q, int, s, 32, 4, -3);
VDUP(vector_shift, q, int, s, 64, 2, -3);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (check rounding constant: max input, shift by -3)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
/* Use negative shift amount as large as input vector width. */
VDUP(vector_shift, , int, s, 8, 8, -8);
VDUP(vector_shift, , int, s, 16, 4, -16);
VDUP(vector_shift, , int, s, 32, 2, -32);
VDUP(vector_shift, , int, s, 64, 1, -64);
VDUP(vector_shift, q, int, s, 8, 16, -8);
VDUP(vector_shift, q, int, s, 16, 8, -16);
VDUP(vector_shift, q, int, s, 32, 4, -32);
VDUP(vector_shift, q, int, s, 64, 2, -64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (max input, right shift by vector width)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
/* Test large shift amount. */
VDUP(vector_shift, , int, s, 8, 8, 10);
VDUP(vector_shift, , int, s, 16, 4, 20);
VDUP(vector_shift, , int, s, 32, 2, 33);
VDUP(vector_shift, , int, s, 64, 1, 65);
VDUP(vector_shift, q, int, s, 8, 16, 9);
VDUP(vector_shift, q, int, s, 16, 8, 16);
VDUP(vector_shift, q, int, s, 32, 4, 32);
VDUP(vector_shift, q, int, s, 64, 2, 64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (max input, large shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large, CMT);
/* Test large negative shift amount. */
VDUP(vector_shift, , int, s, 8, 8, -10);
VDUP(vector_shift, , int, s, 16, 4, -20);
VDUP(vector_shift, , int, s, 32, 2, -33);
VDUP(vector_shift, , int, s, 64, 1, -65);
VDUP(vector_shift, q, int, s, 8, 16, -9);
VDUP(vector_shift, q, int, s, 16, 8, -16);
VDUP(vector_shift, q, int, s, 32, 4, -32);
VDUP(vector_shift, q, int, s, 64, 2, -64);
TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
#undef CMT
#define CMT " (max input, large negative shift amount)"
CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
}
int main (void)
{
#define TEST_VREINTERPRET(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
VECT_VAR(vreint_vector_res, T1, W, N) = \
vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vreint_vector_res, T1, W, N)); \
CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
#define TEST_VREINTERPRET_FP(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
VECT_VAR(vreint_vector_res, T1, W, N) = \
vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vreint_vector_res, T1, W, N)); \
CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
DECL_VARIABLE_ALL_VARIANTS(vreint_vector);
DECL_VARIABLE_ALL_VARIANTS(vreint_vector_res);
clean_results ();
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vreint_vector, buffer);
VLOAD(vreint_vector, buffer, , poly, p, 64, 1);
VLOAD(vreint_vector, buffer, q, poly, p, 64, 2);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
VLOAD(vreint_vector, buffer, , float, f, 16, 4);
VLOAD(vreint_vector, buffer, q, float, f, 16, 8);
#endif
VLOAD(vreint_vector, buffer, , float, f, 32, 2);
VLOAD(vreint_vector, buffer, q, float, f, 32, 4);
/* vreinterpret_p64_* tests. */
#undef TEST_MSG
#define TEST_MSG "VREINTERPRET_P64_*"
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 8, 8, vreint_expected_p64_s8);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 16, 4, vreint_expected_p64_s16);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 32, 2, vreint_expected_p64_s32);
TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 64, 1, vreint_expected_p64_s64);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 8, 8, vreint_expected_p64_u8);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 16, 4, vreint_expected_p64_u16);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 32, 2, vreint_expected_p64_u32);
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 64, 1, vreint_expected_p64_u64);
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 8, 8, vreint_expected_p64_p8);
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 16, 4, vreint_expected_p64_p16);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 16, 4, vreint_expected_p64_f16);
#endif
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 32, 2, vreint_expected_p64_f32);
/* vreinterpretq_p64_* tests. */
#undef TEST_MSG
#define TEST_MSG "VREINTERPRETQ_P64_*"
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 8, 16, vreint_expected_q_p64_s8);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 16, 8, vreint_expected_q_p64_s16);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 32, 4, vreint_expected_q_p64_s32);
TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 64, 2, vreint_expected_q_p64_s64);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 8, 16, vreint_expected_q_p64_u8);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 16, 8, vreint_expected_q_p64_u16);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 32, 4, vreint_expected_q_p64_u32);
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 64, 2, vreint_expected_q_p64_u64);
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 8, 16, vreint_expected_q_p64_p8);
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 16, 8, vreint_expected_q_p64_p16);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 16, 8, vreint_expected_q_p64_f16);
#endif
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 32, 4, vreint_expected_q_p64_f32);
/* vreinterpret_*_p64 tests. */
#undef TEST_MSG
#define TEST_MSG "VREINTERPRET_*_P64"
TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 64, 1, vreint_expected_s8_p64);
TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 64, 1, vreint_expected_s16_p64);
TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 64, 1, vreint_expected_s32_p64);
TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 64, 1, vreint_expected_s64_p64);
TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 64, 1, vreint_expected_u8_p64);
TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 64, 1, vreint_expected_u16_p64);
TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 64, 1, vreint_expected_u32_p64);
TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 64, 1, vreint_expected_u64_p64);
TEST_VREINTERPRET(, poly, p, 8, 8, poly, p, 64, 1, vreint_expected_p8_p64);
TEST_VREINTERPRET(, poly, p, 16, 4, poly, p, 64, 1, vreint_expected_p16_p64);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET_FP(, float, f, 16, 4, poly, p, 64, 1, vreint_expected_f16_p64);
#endif
TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 64, 1, vreint_expected_f32_p64);
TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 64, 2, vreint_expected_q_s8_p64);
TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 64, 2, vreint_expected_q_s16_p64);
TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 64, 2, vreint_expected_q_s32_p64);
TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 64, 2, vreint_expected_q_s64_p64);
TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 64, 2, vreint_expected_q_u8_p64);
TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 64, 2, vreint_expected_q_u16_p64);
TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 64, 2, vreint_expected_q_u32_p64);
TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 64, 2, vreint_expected_q_u64_p64);
TEST_VREINTERPRET(q, poly, p, 8, 16, poly, p, 64, 2, vreint_expected_q_p8_p64);
TEST_VREINTERPRET(q, poly, p, 16, 8, poly, p, 64, 2, vreint_expected_q_p16_p64);
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 64, 2, vreint_expected_q_f16_p64);
#endif
TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 64, 2, vreint_expected_q_f32_p64);
return 0;
}
