static __initdata struct tegra_drive_pingroup_config maya_drive_pinmux[] = { /* DEFAULT_DRIVE(<pin_group>), */ /* SDMMC1 */ SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 36, 20, SLOW, SLOW), /* SDMMC3 */ SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 22, 36, FASTEST, FASTEST), /* SDMMC4 */ SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 2, FASTEST, FASTEST, 1), }; /* Initially setting all used GPIO's to non-TRISTATE */ static __initdata struct tegra_pingroup_config maya_pinmux_set_nontristate[] = { DEFAULT_PINMUX(GPIO_X4_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_X5_AUD, RSVD, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X7_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_W3_AUD, SPI6, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X1_AUD, RSVD3, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X3_AUD, RSVD3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(DAP3_FS, I2S2, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(DAP3_DIN, I2S2, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(DAP3_DOUT, I2S2, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(DAP3_SCLK, I2S2, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_PV1, RSVD, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PBB3, RSVD3, PULL_DOWN, NORMAL, OUTPUT),
#include <linux/gpio.h> #include <mach/pinmux.h> #include <mach/gpio-tegra.h> #include "board.h" #include "board-loki.h" #include "tegra-board-id.h" #include "devices.h" #include "gpio-names.h" #include <mach/pinmux-t12.h> /* Pinmux changes to support UART over uSD adapter E2542 */ static __initdata struct tegra_pingroup_config loki_sdmmc3_uart_pinmux[] = { DEFAULT_PINMUX(SDMMC3_CMD, UARTA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT1, UARTA, NORMAL, NORMAL, OUTPUT), }; static __initdata struct tegra_pingroup_config loki_ffd_pinmux_common[] = { GPIO_PINMUX_NON_OD(DP_HPD, PULL_DOWN, NORMAL, OUTPUT), }; static struct gpio_init_pin_info init_gpio_mode_loki_ffd_common[] = { GPIO_INIT_PIN_MODE(TEGRA_GPIO_PFF0, false, 0), }; static void __init loki_gpio_init_configure(void) { int len; int i;
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config m2601_pinmux_B00[] = { /* SDMMC2 pinmux */ DEFAULT_PINMUX(KB_ROW10, SDMMC2, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(KB_ROW11, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW12, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW13, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW14, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW15, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW6, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW7, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW8, SDMMC2, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW9, SDMMC2, PULL_DOWN, NORMAL, INPUT), /* GPIO */ DEFAULT_PINMUX(CLK1_OUT, RSVD1, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(CLK1_REQ, RSVD2, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(SPDIF_IN, SPDIF, PULL_UP, NORMAL, OUTPUT), DEFAULT_PINMUX(SPDIF_OUT, RSVD1, PULL_UP, NORMAL, OUTPUT),
{ \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_##_od, \ .ioreset = TEGRA_PIN_IO_RESET_DEFAULT, \ } static __initdata struct tegra_pingroup_config x3_pinmux[] = { /* SDMMC3 pinmux micro SD*/ DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), //MICROSD_CLK DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT), //MICROSD_CMD DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT), //MICROSD_DAT0 DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, PULL_UP, NORMAL, INPUT), //MICROSD_DAT1 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT), //MICROSD_DAT2 DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT), //MICROSD_DAT3 /* SDMMC3 pinmux */ //DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, PULL_UP, TRISTATE, INPUT), // DEFAULT_PINMUX(SDMMC3_DAT4, RSVD, PULL_UP, NORMAL, OUTPUT), // DEFAULT_PINMUX(SDMMC3_DAT5, RSVD, PULL_UP, TRISTATE, OUTPUT), // DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, PULL_UP, TRISTATE, INPUT), // DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, NORMAL, NORMAL, OUTPUT), // TOUCH_LDO_EN // DEFAULT_PINMUX(SDMMC3_DAT7, RSVD, PULL_UP, TRISTATE, OUTPUT), #if 0 /* eMMC */
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config p1852_pinmux_common[] = { /* SDMMC1 pinmux */ DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), /* SDMMC2 pinmux */ DEFAULT_PINMUX(KB_ROW10, SDMMC2, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW11, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW12, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW13, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW14, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW15, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW6, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW7, SDMMC2, PULL_UP, NORMAL, INPUT),
static __initdata struct tegra_drive_pingroup_config dolak_drive_pinmux[] = { /* DEFAULT_DRIVE(<pin_group>), */ }; #define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ } static __initdata struct tegra_pingroup_config dolak_pinmux[] = { DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(UART1_TXD, UARTA, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(UART1_RXD, UARTA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(UART1_RTS_N, UARTA, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(UART1_CTS_N, UARTA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, NORMAL, INPUT),
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config m470_pinmux_common[] = { // Audio DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT), //DEFAULT_PINMUX(CLK1_REQ, DAP, NORMAL, TRISTATE, INPUT), DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, TRISTATE, OUTPUT), DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, TRISTATE, OUTPUT), DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SPI1_MISO, SPI1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SPI1_MOSI, SPI1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SPI1_SCK, SPI1, NORMAL, NORMAL, INPUT),
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config ast_pinmux_common[] = { /* SDMMC1 pinmux */ DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), /* SDMMC3 pinmux */ DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, PULL_UP, NORMAL, INPUT),
I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), /* I2C3 pinmux */ I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), /* I2C4 pinmux */ I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), /* Power I2C pinmux */ I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), DEFAULT_PINMUX(SDMMC1_DAT3, UARTE, NORMAL, NORMAL, OUTPUT), //AUD_REMO_TX DEFAULT_PINMUX(SDMMC1_DAT2, UARTE, NORMAL, NORMAL, INPUT), //AUD_REMO_RX DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, OUTPUT), //AUD_REMO_OE# }; int __init evitareul_pinmux_init(void) { struct board_info board_info; tegra_get_board_info(&board_info); tegra_pinmux_config_table(evitareul_pinmux_common, ARRAY_SIZE(evitareul_pinmux_common)); /* all pins should correctly configured in bootloader, * remove all pin config but drive config here */ tegra_drive_pinmux_config_table(evitareul_drive_pinmux,ARRAY_SIZE(evitareul_drive_pinmux)); return 0;
SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* SDMMC1 */ SET_DRIVE(SDIO1, ENABLE, DISABLE, DIV_1, 36, 20, SLOW, SLOW), /* SDMMC3 */ SET_DRIVE(SDIO3, ENABLE, DISABLE, DIV_1, 22, 36, FASTEST, FASTEST), /* SDMMC4 */ SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 2, FASTEST, FASTEST, 1), }; /* Initially setting all used GPIO's to non-TRISTATE */ static __initdata struct tegra_pingroup_config pluto_pinmux_set_nontristate[] = { DEFAULT_PINMUX(GPIO_X4_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_X5_AUD, RSVD, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X7_AUD, RSVD, PULL_DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_W3_AUD, SPI6, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X1_AUD, RSVD3, PULL_DOWN, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_X3_AUD, RSVD3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PV0, RSVD3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PV1, RSVD, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(ULPI_DATA2, ULPI, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(ULPI_DATA3, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA4, ULPI, NORMAL, NORMAL, INPUT),
/* SDMMC4 */ SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 2, FASTEST, FASTEST, 1), }; #include "board-keenhi-t40-pinmux-t11x.h" /* THIS IS FOR EXPERIMENTAL OR WORKAROUND PURPOSES. ANYTHING INSIDE THIS TABLE * SHOULD BE CONSIDERED TO BE PUSHED TO PINMUX SPREADSHEET FOR CONSISTENCY */ static __initdata struct tegra_pingroup_config manual_config_pinmux[] = { /* ULPI SFIOs are not supposed to be supported. * This setting is only for Macallan. */ DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT), }; static void __init keenhi_t40_gpio_init_configure(void) { int len; int i; struct gpio_init_pin_info *pins_info; len = ARRAY_SIZE(init_gpio_mode_keenhi_t40_common); pins_info = init_gpio_mode_keenhi_t40_common; for (i = 0; i < len; ++i) {
/* SDMMC4 */ SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 2, FASTEST, FASTEST, 1), }; #include "board-tegranote7c-pinmux-t11x.h" /* THIS IS FOR TESTING OR WORKAROUND PURPOSES. ANYTHING INSIDE THIS TABLE * SHOULD BE PUSHED TO PINMUX SPREADSHEET FOR AUTOGEN OR FIXED * */ static __initdata struct tegra_pingroup_config manual_config_pinmux[] = { /* ULPI SFIOs are not supposed to be supported. * This setting is only for tegranote7c. */ DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT), }; static __initdata struct tegra_pingroup_config e2542_uart_config_pinmux[] = { DEFAULT_PINMUX(SDMMC3_CMD, UARTA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT1, UARTA, NORMAL, NORMAL, OUTPUT), }; static void __init tegranote7c_gpio_init_configure(void) { int len; int i;
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { /* SDMMC1 pinmux */ DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), /* SDMMC3 pinmux */ DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, PULL_UP, NORMAL, INPUT),
/* SDMMC4 */ SET_DRIVE_WITH_TYPE(GMA, ENABLE, DISABLE, DIV_1, 2, 1, FASTEST, FASTEST, 1), }; #include "board-tegratab-pinmux-t11x.h" /* THIS IS FOR TESTING OR WORKAROUND PURPOSES. ANYTHING INSIDE THIS TABLE * SHOULD BE PUSHED TO PINMUX SPREADSHEET FOR AUTOGEN OR FIXED * */ static __initdata struct tegra_pingroup_config manual_config_pinmux[] = { /* ULPI SFIOs are not supposed to be supported. * This setting is only for Tegratab. */ DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT), }; static void __init tegratab_gpio_init_configure(void) { int len; int i; struct gpio_init_pin_info *pins_info; len = ARRAY_SIZE(init_gpio_mode_tegratab_common); pins_info = init_gpio_mode_tegratab_common;
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config grouper_pinmux_common[] = { /* SDMMC1 pinmux */ DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), /* SDMMC3 pinmux */ DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, PULL_UP, NORMAL, INPUT),
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config e1853_pinmux_common[] = { /* CLK-EXTCLK1 */ DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), /* SDMMC1 pinmux */ DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT), /* SDMMC2 pinmux */ DEFAULT_PINMUX(KB_ROW10, SDMMC2, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW11, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW12, SDMMC2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(KB_ROW13, SDMMC2, PULL_UP, NORMAL, INPUT),
#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \ { \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_##_lock, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \ } static __initdata struct tegra_pingroup_config endeavoru_pinmux_common[] = { // Port A DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT), // NC DEFAULT_PINMUX(UART3_CTS_N, UARTC, PULL_UP, NORMAL, INPUT), // BT_UART_CTS DEFAULT_PINMUX(DAP2_FS, I2S1, PULL_DOWN, NORMAL, INPUT), // AUD_AIC3008_I2S_LRCK DEFAULT_PINMUX(DAP2_SCLK, I2S1, PULL_DOWN, NORMAL, INPUT), // AUD_AIC3008_I2S_SCK DEFAULT_PINMUX(DAP2_DIN, I2S1, PULL_DOWN, NORMAL, INPUT), // AUD_AIC3008_I2S_DIN DEFAULT_PINMUX(DAP2_DOUT, I2S1, PULL_DOWN, NORMAL, INPUT), // AUD_AIC3008_I2S_DOUT DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), // WIFI_SDIO_CLOCK DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT), // WIFI_SDIO_COMMAND // Port B DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, NORMAL, INPUT), // MDM_IMC_UART_RX DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, NORMAL, INPUT), // MDM_IMC_UART_CTS DEFAULT_PINMUX(LCD_PWR0, RSVD, NORMAL, NORMAL, INPUT), // AUD_3V3_EN DEFAULT_PINMUX(LCD_PCLK, DISPLAYA, NORMAL, NORMAL, INPUT), // NC DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT), // WIFI_SDIO_DATA3 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT), // WIFI_SDIO_DATA2
{ \ .pingroup = TEGRA_PINGROUP_##_pingroup, \ .func = TEGRA_MUX_##_mux, \ .pupd = TEGRA_PUPD_##_pupd, \ .tristate = TEGRA_TRI_##_tri, \ .io = TEGRA_PIN_##_io, \ .lock = TEGRA_PIN_LOCK_DEFAULT, \ .od = TEGRA_PIN_OD_DEFAULT, \ .ioreset = TEGRA_PIN_IO_RESET_DEFAULT, \ } static __initdata struct tegra_pingroup_config grouper_pcbid_pinmux[] = { /* PCB_ID0 */ DEFAULT_PINMUX(KB_ROW4, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID1 */ DEFAULT_PINMUX(KB_ROW5, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID2 */ DEFAULT_PINMUX(KB_COL4, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID3 */ DEFAULT_PINMUX(KB_COL7, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID4 */ DEFAULT_PINMUX(KB_ROW2, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID5 */ DEFAULT_PINMUX(KB_COL5, KBC, NORMAL, TRISTATE, INPUT), /* PCB_ID6 */ DEFAULT_PINMUX(GMI_CS0_N, RSVD1, NORMAL, TRISTATE, INPUT), /* PCB_ID7 */ DEFAULT_PINMUX(GMI_CS1_N, RSVD1, NORMAL, TRISTATE, INPUT), /* PCB_ID8 */