/*
* ======== WCD_InitComplete2 ========
* Purpose:
* Perform any required WCD, and WMD initialization which
* cannot not be performed in WCD_Init() or DEV_StartDevice() due
* to the fact that some services are not yet
* completely initialized.
* Parameters:
* Returns:
* DSP_SOK: Allow this device to load
* DSP_EFAIL: Failure.
* Requires:
* WCD initialized.
* Ensures:
*/
DSP_STATUS WCD_InitComplete2(void)
{
DSP_STATUS status = DSP_SOK;
struct CFG_DEVNODE *DevNode;
struct DEV_OBJECT *hDevObject;
u32 devType;
DBC_Require(WCD_cRefs > 0);
GT_0trace(WCD_debugMask, GT_ENTER, "Entered WCD_InitComplete\n");
/* Walk the list of DevObjects, get each devnode, and attempting to
* autostart the board. Note that this requires COF loading, which
* requires KFILE. */
for (hDevObject = DEV_GetFirst(); hDevObject != NULL;
hDevObject = DEV_GetNext(hDevObject)) {
if (DSP_FAILED(DEV_GetDevNode(hDevObject, &DevNode)))
continue;
if (DSP_FAILED(DEV_GetDevType(hDevObject, &devType)))
continue;
if ((devType == DSP_UNIT) || (devType == IVA_UNIT)) {
if (DSP_FAILED(PROC_AutoStart(DevNode, hDevObject))) {
GT_0trace(WCD_debugMask, GT_1CLASS,
"WCD_InitComplete2 Failed\n");
status = DSP_EFAIL;
/* break; */
}
} else
GT_1trace(WCD_debugMask, GT_ENTER,
"Ignoring PROC_AutoStart "
"for Device Type = 0x%x \n", devType);
} /* End For Loop */
GT_1trace(WCD_debugMask, GT_ENTER,
"Exiting WCD_InitComplete status 0x%x\n", status);
return status;
}
/*
* ======== WMD_DEH_Create ========
* Creates DEH manager object.
*/
DSP_STATUS WMD_DEH_Create(OUT struct DEH_MGR **phDehMgr,
struct DEV_OBJECT *hDevObject)
{
DSP_STATUS status = DSP_SOK;
struct DEH_MGR *pDehMgr = NULL;
struct CFG_HOSTRES cfgHostRes;
struct CFG_DEVNODE *hDevNode;
struct WMD_DEV_CONTEXT *hWmdContext = NULL;
/* Message manager will be created when a file is loaded, since
* size of message buffer in shared memory is configurable in
* the base image. */
/* Get WMD context info. */
DEV_GetWMDContext(hDevObject, &hWmdContext);
DBC_Assert(hWmdContext);
dummyVaAddr = 0;
/* Allocate IO manager object: */
MEM_AllocObject(pDehMgr, struct DEH_MGR, SIGNATURE);
if (pDehMgr == NULL) {
status = DSP_EMEMORY;
} else {
/* Create an NTFY object to manage notifications */
status = NTFY_Create(&pDehMgr->hNtfy);
/* Create a MMUfault DPC */
tasklet_init(&pDehMgr->dpc_tasklet, MMU_FaultDpc, (u32)pDehMgr);
if (DSP_SUCCEEDED(status))
status = DEV_GetDevNode(hDevObject, &hDevNode);
if (DSP_SUCCEEDED(status))
status = CFG_GetHostResources(hDevNode, &cfgHostRes);
if (DSP_SUCCEEDED(status)) {
/* Fill in context structure */
pDehMgr->hWmdContext = hWmdContext;
pDehMgr->errInfo.dwErrMask = 0L;
pDehMgr->errInfo.dwVal1 = 0L;
pDehMgr->errInfo.dwVal2 = 0L;
pDehMgr->errInfo.dwVal3 = 0L;
/* Install ISR function for DSP MMU fault */
if ((request_irq(INT_DSP_MMU_IRQ, MMU_FaultIsr, 0,
"DspBridge\tiommu fault", (void *)pDehMgr)) == 0)
status = DSP_SOK;
else
status = DSP_EFAIL;
}
}
if (DSP_FAILED(status)) {
/* If create failed, cleanup */
WMD_DEH_Destroy((struct DEH_MGR *)pDehMgr);
*phDehMgr = NULL;
} else {
timer = omap_dm_timer_request_specific(
GPTIMER_FOR_DSP_MMU_FAULT);
if (timer)
omap_dm_timer_disable(timer);
else {
pr_err("%s:GPTimer not available\n", __func__);
return -ENODEV;
}
*phDehMgr = (struct DEH_MGR *)pDehMgr;
}
return status;
}
/*
* ======== MGR_EnumProcessorInfo ========
* Enumerate and get configuration information about available
* DSP processors.
*/
DSP_STATUS MGR_EnumProcessorInfo(u32 uProcessor,
OUT struct DSP_PROCESSORINFO *pProcessorInfo,
u32 uProcessorInfoSize, OUT u32 *puNumProcs)
{
DSP_STATUS status = DSP_SOK;
DSP_STATUS status1 = DSP_SOK;
DSP_STATUS status2 = DSP_SOK;
struct DSP_UUID uTempUuid;
u32 uTempIndex = 0;
u32 uProcIndex = 0;
struct DCD_GENERICOBJ GenObj;
struct MGR_OBJECT *pMgrObject = NULL;
struct MGR_PROCESSOREXTINFO *pExtInfo;
struct DEV_OBJECT *hDevObject;
struct DRV_OBJECT *hDrvObject;
s32 devType;
struct CFG_DEVNODE *devNode;
struct CFG_DSPRES chipResources;
bool procDetect = false;
DBC_Require(pProcessorInfo != NULL);
DBC_Require(puNumProcs != NULL);
DBC_Require(uProcessorInfoSize >= sizeof(struct DSP_PROCESSORINFO));
DBC_Require(cRefs > 0);
GT_4trace(MGR_DebugMask, GT_ENTER,
"Entered Manager_EnumProcessorInfo, "
"args:\n\tuProcessor: 0x%x\n\tpProcessorInfo: 0x%x\n\t"
"uProcessorInfoSize: 0x%x\tpuNumProcs: 0x%x\n", uProcessor,
pProcessorInfo, uProcessorInfoSize, puNumProcs);
*puNumProcs = 0;
status = CFG_GetObject((u32 *)&hDrvObject, REG_DRV_OBJECT);
if (DSP_SUCCEEDED(status)) {
status = DRV_GetDevObject(uProcessor, hDrvObject, &hDevObject);
if (DSP_SUCCEEDED(status)) {
status = DEV_GetDevType(hDevObject, (u32 *) &devType);
status = DEV_GetDevNode(hDevObject, &devNode);
if (devType == DSP_UNIT) {
status = CFG_GetDSPResources(devNode,
&chipResources);
} else {
status = DSP_EFAIL;
GT_1trace(MGR_DebugMask, GT_7CLASS,
"Unsupported dev type gotten"
"from device object %d\n", devType);
}
if (DSP_SUCCEEDED(status)) {
pProcessorInfo->uProcessorType =
chipResources.uChipType;
}
}
}
if (DSP_FAILED(status))
goto func_end;
/* Get The Manager Object from the Registry */
if (DSP_FAILED(CFG_GetObject((u32 *)&pMgrObject,
REG_MGR_OBJECT))) {
GT_0trace(MGR_DebugMask, GT_7CLASS,
"Manager_EnumProcessorInfo: "
"Failed To Get MGR Object from Registry\r\n");
goto func_end;
}
DBC_Assert(MEM_IsValidHandle(pMgrObject, SIGNATURE));
/* Forever loop till we hit no more items in the
* Enumeration. We will exit the loop other than DSP_SOK; */
while (status1 == DSP_SOK) {
status1 = DCD_EnumerateObject(uTempIndex++,
DSP_DCDPROCESSORTYPE,
&uTempUuid);
if (status1 != DSP_SOK)
break;
uProcIndex++;
/* Get the Object properties to find the Device/Processor
* Type */
if (procDetect != false)
continue;
status2 = DCD_GetObjectDef(pMgrObject->hDcdMgr,
(struct DSP_UUID *)&uTempUuid,
DSP_DCDPROCESSORTYPE,
&GenObj);
if (DSP_SUCCEEDED(status2)) {
/* Get the Obj def */
if (uProcessorInfoSize <
sizeof(struct MGR_PROCESSOREXTINFO)) {
*pProcessorInfo = GenObj.objData.procObj;
} else {
/* extended info */
pExtInfo = (struct MGR_PROCESSOREXTINFO *)
pProcessorInfo;
*pExtInfo = GenObj.objData.extProcObj;
}
GT_1trace(MGR_DebugMask, GT_7CLASS,
"Manager_EnumProcessorInfo: Got"
" Proctype from DCD %x \r\n",
pProcessorInfo->uProcessorType);
/* See if we got the needed processor */
if (devType == DSP_UNIT) {
if (pProcessorInfo->uProcessorType ==
DSPPROCTYPE_C64)
procDetect = true;
} else if (devType == IVA_UNIT) {
if (pProcessorInfo->uProcessorType ==
IVAPROCTYPE_ARM7)
procDetect = true;
}
/* User applciatiuons aonly check for chip type, so
* this clumsy overwrite */
pProcessorInfo->uProcessorType =
chipResources.uChipType;
} else {
GT_1trace(MGR_DebugMask, GT_7CLASS,
"Manager_EnumProcessorInfo: "
"Failed to Get DCD Processor Info %x \r\n",
status2);
status = DSP_EFAIL;
}
}
*puNumProcs = uProcIndex;
if (procDetect == false) {
GT_0trace(MGR_DebugMask, GT_7CLASS,
"Manager_EnumProcessorInfo: Failed"
" to get Proc info from DCD , so use CFG registry\n");
pProcessorInfo->uProcessorType = chipResources.uChipType;
}
func_end:
return status;
}
