void DMA_init() {
DMA_InitTypeDef DMA_InitStructure;
__IO
uint32_t Timeout = HSE_STARTUP_TIMEOUT;
RCC_AHB1PeriphClockCmd(DMA_Camera_STREAM_CLOCK, ENABLE);
DMA_DeInit(DMA_CameraToRAM_Stream);
while (DMA_GetCmdStatus(DMA_CameraToRAM_Stream) != DISABLE) {
}
DMA_InitStructure.DMA_Channel = DMA_Camera_Channel;
DMA_InitStructure.DMA_PeripheralBaseAddr = DCMI_DR_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) RAM_Buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = picture_x * picture_y * 2 / 4;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA_CameraToRAM_Stream, &DMA_InitStructure);
Timeout = HSE_STARTUP_TIMEOUT;
while ((DMA_GetCmdStatus(DMA_CameraToRAM_Stream) != ENABLE)
&& (Timeout-- > 0)) {
}
// Check if a timeout condition occurred
if (Timeout == 0) {
// Manage the error: to simplify the code enter an infinite loop
while (1) {
// Dopísa program
}
}
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DCMI_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DCMI_ITConfig(DCMI_IT_FRAME, ENABLE);
DCMI_ITConfig(DCMI_IT_VSYNC, ENABLE);
DCMI_ITConfig(DCMI_IT_LINE, ENABLE);
// Enable DCMI Capture mode
DCMI_Cmd(ENABLE);
DCMI_CaptureCmd(ENABLE);
// DMA Stream enable
DMA_Cmd(DMA_CameraToRAM_Stream, ENABLE);
}
//--------------------------------------------------------------
// Disable DMA and Wait DMA stream disabled
//--------------------------------------------------------------
void ADC_DMA_Disable(void)
{
DMA_Cmd(ADC1_DMA_STREAM, DISABLE);
while (DMA_GetCmdStatus(ADC1_DMA_STREAM) == ENABLE)
{ }
DMA_DeInit(ADC1_DMA_STREAM);
}
//DCMI DMA配置
//DMA_Memory0BaseAddr:存储器地址 将要存储摄像头数据的内存地址(也可以是外设地址)
//DMA_BufferSize:存储器长度 0~65535
//DMA_MemoryDataSize:存储器位宽
//DMA_MemoryDataSize:存储器位宽 @defgroup DMA_memory_data_size :DMA_MemoryDataSize_Byte/DMA_MemoryDataSize_HalfWord/DMA_MemoryDataSize_Word
//DMA_MemoryInc:存储器增长方式 @defgroup DMA_memory_incremented_mode /** @defgroup DMA_memory_incremented_mode : DMA_MemoryInc_Enable/DMA_MemoryInc_Disable
void DCMI_DMA_Init(u32 DMA_Memory0BaseAddr,u16 DMA_BufferSize,u32 DMA_MemoryDataSize,u32 DMA_MemoryInc)
{
DMA_InitTypeDef DMA_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2,ENABLE);//DMA2时钟使能
DMA_DeInit(DMA2_Stream1);
while (DMA_GetCmdStatus(DMA2_Stream1) != DISABLE){}//等待DMA2_Stream1可配置
/* 配置 DMA Stream */
DMA_InitStructure.DMA_Channel = DMA_Channel_1; //通道1 DCMI通道
DMA_InitStructure.DMA_PeripheralBaseAddr = DCMI_DR_ADDRESS;//外设地址为:DCMI->DR
DMA_InitStructure.DMA_Memory0BaseAddr = DMA_Memory0BaseAddr;//DMA 存储器0地址
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;//外设到存储器模式
DMA_InitStructure.DMA_BufferSize = DMA_BufferSize;//数据传输量
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;//外设非增量模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc;//存储器增量模式
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;//外设数据长度:32位
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize;//存储器数据长度
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;// 使用循环模式
DMA_InitStructure.DMA_Priority = DMA_Priority_High;//高优先级
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; //FIFO模式
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;//使用全FIFO
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;//外设突发单次传输
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;//存储器突发单次传输
DMA_Init(DMA2_Stream1, &DMA_InitStructure);//初始化DMA Stream
}
void HW_HAL_SPI::waitOnTransferReady(){
/* wait until transmit transfer is finished */
while (DMA_GetCmdStatus(DMA_Stream_TX ) != DISABLE) {
}
while ((SPIx->SR & SPI_SR_TXE ) == 0){
} // wait for empty TX buffer
while ((SPIx->SR & SPI_SR_BSY ) != 0){ // never check for == 1 -> it's wrong! working statements: != 0 or == SPI_SR_BSY
} // wait until transmission of last byte is complete
/* wait until receive transfer is finished */
while (DMA_GetCmdStatus(DMA_Stream_RX ) != DISABLE) {
}
while ((SPIx->SR & SPI_SR_RXNE )!= 0){ //clear rx buffer
SPIx->DR;
}
}
void USARTx_Send(DMA_Stream_TypeDef* DMAy_Streamx, uint8_t* buf, int len){
while(DMA_GetCmdStatus(DMAy_Streamx)!= DISABLE); // wait until it is disabled
DMAy_Streamx->M0AR = (uint32_t)buf;
DMAy_Streamx->NDTR = (uint16_t)len;
DMA_Cmd(DMAy_Streamx, ENABLE);
}
void Sensors_Read_async(uint8_t SensorType)
{
if (DMA_GetCmdStatus(I2C1_DMA_STREAM_RX))
{
return;
}
switch (SensorType)
{
/*ITG-3200*/
case GYRO:
I2C_ReadDeviceRegister_async(I2C_COM1, ITG3200_ADDRESS, GYRO_XOUT_H_ITG | (1 << 7), MARG_SENSORS[GYRO]->ReadLength, (uint32_t) MARG_SENSORS[GYRO]->SensorRawValue);
//I2C_ReadDeviceRegister_async(I2C_COM1,L3G3200_ADDRESS, OUT_X_L_G | (1 << 7) ,MARG_SENSORS[GYRO]->ReadLength,(uint32_t)MARG_SENSORS[GYRO]->SensorRawValue);//L3G
break;
/*BOTH BELOW ARE LSM*/
case ACC:
//I2C_ReadDeviceRegister_async(I2C_COM1,LSM303_ACC_ADDRESS, OUT_X_H_A | (1 << 7) ,MARG_SENSORS[ACC]->ReadLength,(uint32_t)MARG_SENSORS[ACC]->SensorRawValue); //LSM303
I2C_ReadDeviceRegister_async(I2C_COM1, ADXL345_ADDRESS, Register_DataX_L | (1 << 7), MARG_SENSORS[ACC]->ReadLength, (uint32_t) MARG_SENSORS[ACC]->SensorRawValue); //ADXL345
break;
case MAG:
//I2C_ReadDeviceRegister_async(I2C_COM1,LSM303_MAG_ADDRESS, OUT_X_H_M | (1 << 7) ,MARG_SENSORS[MAG]->ReadLength,(uint32_t)MARG_SENSORS[MAG]->SensorRawValue);
I2C_ReadDeviceRegister_async(I2C_COM1, HMC5883L_ADDRESS, OUT_X_H_M | (1 << 7), MARG_SENSORS[MAG]->ReadLength, (uint32_t) MARG_SENSORS[MAG]->SensorRawValue);
break;
}
}
/*Printf while waiting for it to finish, DMA based*/
int sync_printf(char * fmt, ...)
{
if (DMA_GetCmdStatus(COM_TX_DMA_STREAM[USART_COM1]))
return -1;
int n;
va_list ap;
va_start(ap, fmt);
n = vsprintf((char *) COM_TX_BUFFER[USART_COM1], fmt, ap);
va_end(ap);
COM_TX_DMA_STREAM[USART_COM1]->NDTR = (uint16_t) n;
USART_DMACmd(COM_USART[USART_COM1], USART_DMAReq_Tx, ENABLE);
/* Clear the TC bit in the SR register by writing 0 to it */
USART_ClearFlag(COM_USART[USART_COM1], USART_FLAG_TC);
/* Enable the DMA TX Stream, USART will start sending the command code (2bytes) */
DMA_Cmd(COM_TX_DMA_STREAM[USART_COM1], ENABLE);
/*wait for sigal to be reset*/
while ((USART_GetFlagStatus(COM_USART[USART_COM1], USART_FLAG_TC) == RESET))
{
}
COM1_TX_COMPLETE();
return n;
}
static void uartPauseDma()
{
if (DMA_GetCmdStatus(UART_DMA_STREAM) == ENABLE)
{
// Disable transfer complete interrupt
DMA_ITConfig(UART_DMA_STREAM, DMA_IT_TC, DISABLE);
// Disable stream to pause it
DMA_Cmd(UART_DMA_STREAM, DISABLE);
// Wait for it to be disabled
while(DMA_GetCmdStatus(UART_DMA_STREAM) != DISABLE);
// Disable transfer complete
DMA_ClearITPendingBit(UART_DMA_STREAM, UART_DMA_FLAG_TCIF);
// Read remaining data count
remainingDMACount = DMA_GetCurrDataCounter(UART_DMA_STREAM);
dmaIsPaused = true;
}
}
/******************************************
* 函数名称：SPI2 DMA配置函数
* 功能描述：
* 入口参数：
* 出口参数：
* 返 回 值：
* 全局变量：
* 调用函数：
* 描述 ：
*******************************************/
static void SPI2_DMA_Config(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/* Enable DMA clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* Disable the DMA stream */
DMA_Cmd(DMA1_Stream4,DISABLE);
/* Reset DMA Stream registers (for debug purpose) */
DMA_DeInit(DMA1_Stream4);
/* Check if the DMA Stream is disabled before enabling it.
Note that this step is useful when the same Stream is used multiple times:
enabled, then disabled then re-enabled... In this case, the DMA Stream disable
will be effective only at the end of the ongoing data transfer and it will
not be possible to re-configure it before making sure that the Enable bit
has been cleared by hardware. If the Stream is used only once, this step might
be bypassed. */
while (DMA_GetCmdStatus(DMA1_Stream4) != DISABLE)
{
}
/* Configure DMA Stream */
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(SPI2->DR));// ((uint32_t)SPI1 + 0x0C);
/*the address of memory, should modify*/
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)g_SPI1_send_buf; //need to modify
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream4, &DMA_InitStructure);
/*Clear the flags*/
DMA_ClearFlag(DMA1_Stream4,DMA_FLAG_TCIF4 | DMA_FLAG_HTIF4 | DMA_FLAG_TEIF4 | DMA_FLAG_DMEIF4 | DMA_FLAG_FEIF4);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA1_Stream4, DMA_IT_TC, ENABLE);
/* Enable the DMA Stream IRQ Channel */
/*set the NVIC number of DMA1_Stream4_IRQn*/
NVIC_InitStructure.NVIC_IRQChannel = (u8) DMA1_Stream4_IRQn; //DMA1_Stream4_IRQn = IRQn_Type
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = ((u8)SPI2_PRI >> 4) & 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = (u8)SPI2_PRI & 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void USART2_Enable_Rx(void)
{
GPIO_InitTypeDef GPIO_USART_InitStruct;
USART_InitTypeDef USART_InitStruct;
DMA_InitTypeDef DMA_InitStruct;
/* Enable Clocks */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* Set up GPIO for alternate function */
GPIO_PinAFConfig(GPIOD,GPIO_PinSource6,GPIO_AF_USART2);
/* Configure GPIO to transmit */
GPIO_USART_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_USART_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_USART_InitStruct.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_USART_InitStruct.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOD, &GPIO_USART_InitStruct);
/* Configure USART */
USART_InitStruct.USART_BaudRate = MIDI_BAUD_RATE;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_Mode = USART_Mode_Rx;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_Init(USART2, &USART_InitStruct);
/* Enable UART */
USART_Cmd(USART2, ENABLE);
DMA_StructInit(&DMA_InitStruct);
DMA_InitStruct.DMA_Channel = DMA_Channel_4;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)(&(USART2->DR));
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)midiBuffer;
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = MIDI_BUF_SIZE;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Circular;
DMA_InitStruct.DMA_Priority = DMA_Priority_Medium;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_InitStruct);
DMA_Cmd(DMA1_Stream5, ENABLE);
/* Connect UART to DMA */
USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE);
/* wait for DMA to be enabled */
while (DMA_GetCmdStatus(DMA1_Stream5) != ENABLE);
}
uint8_t * OV7670_capture_image()
{
DCMI_InitTypeDef DCMI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/* DMA2 Stream1 Configuration */
DMA_DeInit(DMA2_Stream1);
DMA_InitStructure.DMA_Channel = DMA_Channel_1;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&DCMI->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) image_buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = (IMG_SIZE/sizeof(uint32_t));
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream1, ENABLE);
DCMI_Cmd(ENABLE);
DCMI_CaptureCmd(ENABLE);
int temp;
// Wait until DCMI DMA Rx transfer is complete
while (DMA_GetFlagStatus(DMA2_Stream1, DMA_FLAG_TCIF1) == RESET)
{
temp = DMA_GetCurrDataCounter(DMA2_Stream1);
temp = DCMI->CR;
temp = DCMI->RISR;
}
/* Clear all DMA Streams flags */
DMA_ClearFlag(DMA2_Stream1, DMA_FLAG_HTIF1 | DMA_FLAG_TCIF1);
/* Disable the DMA Rx Stream */
DMA_Cmd(DMA2_Stream1, DISABLE);
//Do not disable DCMI peripheral untill DMA disable command gets through
while(DMA_GetCmdStatus(DMA2_Stream1) == ENABLE)
{}
DCMI_Cmd(DISABLE);
return (uint8_t*) image_buffer;
}
void SPI_f207SendMessage(void *pbuffer, uint32_t len)
{
DMA_DeInit(DMA_STREAM);
while(DMA_GetCmdStatus(DMA_STREAM) != DISABLE);
DMA_TxInitStructure.DMA_Memory0BaseAddr = (uint32_t)pbuffer;
DMA_TxInitStructure.DMA_BufferSize = len;
DMA_Init(DMA_STREAM,&DMA_TxInitStructure);
DMA_Cmd(DMA_STREAM, ENABLE);
}
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
files (startup_stm32f40xx.s/startup_stm32f427x.s) before to branch to
application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f4xx.c file
*/
/* Configure LEDs to monitor program status */
STM_EVAL_LEDInit(LED1);
STM_EVAL_LEDInit(LED2);
STM_EVAL_LEDInit(LED3);
STM_EVAL_LEDInit(LED4);
STM_EVAL_LEDOn(LED1); /* Turn LED1 on: start of configuration */
/* Configure and enable the DMA Stream for Memory to Memory transfer */
DMA_Config();
STM_EVAL_LEDOn(LED2); /* Turn LED2 on: start of Transfer */
/* Wait the end of transmission (the DMA Stream is disabled by Hardware at the
end of the transfer) .
There is also another way to check on end of transfer by monitoring the
number of remaining data to be transferred. */
/* while (DMA_GetCurrentMemoryTarget(DMA_STREAM) != 0) */ /* First method */
while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE) /* Second method */
{
/*
Since this code present a simple example of how to use DMA, it is just
waiting on the end of transfer.
But, while DMA Stream is transferring data, the CPU is free to perform
other tasks in parallel to the DMA transfer.
*/
}
/* Check if the transmitted and received data are equal */
TransferStatus = Buffercmp(aSRC_Const_Buffer, aDST_Buffer, BUFFER_SIZE);
/* TransferStatus = PASSED, if the transmitted and received data
are the same */
/* TransferStatus = FAILED, if the transmitted and received data
are different */
if (TransferStatus != FAILED)
{
/* Turn LED4 on: Transfer correct */
STM_EVAL_LEDOn(LED4);
}
while (1)
{
}
}
void SPIx_DeInit(SPI_Driver* SPIx)
{
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = SPIx->SCK_Pin | SPIx->MISO_Pin | SPIx->MOSI_Pin;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(SPIx->Gpio, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = SPIx->CS_Pin;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_Init(SPIx->Gpio, &GPIO_InitStructure);
#ifdef SPIx_USE_DMA
// Deinitialize DMA Streams
DMA_DeInit(SPIx->DMA_TX_Stream);
while (DMA_GetCmdStatus(SPIx->DMA_TX_Stream) != DISABLE);
DMA_Cmd(SPIx->DMA_TX_Stream, DISABLE);
DMA_DeInit(SPIx->DMA_RX_Stream);
while (DMA_GetCmdStatus(SPIx->DMA_RX_Stream) != DISABLE);
DMA_Cmd(SPIx->DMA_RX_Stream, DISABLE);
#endif
}
/**
* @brief Starts playing audio stream from the audio Media.
* @param Addr: Pointer to the audio stream buffer
* @param Size: Number of data in the audio stream buffer
* @retval None.
*/
void Audio_MAL_Play(uint32_t Addr, uint32_t Size)
{
#ifndef AUDIO_USE_MACROS
/* Enable the I2S DMA Stream*/
DMA_Cmd(AUDIO_MAL_DMA_STREAM, DISABLE);
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC);
/* Wait the DMA Stream to be effectively disabled */
while (DMA_GetCmdStatus(AUDIO_MAL_DMA_STREAM) != DISABLE)
{}
/* Configure the buffer address and size */
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)Addr;
DMA_InitStructure.DMA_BufferSize = (uint32_t)(Size*2);
/* Configure the DMA Stream with the new parameters */
DMA_Init(AUDIO_MAL_DMA_STREAM, &DMA_InitStructure);
/* Enable the I2S DMA Stream*/
DMA_Cmd(AUDIO_MAL_DMA_STREAM, ENABLE);
/* If the I2S peripheral is still not enabled, enable it */
if ((CODEC_I2S->I2SCFGR & I2S_ENABLE_MASK) == 0)
{
I2S_Cmd(CODEC_I2S, ENABLE);
}
#else
/* Disable the I2S DMA Stream*/
AUDIO_MAL_DMA_STREAM->CR &= ~(uint32_t)DMA_SxCR_EN;
/* Clear the Interrupt flag */
AUDIO_MAL_DMA->AUDIO_MAL_DMA_IFCR = (uint32_t)(AUDIO_MAL_DMA_FLAG_TC & 0x0F7D0F7D);
/* Wait the DMA Stream to be effectively disabled */
while ((AUDIO_MAL_DMA_STREAM->CR & (uint32_t)DMA_SxCR_EN) != 0)
{}
/* Configure the buffer address and size */
AUDIO_MAL_DMA_STREAM->M0AR = (uint32_t)Addr;
AUDIO_MAL_DMA_STREAM->NDTR = (uint32_t)(Size*2);
/* Enable the I2S DMA Stream*/
AUDIO_MAL_DMA_STREAM->CR |= (uint32_t)DMA_SxCR_EN;
/* If the I2S peripheral is still not enabled, enable it */
CODEC_I2S->I2SCFGR |= SPI_I2SCFGR_I2SE;
#endif /* AUDIO_USE_MACROS */
}
/*
* USART Printf's
*/
char * async_scanf(unsigned int length)
{
if (DMA_GetCmdStatus(COM_RX_DMA_STREAM[USART_COM1]))
return (char *) COM_RX_BUFFER[USART_COM1];
/*Config the recieve buffer*/
COM_RX_DMA_STREAM[USART_COM1]->NDTR = (uint16_t) length;
((char *) COM_RX_BUFFER[USART_COM1])[length] = 0;
DMA_ITConfig(COM_RX_DMA_STREAM[USART_COM1], DMA_IT_TC, ENABLE);
DMA_Cmd(COM_RX_DMA_STREAM[USART_COM1], ENABLE);
USART_DMACmd(COM_USART[USART_COM1], USART_DMAReq_Rx, ENABLE);
return (char *) COM_RX_BUFFER[USART_COM1];
}
/*scan for a charactor, input lenght of string, will wait until char has been recieved*/
char * sync_scanf(unsigned int length)
{
if (DMA_GetCmdStatus(COM_RX_DMA_STREAM[USART_COM1]))
return (char *) COM_RX_BUFFER[USART_COM1];
/*Config the recieve buffer*/
COM_RX_DMA_STREAM[USART_COM1]->NDTR = (uint16_t) length;
((char *) COM_RX_BUFFER[USART_COM1])[length] = 0;
DMA_Cmd(COM_RX_DMA_STREAM[USART_COM1], ENABLE);
USART_DMACmd(COM_USART[USART_COM1], USART_DMAReq_Rx, ENABLE);
while (DMA_GetFlagStatus(COM_RX_DMA_STREAM[USART_COM1], COM_RX_DMA_FLAG_TCIF[USART_COM1]) == RESET)
{
}
COM1_RX_COMPLETE();
return (char *) COM_RX_BUFFER[USART_COM1];
}
/**
* @brief Stops audio stream playing on the used Media.
* @param None.
* @retval None.
*/
void Audio_MAL_Stop(void)
{
/* Stop the Transfer on the I2S side: Stop and disable the DMA stream */
DMA_Cmd(AUDIO_MAL_DMA_STREAM, DISABLE);
/* Clear all the DMA flags for the next transfer */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC |AUDIO_MAL_DMA_FLAG_HT | \
AUDIO_MAL_DMA_FLAG_FE | AUDIO_MAL_DMA_FLAG_TE);
/* Wait the DMA Stream to be effectively disabled */
while (DMA_GetCmdStatus(AUDIO_MAL_DMA_STREAM) != DISABLE)
{}
/* Stop the current DMA request by resetting the I2S cell */
Codec_AudioInterface_DeInit();
/* Re-configure the I2S interface for the next paly operation */
Codec_AudioInterface_Init(I2S_InitStructure.I2S_AudioFreq);
}
//I2S2 TX DMA配置
//设置为双缓冲模式,并开启DMA传输完成中断
//buf0:M0AR地址.
//buf1:M1AR地址.
//num:每次传输数据量
void I2S2_TX_DMA_Init(u8* buf0,u8 *buf1,u16 num)
{
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1,ENABLE);//DMA1时钟使能
DMA_DeInit(DMA1_Stream4);
while (DMA_GetCmdStatus(DMA1_Stream4) != DISABLE){}//等待DMA1_Stream1可配置
/* 配置 DMA Stream */
DMA_InitStructure.DMA_Channel = DMA_Channel_0; //通道0 SPI2_TX通道
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&SPI2->DR;//外设地址为:(u32)&SPI2->DR
DMA_InitStructure.DMA_Memory0BaseAddr = (u32)buf0;//DMA 存储器0地址
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;//存储器到外设模式
DMA_InitStructure.DMA_BufferSize = num;//数据传输量
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;//外设非增量模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;//存储器增量模式
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;//外设数据长度:16位
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;//存储器数据长度：16位
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;// 使用循环模式
DMA_InitStructure.DMA_Priority = DMA_Priority_High;//高优先级
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //不使用FIFO模式
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;//外设突发单次传输
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;//存储器突发单次传输
DMA_Init(DMA1_Stream4, &DMA_InitStructure);//初始化DMA Stream
DMA_DoubleBufferModeConfig(DMA1_Stream4,(u32)buf1,DMA_Memory_0);//双缓冲模式配置
DMA_DoubleBufferModeCmd(DMA1_Stream4,ENABLE);//双缓冲模式开启
DMA_ITConfig(DMA1_Stream4,DMA_IT_TC,ENABLE);//开启传输完成中断
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x00;//抢占优先级0
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;//子优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;//使能外部中断通道
NVIC_Init(&NVIC_InitStructure);//配置
}
void USART2Class::Tx()
{
portTickType xLastWakeTime = xTaskGetTickCount();
vTaskDelayUntil(&xLastWakeTime,MS_INITIAL_DELAY);
while(1){
int numTx;
if(DMA_GetCmdStatus(DMA1_Stream6)==DISABLE && (numTx = uxQueueMessagesWaiting(m_queue)) != 0){
for(int i=0;i<numTx;i++){
char c;
xQueueReceive(m_queue,&c,0);
m_txBuf[i] = c;
}
DMA_SetCurrDataCounter(DMA1_Stream6,numTx);
USART_ClearFlag(USART2,USART_SR_TC);
DMA_ClearFlag(DMA1_Stream6,DMA_FLAG_TCIF6);
DMA_Cmd(DMA1_Stream6,ENABLE);
}
vTaskDelayUntil(&xLastWakeTime,1);
}
}
/******************************************
* 函数名称：SPI2 DMA关闭
* 功能描述：
* 入口参数：
* 出口参数：
* 返 回 值：
* 全局变量：
* 调用函数：
* 描述 ：
*******************************************/
u8 SPI2_DMA_disable(void)
{
u16 time_out;
time_out = 10000;
DMA_Cmd(DMA1_Stream4,DISABLE);
SPI_DMACmd(SPI2,SPI_I2S_DMAReq_Tx,DISABLE);
/*wait until DMA disable*/
while ((DMA_GetCmdStatus(DMA1_Stream4) != DISABLE) && time_out > 0)
{
time_out --;
}
/*if the DMA can not disable, return false*/
if(time_out == 0)
{
return FALSE;
}
else
{
return TRUE;
}
}
void uartSendDataDmaBlocking(uint32_t size, uint8_t* data)
{
if (isUartDmaInitialized)
{
xSemaphoreTake(waitUntilSendDone, portMAX_DELAY);
// Wait for DMA to be free
while(DMA_GetCmdStatus(UART_DMA_STREAM) != DISABLE);
//Copy data in DMA buffer
memcpy(dmaBuffer, data, size);
DMA_InitStructureShare.DMA_BufferSize = size;
initialDMACount = size;
// Init new DMA stream
DMA_Init(UART_DMA_STREAM, &DMA_InitStructureShare);
// Enable the Transfer Complete interrupt
DMA_ITConfig(UART_DMA_STREAM, DMA_IT_TC, ENABLE);
/* Enable USART DMA TX Requests */
USART_DMACmd(UART_TYPE, USART_DMAReq_Tx, ENABLE);
/* Clear transfer complete */
USART_ClearFlag(UART_TYPE, USART_FLAG_TC);
/* Enable DMA USART TX Stream */
DMA_Cmd(UART_DMA_STREAM, ENABLE);
}
}
/******************************************
*函数名称：spi2_send
*函数功能：通道2 FM0数据通过SPI2发送
*入口参数：len->数据长度
*出口参数：无
*返 回 值：数据放入DMA返回TRUE，DMA忙返回FLASE
*全局变量：无
*调用函数：无
******************************************/
u8 spi2_send(u16 len)
{
/*if the DMA is running, return false*/
if((DMA_GetCmdStatus(DMA1_Stream4) == ENABLE))
{
return FALSE;
}
/*disable the dma to set new data length*/
/*if disable failed, return false*/
if(FALSE == SPI2_DMA_disable())
{
return FALSE;
}
/*set new data length*/
DMA_SetCurrDataCounter(DMA1_Stream4,len);
/*enable dma, if failed, return false*/
if(FALSE == SPI2_DMA_Eable())
{
return FALSE;
}
/*return true*/
return TRUE;
}
/******************************************
* 函数名称：SPI2 DMA使能
* 功能描述：
* 入口参数：
* 出口参数：
* 返 回 值：
* 全局变量：
* 调用函数：
* 描述 ：
*******************************************/
static u8 SPI2_DMA_Eable(void)
{
u16 time_out;
time_out = 10000;
/*Enable and configure the peripheral to be connected to the DMA*/
SPI_DMACmd(SPI2,SPI_I2S_DMAReq_Tx,ENABLE);
/*Enable DMA2 stream3*/
DMA_Cmd(DMA1_Stream4, ENABLE);
/*wait until DMA enable*/
while ((DMA_GetCmdStatus(DMA1_Stream4) != ENABLE) && time_out > 0)
{
time_out --;
}
/*if the DMA can not enable, return false*/
if(time_out == 0)
{
return FALSE;
}
else
{
return TRUE;
}
}
/*Async printf, DMA interrupt based*/
int async_printf(char * fmt, ...)
{
if (DMA_GetCmdStatus(COM_TX_DMA_STREAM[USART_COM1]))
return -1;
int n;
va_list ap;
va_start(ap, fmt);
n = vsprintf((char *) COM_TX_BUFFER[USART_COM1], fmt, ap);
va_end(ap);
COM_TX_DMA_STREAM[USART_COM1]->NDTR = (uint16_t) n;
DMA_ITConfig(COM_TX_DMA_STREAM[USART_COM1], DMA_IT_TC, ENABLE);
USART_DMACmd(COM_USART[USART_COM1], USART_DMAReq_Tx, ENABLE);
/* Clear the TC bit in the SR register by writing 0 to it */
USART_ClearFlag(COM_USART[USART_COM1], USART_FLAG_TC);
/* Enable the DMA TX Stream, USART will start sending the command code (2bytes) */
DMA_Cmd(COM_TX_DMA_STREAM[USART_COM1], ENABLE);
return n;
}
void SPI_TxDma_Config(void)
{
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
DMA_DeInit(DMA_STREAM);
while(DMA_GetCmdStatus(DMA_STREAM) != DISABLE);
DMA_TxInitStructure.DMA_Channel = DMA_Channel_0;
DMA_TxInitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(SPI3->DR);
DMA_TxInitStructure.DMA_Memory0BaseAddr = 0;
DMA_TxInitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_TxInitStructure.DMA_BufferSize = 0;
DMA_TxInitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_TxInitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_TxInitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_TxInitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_TxInitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_TxInitStructure.DMA_Priority = DMA_Priority_High;
DMA_TxInitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_TxInitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_TxInitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_TxInitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA_STREAM,&DMA_TxInitStructure);
}
static void enable_usart1(void)
{
/* RCC Initialization */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
//RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART3 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(USART1, &USART_InitStruct);
USART_Cmd(USART1, ENABLE);
}
static void enable_usart2(void)
{
/* RCC Initialization */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_USART2);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource6, GPIO_AF_USART2);
GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USART2 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 9600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(USART2, &USART_InitStruct);
USART_Cmd(USART2, ENABLE);
/* DMA Initialization */
DMA_DeInit(DMA1_Stream6);
while (DMA_GetCmdStatus(DMA1_Stream6) != DISABLE);
}
static void enable_usart3(void)
{
/* RCC Initialization */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_USART3);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_USART3);
GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USART3 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(USART3, &USART_InitStruct);
USART_Cmd(USART3, ENABLE);
USART_ClearFlag(USART3, USART_FLAG_TC);
USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
/* NVIC Initialization */
NVIC_InitTypeDef NVIC_InitStruct = {
.NVIC_IRQChannel = USART3_IRQn,
.NVIC_IRQChannelPreemptionPriority = configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE
};
NVIC_Init(&NVIC_InitStruct);
}
static void enable_usart4(void)
{
/* RCC Initialization */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_UART4);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_UART4);
GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USART4 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(UART4, &USART_InitStruct);
USART_Cmd(UART4, ENABLE);
}
static void enable_usart5(void)
{
/* RCC Initialization */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_2,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_12;
GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_UART5);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_UART5);
/* USART5 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(UART5, &USART_InitStruct);
USART_Cmd(UART5, ENABLE);
}
static void enable_usart8(void)
{
/* RCC Initialization */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8, ENABLE);
/* GPIO Initialization */
GPIO_InitTypeDef GPIO_InitStruct = {
.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_50MHz
};
GPIO_PinAFConfig(GPIOE, GPIO_PinSource0, GPIO_AF_UART8);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource1, GPIO_AF_UART8);
GPIO_Init(GPIOE, &GPIO_InitStruct);
/* USART8 Initialization */
USART_InitTypeDef USART_InitStruct = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
.USART_StopBits = USART_StopBits_1,
.USART_Parity = USART_Parity_No,
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
};
USART_Init(UART8, &USART_InitStruct);
USART_Cmd(UART8, ENABLE);
/* DMA Initialization */
DMA_DeInit(DMA1_Stream6);
while (DMA_GetCmdStatus(DMA1_Stream6) != DISABLE);
}
void usart_init()
{
enable_usart1();
enable_usart2();
enable_usart3();
enable_usart4();
enable_usart5();
enable_usart8();
}
void usart2_dma_init()
{
uint8_t dummy = 0;
DMA_InitTypeDef DMA_InitStructure = {
/* Configure DMA Initialization Structure */
.DMA_BufferSize = (uint32_t)1,
.DMA_FIFOMode = DMA_FIFOMode_Disable,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_Mode = DMA_Mode_Normal,
.DMA_PeripheralBaseAddr = (uint32_t)(&(USART2->DR)),
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_Priority = DMA_Priority_Medium,
/* Configure TX DMA */
.DMA_Channel = DMA_Channel_4,
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_Memory0BaseAddr = (uint32_t)&dummy
};
DMA_Init(DMA1_Stream6, &DMA_InitStructure);
DMA_Cmd(DMA1_Stream6, ENABLE);
USART_DMACmd(USART2, USART_DMAReq_Tx, ENABLE);
}
void usart2_dma_send(uint8_t *s)
{
while (DMA_GetFlagStatus(DMA1_Stream6, DMA_FLAG_TCIF6) == RESET);
DMA_ClearFlag(DMA1_Stream6, DMA_FLAG_TCIF6);
DMA_InitTypeDef DMA_InitStructure = {
/* Configure DMA Initialization Structure */
.DMA_BufferSize = (uint32_t)strlen((const char *) s),
.DMA_FIFOMode = DMA_FIFOMode_Disable,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_Mode = DMA_Mode_Normal,
.DMA_PeripheralBaseAddr = (uint32_t)(&(USART2->DR)),
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_Priority = DMA_Priority_Medium,
/* Configure TX DMA */
.DMA_Channel = DMA_Channel_4,
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_Memory0BaseAddr = (uint32_t)s
};
DMA_Init(DMA1_Stream6, &DMA_InitStructure);
DMA_Cmd(DMA1_Stream6, ENABLE);
USART_DMACmd(USART2, USART_DMAReq_Tx, ENABLE);
}
int _write(int fd, char *ptr, int len)
{
/* Write "len" of char from "ptr" to file id "fd"
* Return number of char written.
* Need implementing with UART here. */
int i = 0;
fd=fd;
for (i = 0; i < len ; i++) {
USART_SendData(PRINTF_USART, (uint8_t) *ptr);
/* Loop until USART2 DR register is empty */
while (USART_GetFlagStatus(PRINTF_USART, USART_FLAG_TXE) == RESET);
ptr++;
}
return len;
}
xSemaphoreHandle serial_tx_wait_sem = NULL;
xQueueHandle serial_rx_queue = NULL;
xQueueHandle gps_serial_queue = NULL;
void USART3_IRQHandler(void)
{
long lHigherPriorityTaskWoken = pdFALSE;
serial_msg rx_msg;
if (USART_GetITStatus(USART3, USART_IT_TXE) != RESET) {
xSemaphoreGiveFromISR(serial_tx_wait_sem, &lHigherPriorityTaskWoken);
USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
}
if (USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) {
rx_msg.ch = USART_ReceiveData(USART3);
if (!xQueueSendToBackFromISR(serial_rx_queue, &rx_msg, &lHigherPriorityTaskWoken))
portEND_SWITCHING_ISR(lHigherPriorityTaskWoken);
}
portEND_SWITCHING_ISR(lHigherPriorityTaskWoken);
}
char usart3_read(void)
{
serial_msg msg;
while (!xQueueReceive(serial_rx_queue, &msg, portMAX_DELAY));
return msg.ch;
}
void usart3_send(char str)
{
while (!xSemaphoreTake(serial_tx_wait_sem, portMAX_DELAY));
USART_SendData(USART3, (uint16_t)str);
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
}
void uart8_puts(uint8_t *ptr)
{
while(*ptr!='\0'){
USART_SendData(PRINTF_USART, (uint8_t) *ptr);
/* Loop until USART8 DR register is empty */
while (USART_GetFlagStatus(PRINTF_USART, USART_FLAG_TXE) == RESET);
ptr++;
}
}
/**
* @brief This function handles main Media layer interrupt.
* @param None.
* @retval o if correct communication, else wrong communication
*/
void Audio_MAL_IRQHandler(void)
{
#ifndef AUDIO_MAL_MODE_NORMAL
uint16_t *pAddr = (uint16_t *)CurrentPos;
uint32_t Size = AudioRemSize;
#endif /* AUDIO_MAL_MODE_NORMAL */
#ifdef AUDIO_MAL_DMA_IT_TC_EN
/* Transfer complete interrupt */
if (DMA_GetFlagStatus(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC) != RESET)
{
#ifdef AUDIO_MAL_MODE_NORMAL
/* Check if the end of file has been reached */
if (AudioRemSize > 0)
{
/* Wait the DMA Stream to be effectively disabled */
while (DMA_GetCmdStatus(AUDIO_MAL_DMA_STREAM) != DISABLE)
{}
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC);
/* Re-Configure the buffer address and size */
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) CurrentPos;
DMA_InitStructure.DMA_BufferSize = (uint32_t) (DMA_MAX(AudioRemSize));
/* Configure the DMA Stream with the new parameters */
DMA_Init(AUDIO_MAL_DMA_STREAM, &DMA_InitStructure);
/* Enable the I2S DMA Stream*/
DMA_Cmd(AUDIO_MAL_DMA_STREAM, ENABLE);
/* Update the current pointer position */
CurrentPos += DMA_MAX(AudioRemSize);
/* Update the remaining number of data to be played */
AudioRemSize -= DMA_MAX(AudioRemSize);
}
else
{
/* Disable the I2S DMA Stream*/
DMA_Cmd(AUDIO_MAL_DMA_STREAM, DISABLE);
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC);
/* Manage the remaining file size and new address offset: This function
should be coded by user (its prototype is already declared in stm32_eval_audio_codec.h) */
EVAL_AUDIO_TransferComplete_CallBack((uint32_t)CurrentPos, 0);
}
#elif defined(AUDIO_MAL_MODE_CIRCULAR)
/* Manage the remaining file size and new address offset: This function
should be coded by user (its prototype is already declared in stm32_eval_audio_codec.h) */
EVAL_AUDIO_TransferComplete_CallBack(pAddr, Size);
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TC);
#endif /* AUDIO_MAL_MODE_NORMAL */
}
#endif /* AUDIO_MAL_DMA_IT_TC_EN */
#ifdef AUDIO_MAL_DMA_IT_HT_EN
/* Half Transfer complete interrupt */
if (DMA_GetFlagStatus(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_HT) != RESET)
{
/* Manage the remaining file size and new address offset: This function
should be coded by user (its prototype is already declared in stm32_eval_audio_codec.h) */
EVAL_AUDIO_HalfTransfer_CallBack((uint32_t)pAddr, Size);
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_HT);
}
#endif /* AUDIO_MAL_DMA_IT_HT_EN */
#ifdef AUDIO_MAL_DMA_IT_TE_EN
/* FIFO Error interrupt */
if ((DMA_GetFlagStatus(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TE) != RESET) || \
(DMA_GetFlagStatus(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_FE) != RESET) || \
(DMA_GetFlagStatus(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_DME) != RESET))
{
/* Manage the error generated on DMA FIFO: This function
should be coded by user (its prototype is already declared in stm32_eval_audio_codec.h) */
EVAL_AUDIO_Error_CallBack((uint32_t*)&pAddr);
/* Clear the Interrupt flag */
DMA_ClearFlag(AUDIO_MAL_DMA_STREAM, AUDIO_MAL_DMA_FLAG_TE | AUDIO_MAL_DMA_FLAG_FE | \
AUDIO_MAL_DMA_FLAG_DME);
}
#endif /* AUDIO_MAL_DMA_IT_TE_EN */
}
//--------------------------------------------------------------
// Enable DMA and Wait DMA stream enabled
//--------------------------------------------------------------
void ADC_DMA_Enable(void)
{
DMA_Cmd(ADC1_DMA_STREAM, ENABLE);
while (DMA_GetCmdStatus(ADC1_DMA_STREAM) == DISABLE)
{ }
}
int main() {
SysTick_Config(SystemCoreClock / 1000);
InitLeds();
GPIO_SetBits(GPIOD, GREEN_LED);
Delay(100);
GPIO_ResetBits(GPIOD, GREEN_LED);
GPIO_SetBits(GPIOD, ORANGE_LED);
Delay(100);
GPIO_ResetBits(GPIOD, ORANGE_LED);
GPIO_SetBits(GPIOD, RED_LED);
Delay(100);
GPIO_ResetBits(GPIOD, RED_LED);
GPIO_SetBits(GPIOD, BLUE_LED);
Delay(100);
GPIO_ResetBits(GPIOD, BLUE_LED);
/**
* USART
*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_PinAFConfig(USART2_TX_PORT, USART2_TX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_PinAFConfig(USART2_RX_PORT, USART2_RX_PIN_SOURCE, GPIO_AF_USART2);
/* Configure USART Tx as alternate function */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Pin = USART2_TX_PIN;
GPIO_Init(USART2_TX_PORT, &GPIO_InitStructure);
/* Configure USART Rx as alternate function */
GPIO_InitStructure.GPIO_Pin = USART2_RX_PIN;
GPIO_Init(USART2_RX_PORT, &GPIO_InitStructure);
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART2, &USART_InitStructure);
/* Enable USART */
USART_Cmd(USART2, ENABLE);
Serial_print(USART2, "Hello World! -- Compiled on: ");
Serial_print(USART2, __DATE__);
Serial_print(USART2, " - ");
Serial_println(USART2, __TIME__);
/**
* Interrupts
*/
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DCMI_IRQn;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_Init(&NVIC_InitStructure);
DCMI_ClearITPendingBit(DCMI_IT_FRAME | DCMI_IT_OVF | DCMI_IT_ERR);
DCMI_ITConfig(DCMI_IT_FRAME | DCMI_IT_OVF | DCMI_IT_ERR, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_Init(&NVIC_InitStructure);
DMA_ClearITPendingBit(DMA2_Stream1, DMA_IT_TCIF1 | DMA_IT_TEIF1);
DMA_ITConfig(DMA2_Stream1, DMA_IT_TC | DMA_IT_FE | DMA_IT_TE | DMA_IT_DME, ENABLE);
Serial_print(USART2, "Interrupts done. \r\n");
/** Camera Reset Pin & Power Down Pin */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Low_Speed;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_9;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_SetBits(GPIOA, GPIO_Pin_10);
GPIO_ResetBits(GPIOA, GPIO_Pin_9);
/**
* DCMI
*/
OV2640_HW_Init();
Serial_print(USART2, "HW_Init done. \r\n");
/* Print camera Id */
OV2640_IDTypeDef camera_id;
OV2640_ReadID(&camera_id);
Serial_print(USART2, "Camera ID: ");
Serial_print(USART2, camera_id.Manufacturer_ID1, 16);
Serial_print(USART2, " - ");
Serial_print(USART2, camera_id.Manufacturer_ID2, 16);
Serial_print(USART2, " - ");
Serial_print(USART2, camera_id.PIDH, 16);
Serial_print(USART2, " - ");
Serial_print(USART2, camera_id.PIDL, 16);
Serial_println(USART2, "");
OV2640_QQVGAConfig();
Serial_print(USART2, "QQVGAConfig done. \r\n");
// OV2640_BandWConfig(0x18); // BW
OV2640_Init(BMP_QQVGA);
Serial_print(USART2, "Init done. \r\n");
// Memset
int i;
for (i=0; i<160*120; i++) {
Targetbuffer[i] = 0xbeef;
}
DMA_Cmd(DMA2_Stream1, ENABLE);
while ( DMA_GetCmdStatus(DMA2_Stream1) != ENABLE )
;
Serial_print(USART2, "DMA Enable done. \r\n");
DCMI_Cmd(ENABLE);
Serial_print(USART2, "DCMI Enable done. \r\n");
DCMI_CaptureCmd(ENABLE);
Serial_print(USART2, "DCMI Capture start. \r\n");
Serial_print(USART2, "Print: \r\n.\r\n.\r\n");
Serial_print(USART2, "done. \r\n");
Delay(1);
// Clear screen
Serial_print(USART2, 0x1b);
Serial_print(USART2, "[2J");
while (1) {
while (DCMI_GetFlagStatus(DCMI_FLAG_FRAMERI) == RESET)
;
print_CameraData();
// Move cursor to home position.
Serial_print(USART2, 0x1b);
Serial_print(USART2, "[H");
}
}
