C++ (Cpp) DMA_STM32_SCR_DIR Examples

Example #1

File: dma_stm32f4x.c Project: nordic-krch/zephyr

static int dma_stm32_config_devcpy(struct device *dev, u32_t id,
				   struct dma_config *config)

{
	struct dma_stm32_device *ddata = dev->driver_data;
	struct dma_stm32_stream_reg *regs = &ddata->stream[id].regs;
	u32_t src_bus_width  = dma_width_index(config->source_data_size);
	u32_t dst_bus_width  = dma_width_index(config->dest_data_size);
	u32_t src_burst_size = dma_burst_index(config->source_burst_length);
	u32_t dst_burst_size = dma_burst_index(config->dest_burst_length);
	enum dma_channel_direction direction = config->channel_direction;

	switch (direction) {
	case MEMORY_TO_PERIPHERAL:
		regs->scr = DMA_STM32_SCR_DIR(DMA_STM32_MEM_TO_DEV) |
			DMA_STM32_SCR_PSIZE(dst_bus_width) |
			DMA_STM32_SCR_MSIZE(src_bus_width) |
			DMA_STM32_SCR_PBURST(dst_burst_size) |
			DMA_STM32_SCR_MBURST(src_burst_size) |
			DMA_STM32_SCR_REQ(config->dma_slot) |
			DMA_STM32_SCR_TCIE | DMA_STM32_SCR_TEIE |
			DMA_STM32_SCR_MINC;
		break;
	case PERIPHERAL_TO_MEMORY:
		regs->scr = DMA_STM32_SCR_DIR(DMA_STM32_DEV_TO_MEM) |
			DMA_STM32_SCR_PSIZE(src_bus_width) |
			DMA_STM32_SCR_MSIZE(dst_bus_width) |
			DMA_STM32_SCR_PBURST(src_burst_size) |
			DMA_STM32_SCR_MBURST(dst_burst_size) |
			DMA_STM32_SCR_REQ(config->dma_slot) |
			DMA_STM32_SCR_TCIE | DMA_STM32_SCR_TEIE |
			DMA_STM32_SCR_MINC;
		break;
	default:
		LOG_ERR("DMA error: Direction not supported: %d",
			    direction);
		return -EINVAL;
	}

	if (src_burst_size == BURST_TRANS_LENGTH_1 &&
	    dst_burst_size == BURST_TRANS_LENGTH_1) {
		/* Enable 'direct' mode error IRQ, disable 'FIFO' error IRQ */
		regs->scr |= DMA_STM32_SCR_DMEIE;
		regs->sfcr &= ~DMA_STM32_SFCR_MASK;
	} else {
		/* Enable 'FIFO' error IRQ, disable 'direct' mode error IRQ */
		regs->sfcr |= DMA_STM32_SFCR_MASK;
		regs->scr &= ~DMA_STM32_SCR_DMEIE;
	}

	return 0;
}

Example #2

File: dma_stm32f4x.c Project: agatti/zephyr

static int dma_stm32_config_memcpy(struct device *dev, u32_t id)
{
	struct dma_stm32_device *ddata = dev->driver_data;
	struct dma_stm32_stream_reg *regs = &ddata->stream[id].regs;

	regs->scr = DMA_STM32_SCR_DIR(DMA_STM32_MEM_TO_MEM) |
		DMA_STM32_SCR_MINC |		/* Memory increment mode */
		DMA_STM32_SCR_PINC |		/* Peripheral increment mode */
		DMA_STM32_SCR_TCIE |		/* Transfer comp IRQ enable */
		DMA_STM32_SCR_TEIE;		/* Transfer error IRQ enable */

	regs->sfcr = DMA_STM32_SFCR_DMDIS |	/* Direct mode disable */
		DMA_STM32_SFCR_FTH(DMA_STM32_FIFO_THRESHOLD_FULL) |
		DMA_STM32_SFCR_FEIE;		/* FIFI error IRQ enable */

	return 0;
}