static void config_DMA( void )
{
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_DeInit(DMA2_Stream0);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC_CDR_Address;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADCConvertedValue;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = 2;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
//DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream0, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC | DMA_IT_TE, ENABLE);
}
void wsDMA_Init(void * pSrc,void *pDest, uint32_t DataLen)
{
/* Enable WS_DMA_CHANNEL clock */
WS_DMA_RCC_CMD(WS_DMA_RCC_PERIPH, ENABLE);
DMA_DeInit(WS_DMA_CHANNEL);
DMA_StructInit(&_wsDMA_PayLoadInit);
_wsDMA_PayLoadInit.DMA_PeripheralBaseAddr = (uint32_t)pDest;
_wsDMA_PayLoadInit.DMA_MemoryBaseAddr = (uint32_t)pSrc;
_wsDMA_PayLoadInit.DMA_DIR = DMA_DIR_PeripheralDST;
_wsDMA_PayLoadInit.DMA_BufferSize = DataLen;
_wsDMA_PayLoadInit.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
_wsDMA_PayLoadInit.DMA_MemoryInc = DMA_MemoryInc_Enable;
_wsDMA_PayLoadInit.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
_wsDMA_PayLoadInit.DMA_MemoryDataSize = WS_DMA_TRANSFER_T;
_wsDMA_PayLoadInit.DMA_Priority = DMA_Priority_High;
_wsDMA_PayLoadInit.DMA_M2M = DMA_M2M_Disable;
_wsDMA_PayLoadInit.DMA_Mode = DMA_Mode_Circular;
/* WS_DMA_CHANNEL Config */
DMA_Init(WS_DMA_CHANNEL, &_wsDMA_PayLoadInit);
/* WS_DMA_CHANNEL enable */
DMA_Cmd(WS_DMA_CHANNEL, ENABLE);
}
/**
* @brief Configures the DMA2 Channel4 for SDIO Rx request.
* @param BufferDST: pointer to the destination buffer
* @param BufferSize: buffer size
* @retval None
*/
static void DMA_RxConfiguration(uint32_t *BufferDST, uint32_t BufferSize)
{
DMA_InitTypeDef DMA_InitStructure;
DMA_ITConfig(DMA2_Stream5, DMA_IT_TC | DMA_IT_TE | DMA_IT_HT,DISABLE);
DMA_ClearFlag(DMA2_Stream5, DMA_FLAG_TCIF5 | DMA_FLAG_TEIF5 | DMA_FLAG_HTIF5 | DMA_FLAG_DMEIF5 | DMA_FLAG_HTIF5);
/* DMA2 Channel4 disable */
DMA_Cmd(DMA2_Stream5, DISABLE);
DMA_StructInit(&DMA_InitStructure);
/* DMA2 Channel4 Config */
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(USART1->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferDST;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = BufferSize;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //循环模式
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_Init(DMA2_Stream5, &DMA_InitStructure);
u1_recv.pos = 0; //当前读取位置清零
/* DMA2 Channel4 enable */
DMA_ITConfig(DMA2_Stream5, DMA_IT_TE,ENABLE); //使能出错中断
DMA_Cmd(DMA2_Stream5, ENABLE);
USART_DMACmd(USART1,USART_DMAReq_Rx,ENABLE);
NVIC_EnableIRQ(DMA2_Stream5_IRQn);
}
static void USART2_Enable_Rx(void)
{
GPIO_InitTypeDef GPIO_USART_InitStruct;
USART_InitTypeDef USART_InitStruct;
DMA_InitTypeDef DMA_InitStruct;
/* Enable Clocks */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* Set up GPIO for alternate function */
GPIO_PinAFConfig(GPIOD,GPIO_PinSource6,GPIO_AF_USART2);
/* Configure GPIO to transmit */
GPIO_USART_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_USART_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_USART_InitStruct.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_USART_InitStruct.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOD, &GPIO_USART_InitStruct);
/* Configure USART */
USART_InitStruct.USART_BaudRate = MIDI_BAUD_RATE;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_Mode = USART_Mode_Rx;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_Init(USART2, &USART_InitStruct);
/* Enable UART */
USART_Cmd(USART2, ENABLE);
DMA_StructInit(&DMA_InitStruct);
DMA_InitStruct.DMA_Channel = DMA_Channel_4;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)(&(USART2->DR));
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)midiBuffer;
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = MIDI_BUF_SIZE;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Circular;
DMA_InitStruct.DMA_Priority = DMA_Priority_Medium;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_InitStruct);
DMA_Cmd(DMA1_Stream5, ENABLE);
/* Connect UART to DMA */
USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE);
/* wait for DMA to be enabled */
while (DMA_GetCmdStatus(DMA1_Stream5) != ENABLE);
}
/*******************************************************************************
* Function Name : main
* Description : Main program
* Input : None
* Output : None
* Return : None
*******************************************************************************/
int main(void)
{
#ifdef DEBUG
debug();
#endif
SCU_MCLKSourceConfig(SCU_MCLK_OSC); /*Use OSC as the default clock source*/
SCU_PCLKDivisorConfig(SCU_PCLK_Div1); /* ARM Peripheral bus clokdivisor = 1*/
/* source addresses and destination addresses for the Second LLI structure */
Link[0]=(u32)(&Buffer0[12]);
Link[1]=(u32)(&Buffer2[0]);
/* source addresses and destination addresses for the Third LLI structure */
Link[4]=(u32)(&Buffer0[24]);
Link[5]=(u32)(&Buffer3[0]);
/*Set the addresses of next linked list for the second LLI structure*/
Link[2]=(u32)(&Link[4]);
SCU_AHBPeriphClockConfig(__DMA,ENABLE); /* Enable the clock for DMA*/
DMA_DeInit(); /* DMA default configuration : Reset configuration*/
DMA_Cmd(ENABLE);/*Enable the DMA*/
DMA_StructInit(&DMA_InitStruct);
/* Write the first LLI*/
DMA_InitStruct.DMA_Channel_LLstItm=(u32)(&Link[0]); /*Set the addresses of next linked list for the first LLI structure*/
DMA_InitStruct.DMA_Channel_SrcAdd=(u32)(&Buffer0[0]); /* source address for the first LLI structure */
DMA_InitStruct.DMA_Channel_DesAdd=(u32)(&Buffer1[0]); /*Destination address for the first LLI structure */
DMA_InitStruct.DMA_Channel_SrcWidth= DMA_SrcWidth_Word;/* The source bus width is a word" 32 bits"*/
DMA_InitStruct.DMA_Channel_DesWidth= DMA_DesWidth_Word; /* The Destination bus width is a word word*/
DMA_InitStruct.DMA_Channel_FlowCntrl=DMA_FlowCntrlt0_DMA;/* DMA is The flow controller*/
DMA_InitStruct.DMA_Channel_TrsfSize =12; /*transfer size*/
/* Configure the DMA channel1 "the chosen channel to perform the transfer" */
DMA_ChannelSRCIncConfig (DMA_Channel1, ENABLE);
DMA_ChannelDESIncConfig (DMA_Channel1, ENABLE);
DMA_Init(DMA_Channel1,&DMA_InitStruct);/* update the DMA channel1 registers with the cfirst LLI structure*/
DMA_ChannelCmd (DMA_Channel1,ENABLE);/*Enable the DMA channel*/
/*wait for the fifo to be empty*/
while(DMA_GetChannelActiveStatus(DMA_Channel1));
while(1);
}
void spiInit(SPI_TypeDef* SPIx)
{
SPI_InitTypeDef SPI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
DMA_Channel_TypeDef* DMA_Ch;
if (SPIx == SPI1)
{
chSemObjectInit(&spi1_semI, 1);
chSemObjectInit(&spi1_semS, 1);
DMA_Ch = DMA_CHANNEL_SPI1_TX;
}
else
{
return;
}
SPI_Cmd(SPIx, DISABLE);
//configure spi
SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPIx, &SPI_InitStructure);
SPI_Cmd(SPIx, ENABLE);
/* Setup DMA */
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPIx->DR;
DMA_InitStructure.DMA_MemoryBaseAddr = 0;
DMA_InitStructure.DMA_BufferSize = 0;
/* write */
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_Init(DMA_Ch, &DMA_InitStructure);
/* Enable the SPI Tx DMA request */
SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx, ENABLE);
}
/**
* @brief To set and config blutooth then send data to the register.
* @param rate, baudrate has setted on AT mode; addr, the memory base address; leng, the length of data you want to send.
* @retval None.
*/
void BT_Usart2_Config(uint32_t rate, uint32_t addr, uint8_t leng)
{
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_2/*TX, PA2*/ | GPIO_Pin_3/*RX, PA3*/);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_7);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_7);
USART_InitStructure.USART_BaudRate = rate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_DeInit(USART2);
USART_Init(USART2, &USART_InitStructure);
USART_Cmd(USART2, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
DMA_StructInit(&DMA_InitStructure);
DMA_DeInit(DMA1_Channel7);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)USART2 + 0x28; //////
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)&addr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = leng;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //address register is incremented or not
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord ;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord ;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel7,&DMA_InitStructure);
USART_ClearFlag(USART2,USART_FLAG_TC);
DMA_ClearFlag(DMA1_FLAG_TC7);
USART_DMACmd(USART2,USART_DMAReq_Tx,ENABLE);
DMA_Cmd(DMA1_Channel7,ENABLE);
sig_lam(2,1);
while (!DMA_GetFlagStatus(USART_FLAG_TC)){};
}
void init_DMA_in() {
DMA_InitTypeDef DMA_InitStruct;
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_DMA1, ENABLE );
DMA_DeInit(DMA1_Channel5);
DMA_StructInit( &DMA_InitStruct );
DMA_InitStruct.DMA_PeripheralBaseAddr = (unsigned int)&(I2C2 -> DR);
DMA_InitStruct.DMA_BufferSize = 4;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_MemoryBaseAddr = (int)out_buf;
DMA_InitStruct.DMA_Priority = DMA_Priority_VeryHigh;
DMA_Init(DMA1_Channel5, &DMA_InitStruct);
DMA_Cmd( DMA1_Channel5, ENABLE );
}
static void enable_dma_tx(const uint32_t dma_periph,
const uint8_t irq_channel,
const uint8_t irq_priority,
const uint32_t dma_it_flags,
volatile struct usart_info* ui)
{
const volatile struct dma_info* dma = &ui->dma_tx;
RCC_AHB1PeriphClockCmd(dma_periph, ENABLE);
DMA_DeInit(dma->stream);
DMA_InitTypeDef DMA_InitStructure;
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = dma->channel;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) dma->buff;
/*
* Setting BufferSize here to 0 is invalid. Its initial value
* doesn't matter anyways so set 1 here.
*/
DMA_InitStructure.DMA_BufferSize = 1;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &ui->usart->DR;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_Init(dma->stream, &DMA_InitStructure);
if (dma_it_flags) {
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq_channel;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority
= irq_priority;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_ITConfig(dma->stream, dma_it_flags, ENABLE);
}
/* Enable the USART Rx DMA request */
USART_DMACmd(ui->usart, USART_DMAReq_Tx, ENABLE);
}
void dma_setup(int bitRate) {
// init SPI
JshSPIInfo inf;
jshSPIInitInfo(&inf);
inf.baudRate = bitRate;
inf.baudRateSpec = SPIB_MINIMUM; // we don't want SPI to be any slower than this
inf.spiMSB = false;
inf.pinMOSI = tvPinVideo;
jshPinSetValue(tvPinVideo, 0); // set default video output state
jshSPISetup(TVSPIDEVICE, &inf);
// disable IRQs - because jsHardware enabled them
SPI_I2S_ITConfig(TVSPI, SPI_I2S_IT_RXNE, DISABLE);
// init DMA
#ifdef STM32F4
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_TVDMA, ENABLE);
#else
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_TVDMA, ENABLE);
#endif
DMA_InitTypeDef DMA_InitStructure;
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(TVSPI->DR));
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; // DMA_PeripheralDataSize_HalfWord and 16 bit?
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
#ifdef STM32F4
DMA_InitStructure.DMA_Channel = DMA_Channel_TVSPI_TX; // needed for SPI TX
DMA_InitStructure.DMA_Memory0BaseAddr = (u32)tvPixelPtr;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_MemoryBurst =DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst =DMA_PeripheralBurst_Single;
#else
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)tvPixelPtr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
#endif
DMA_InitStructure.DMA_BufferSize = tvWidth>>3/*bytes*/;
DMA_DeInit(DMA_TVSPI_TX);
DMA_Init(DMA_TVSPI_TX, &DMA_InitStructure);
SPI_I2S_DMACmd(TVSPI, SPI_I2S_DMAReq_Tx, ENABLE);
}
static void enable_dma_rx(const uint32_t dma_periph,
const uint8_t irq_channel,
const uint8_t irq_priority,
const uint32_t dma_it_flags,
volatile struct usart_info* ui)
{
const volatile struct dma_info* dma = &ui->dma_rx;
RCC_AHB1PeriphClockCmd(dma_periph, ENABLE);
DMA_DeInit(dma->stream);
DMA_InitTypeDef DMA_InitStructure;
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = dma->channel;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) dma->buff;
DMA_InitStructure.DMA_BufferSize = dma->buff_size;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &ui->usart->DR;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_Init(dma->stream, &DMA_InitStructure);
if (dma_it_flags) {
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq_channel;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = irq_priority;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_ITConfig(dma->stream, dma_it_flags, ENABLE);
}
/* Enable the USART Rx DMA request */
USART_DMACmd(ui->usart, USART_DMAReq_Rx, ENABLE);
/* Enable the DMA RX Stream */
DMA_Cmd(dma->stream, ENABLE);
}
/**
* @brief Init the DMA channel.
* @param None
* @retval None.
*/
void ETH_DMAPrepare(void)
{
DMA_CtrlDataInitTypeDef DMA_PriCtrlStr;
DMA_ChannelInitTypeDef DMA_InitStr;
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_SW1, &DMA_InitStr);
}
/*
*********************************************************************************************************
* 函 数 名: USART6_RX_DMA
* 功能说明: 设置USART6 DMA接收方式
* 形 参：无
* 返 回 值: 无
*********************************************************************************************************
*/
void USART6_RX_DMA(void)
{
//DMA_InitTypeDef UART6_DMA_RX;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); //开DMA时钟
DMA_StructInit(&UART6_DMA_RX);
UART6_DMA_RX.DMA_Channel = DMA_Channel_5;
UART6_DMA_RX.DMA_PeripheralBaseAddr = (u32)&USART6->DR;
UART6_DMA_RX.DMA_Memory0BaseAddr = (u32)&UART6_Recv_Buf[UART6_User_Buf_No];
UART6_DMA_RX.DMA_DIR = DMA_DIR_PeripheralToMemory;
UART6_DMA_RX.DMA_BufferSize = UART6_MAX_RECV_LEN;
UART6_DMA_RX.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
UART6_DMA_RX.DMA_MemoryInc = DMA_MemoryInc_Enable;
UART6_DMA_RX.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
UART6_DMA_RX.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
UART6_DMA_RX.DMA_Mode = DMA_Mode_Normal;//DMA_Mode_Circular;
UART6_DMA_RX.DMA_Priority = DMA_Priority_Medium;
UART6_DMA_RX.DMA_FIFOMode = DMA_FIFOMode_Disable;
UART6_DMA_RX.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
UART6_DMA_RX.DMA_MemoryBurst = DMA_MemoryBurst_Single;
UART6_DMA_RX.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
//DMA_DoubleBufferModeConfig ( DMA2_Stream5, (uint32_t)&UART6_Str.Buf[1], DMA_Memory_0 );
//DMA_DoubleBufferModeCmd ( DMA2_Stream5, ENABLE );
DMA_Init(DMA2_Stream2, &UART6_DMA_RX);
USART_DMACmd(USART6, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(DMA2_Stream2, ENABLE);
DMA_ITConfig(DMA2_Stream2, DMA_IT_TC, ENABLE); //DMA5传输完成中断
DMA_ITConfig(DMA2_Stream2, DMA_IT_TE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void dma_channel_usart2_init(void){
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
DMA_InitTypeDef myDMA;
DMA_StructInit(&myDMA);
myDMA.DMA_DIR = DMA_DIR_PeripheralDST;
myDMA.DMA_M2M = DMA_M2M_Disable;
myDMA.DMA_Mode = DMA_Mode_Normal;
myDMA.DMA_Priority = DMA_Priority_Medium;
myDMA.DMA_PeripheralBaseAddr =(uint32_t) &(USART2->TDR);
myDMA.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
myDMA.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
myDMA.DMA_MemoryBaseAddr = 0x200000 ;
myDMA.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
myDMA.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_Init(DMA1_Channel7,&myDMA);// DMA1 Channel 7 = USART2_Tx
NVIC_EnableIRQ(DMA1_Channel7_IRQn);
}
void ADC_DMA_init()
{
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/* Enable DMA1 clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* De-initialise DMA */
DMA_DeInit(DMA1_Channel1);
//DMA_InitTypeDef DMA_InitStructure;
/* DMA1 channel1 configuration */
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(ADC1->DR); // Set DMA channel Peripheral base address to ADC Data register
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ADC_ConvertedValueBuff; // Set DMA channel Memeory base addr to ADC_ConvertedValueBuff address
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; // Set DMA channel direction to peripheral to memory
DMA_InitStructure.DMA_BufferSize = ADC_CONV_BUFF_SIZE; // Set DMA channel buffersize to peripheral to ADC_CONV_BUFF_SIZE
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; // Disable DMA channel Peripheral address auto increment
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // Enable Memeory increment (To be verified ....)
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;// set Peripheral data size to 8bit
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; // set Memeory data size to 8bit
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // Set DMA in normal mode
DMA_InitStructure.DMA_Priority = DMA_Priority_High; // Set DMA channel priority to High
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; // Disable memory to memory option
DMA_Init(DMA1_Channel1, &DMA_InitStructure); // Use Init structure to initialise channel1 (channel linked to ADC)
/* Enable Transmit Complete Interrup for DMA channel 1 */
DMA_ITConfig(DMA1_Channel1, DMA_IT_TC, ENABLE);
/* Setup NVIC for DMA channel 1 interrupt request */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_Cmd(DMA1_Channel1, ENABLE);
}
void init_DMA_out() {
DMA_InitTypeDef DMA_InitStruct;
RCC_AHBPeriphClockCmd( RCC_AHBPeriph_DMA1, ENABLE );
//Inicjalizuje kanal 4 do zapisu danych
DMA_DeInit(DMA1_Channel4);
DMA_StructInit( &DMA_InitStruct );
DMA_InitStruct.DMA_PeripheralBaseAddr = (unsigned int)&(I2C2 -> DR);
DMA_InitStruct.DMA_BufferSize = 4;
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_M2M = DMA_M2M_Disable;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_MemoryBaseAddr = (int)&(out_buf[1]);
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_Init(DMA1_Channel4, &DMA_InitStruct);
}
static void DMA_TxConfiguration(uint32_t *BufferSRC, uint32_t BufferSize)
{
DMA_InitTypeDef DMA_InitStructure;
USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
USART_ITConfig(USART1, USART_IT_TC, DISABLE); //关闭发送完成和发送空中断
DMA_ITConfig(DMA2_Stream7, DMA_IT_TC | DMA_IT_TE | DMA_IT_HT,DISABLE);
DMA_ClearFlag(DMA2_Stream7, DMA_FLAG_TCIF7 | DMA_FLAG_TEIF7 | DMA_FLAG_HTIF7 | DMA_FLAG_DMEIF7 | DMA_FLAG_HTIF7);
/* DMA2 Channel4 disable */
DMA_Cmd(DMA2_Stream7, DISABLE);
DMA_StructInit(&DMA_InitStructure);
/* DMA2 Channel4 Config */
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(USART1->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferSRC;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = BufferSize;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
//DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
//DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
//DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
//DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream7, &DMA_InitStructure);
DMA_ITConfig(DMA2_Stream7, DMA_IT_TC | DMA_IT_TE,ENABLE); //使能传输完成和出错中断
/* DMA2 Channel4 enable */
DMA_Cmd(DMA2_Stream7, ENABLE);
USART_DMACmd(USART1,USART_DMAReq_Tx,ENABLE);
NVIC_EnableIRQ(DMA2_Stream7_IRQn);
}
/*
*********************************************************************************************************
* 函 数 名: USART6_TX_DMA
* 功能说明: 设置USART6 DMA发送方式
* 形 参：无
* 返 回 值: 无
*********************************************************************************************************
*/
void USART6_TX_DMA(void)
{
//DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); //开DMA时钟
DMA_StructInit(&UART6_DMA_TX);
UART6_DMA_TX.DMA_Channel = DMA_Channel_5;
UART6_DMA_TX.DMA_PeripheralBaseAddr = (u32)&USART6->DR;
// UART6_DMA_TX.DMA_Memory0BaseAddr = (u32)&USART6_Rcv_Str.Buf[0];
UART6_DMA_TX.DMA_DIR = DMA_DIR_MemoryToPeripheral;
// UART6_DMA_TX.DMA_BufferSize = MAX_RCV_LEN;
UART6_DMA_TX.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
UART6_DMA_TX.DMA_MemoryInc = DMA_MemoryInc_Enable;
UART6_DMA_TX.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
UART6_DMA_TX.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
UART6_DMA_TX.DMA_Mode = DMA_Mode_Normal;//DMA_Mode_Circular;
UART6_DMA_TX.DMA_Priority = DMA_Priority_Medium;
UART6_DMA_TX.DMA_FIFOMode = DMA_FIFOMode_Disable;
UART6_DMA_TX.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
UART6_DMA_TX.DMA_MemoryBurst = DMA_MemoryBurst_Single;
UART6_DMA_TX.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream6, &UART6_DMA_TX);
USART_DMACmd(USART6, USART_DMAReq_Tx, ENABLE);
DMA_ITConfig(DMA2_Stream6, DMA_IT_TC, ENABLE); //DMA2传输完成中断
DMA_ITConfig(DMA2_Stream6, DMA_IT_TE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void spi1Init(void) {
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
if (!spiData[0].initialized) {
// SPI interface
RCC_APB2PeriphClockCmd(SPI_SPI1_CLOCK, ENABLE);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
// SPI SCK / MOSI / MISO pin configuration
GPIO_InitStructure.GPIO_Pin = SPI_SPI1_SCK_PIN;
GPIO_Init(SPI_SPI1_SCK_PORT, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = SPI_SPI1_MISO_PIN;
GPIO_Init(SPI_SPI1_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = SPI_SPI1_MOSI_PIN;
GPIO_Init(SPI_SPI1_MOSI_PORT, &GPIO_InitStructure);
// Connect SPI pins to Alternate Function
GPIO_PinAFConfig(SPI_SPI1_SCK_PORT,SPI_SPI1_SCK_SOURCE, SPI_SPI1_AF);
GPIO_PinAFConfig(SPI_SPI1_MISO_PORT, SPI_SPI1_MISO_SOURCE, SPI_SPI1_AF);
GPIO_PinAFConfig(SPI_SPI1_MOSI_PORT, SPI_SPI1_MOSI_SOURCE, SPI_SPI1_AF);
// SPI configuration
SPI_I2S_DeInit(SPI1);
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, ENABLE);
// RX DMA
DMA_DeInit(SPI_SPI1_DMA_RX);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = SPI_SPI1_DMA_RX_CHANNEL;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI1->DR;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)spiData;
DMA_InitStructure.DMA_BufferSize = 1;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; // note the buffer must be word aligned
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(SPI_SPI1_DMA_RX, &DMA_InitStructure);
// store flags for later use
spiData[0].intRxFlags = SPI_SPI1_DMA_RX_FLAGS;
DMA_ClearITPendingBit(SPI_SPI1_DMA_RX, spiData[0].intRxFlags);
DMA_ITConfig(SPI_SPI1_DMA_RX, DMA_IT_TC, ENABLE);
// Enable RX DMA global Interrupt
NVIC_InitStructure.NVIC_IRQChannel = SPI_SPI1_DMA_RX_IRQ;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// TX DMA - one shot
DMA_DeInit(SPI_SPI1_DMA_TX);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = SPI_SPI1_DMA_TX_CHANNEL;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI1->DR;
DMA_InitStructure.DMA_BufferSize = 1;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; // note the buffer must be word aligned
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(SPI_SPI1_DMA_TX, &DMA_InitStructure);
// store flags for later use
spiData[0].intTxFlags = SPI_SPI1_DMA_TX_FLAGS;
DMA_ClearITPendingBit(SPI_SPI1_DMA_TX, spiData[0].intTxFlags);
spiData[0].spi = SPI1;
spiData[0].rxDMAStream = SPI_SPI1_DMA_RX;
spiData[0].txDMAStream = SPI_SPI1_DMA_TX;
spiData[0].initialized = 1;
// Enable Ethernet Interrupt (for our stack management)
NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
}
serialPort_t *uartOpen(USART_TypeDef *USARTx, serialReceiveCallbackPtr callback, uint32_t baudRate, portMode_t mode)
{
DMA_InitTypeDef DMA_InitStructure;
USART_InitTypeDef USART_InitStructure;
uartPort_t *s = NULL;
if (USARTx == USART1)
s = serialUSART1(baudRate, mode);
if (USARTx == USART2)
s = serialUSART2(baudRate, mode);
s->USARTx = USARTx;
// common serial initialisation code should move to serialPort::init()
s->port.rxBufferHead = s->port.rxBufferTail = 0;
s->port.txBufferHead = s->port.txBufferTail = 0;
// callback for IRQ-based RX ONLY
s->port.callback = callback;
s->port.mode = mode;
s->port.baudRate = baudRate;
USART_InitStructure.USART_BaudRate = baudRate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
if (mode & MODE_SBUS) {
USART_InitStructure.USART_StopBits = USART_StopBits_2;
USART_InitStructure.USART_Parity = USART_Parity_Even;
} else {
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = 0;
if (mode & MODE_RX)
USART_InitStructure.USART_Mode |= USART_Mode_Rx;
if (mode & MODE_TX)
USART_InitStructure.USART_Mode |= USART_Mode_Tx;
USART_Init(USARTx, &USART_InitStructure);
USART_Cmd(USARTx, ENABLE);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->DR;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
// Receive DMA or IRQ
if (mode & MODE_RX) {
if (s->rxDMAChannel) {
DMA_InitStructure.DMA_BufferSize = s->port.rxBufferSize;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->port.rxBuffer;
DMA_DeInit(s->rxDMAChannel);
DMA_Init(s->rxDMAChannel, &DMA_InitStructure);
DMA_Cmd(s->rxDMAChannel, ENABLE);
USART_DMACmd(USARTx, USART_DMAReq_Rx, ENABLE);
s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAChannel);
} else {
USART_ITConfig(USARTx, USART_IT_RXNE, ENABLE);
}
}
// Transmit DMA or IRQ
if (mode & MODE_TX) {
if (s->txDMAChannel) {
DMA_InitStructure.DMA_BufferSize = s->port.txBufferSize;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_DeInit(s->txDMAChannel);
DMA_Init(s->txDMAChannel, &DMA_InitStructure);
DMA_ITConfig(s->txDMAChannel, DMA_IT_TC, ENABLE);
DMA_SetCurrDataCounter(s->txDMAChannel, 0);
s->txDMAChannel->CNDTR = 0;
USART_DMACmd(USARTx, USART_DMAReq_Tx, ENABLE);
} else {
USART_ITConfig(USARTx, USART_IT_TXE, ENABLE);
}
}
return (serialPort_t *)s;
}
Serial::Serial(Port port, System *parent) {
thisPort = port;
GPIO_InitTypeDef GPIO_InitStructure;
txBufPos = rxBufPos = 0;
if (port == RS485) {
if (PortRS485Open)
{
parent->setFault(FLT_FIRMWARE,500101);
return; //fail because already opened
}
PortRS485Open = true;
rxBuffer=(u8*)malloc(RXBUFSIZE);
txBuffer=(u8*)malloc(TXBUFSIZE);
/* Enable USARTz Clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
/* Connect USART pins to AF7 */
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
//TX=PA9 AF7
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitStructure);
//RX=PA10 AF7
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
//TXEN=PC10
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
RS485_EnableTransmit(false);
/* Enable the USART OverSampling by 8 */
//by default oversampling=16 USART_OverSampling8Cmd(USART2, ENABLE);
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = 460800; //1.5mbps=max @24MHz (koska 24M/16=1.5M)
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl =
USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
/* Configure USARTy */
USART_Init(USART1, &USART_InitStructure);
/* Enable USARTy DMA TX request */
USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);
USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
/* Enable USARTy */
USART_Cmd(USART1, ENABLE);
USART_ITConfig(USART1, USART_IT_TC, ENABLE);
/* Enable the USARTx Interrupt, used for setting RS485 transmit enable=false after transmit complete */
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 5;//higher value=lower priority;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init_GD(&NVIC_InitStructure);
//DMA2_Stream2==RX
{
//common?
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr =
((uint32_t) USART1 + 0x04);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
//DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
//tx
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) txBuffer;
DMA_InitStructure.DMA_BufferSize = (uint16_t) TXBUFSIZE;
DMA_Init(DMA2_Stream7, &DMA_InitStructure);
//RX
DMA_DeInit(DMA2_Stream2);
DMA_InitStructure.DMA_PeripheralBaseAddr =
((uint32_t) USART1 + 0x04);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) rxBuffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = RXBUFSIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_Init(DMA2_Stream2, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream2, ENABLE);
}
}
//for DSC serial
if (port == DSC) {
if (PortDSCOpen)
{
parent->setFault(FLT_FIRMWARE,500102);
return; //fail because already opened
}
PortDSCOpen = true;
rxBuffer=(u8*)malloc(RXBUFSIZE);
txBuffer=(u8*)malloc(TXBUFSIZE);
/* Enable USARTz Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
/* Connect USART pins to AF7 */
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);
//TX=PA2 AF7
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitStructure);
//RX=PA3 AF7
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* Enable the USART OverSampling by 8 */
//by default oversampling=16 USART_OverSampling8Cmd(USART2, ENABLE);
USART_InitTypeDef USART_InitStructure;
//USART_InitStructure.USART_BaudRate = 468750; //1.5mbps=max @24MHz (koska 24M/16=1.5M)
USART_InitStructure.USART_BaudRate = 416667; //1.5mbps=max @24MHz (koska 24M/16=1.5M)
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl =
USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
/* Configure USARTy */
USART_Init(USART2, &USART_InitStructure);
/* Enable USARTy DMA TX request */
USART_DMACmd(USART2, USART_DMAReq_Tx, ENABLE);
USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE);
/* Enable USARTy */
USART_Cmd(USART2, ENABLE);
//DMA1_Stream5==RX
{
//common?
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr =
((uint32_t) USART2 + 0x04);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
//DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
//TX
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) txBuffer;
DMA_InitStructure.DMA_BufferSize = (uint16_t) TXBUFSIZE;
DMA_Init(DMA1_Stream6, &DMA_InitStructure);
DMA_DeInit(DMA1_Stream5);
DMA_InitStructure.DMA_PeripheralBaseAddr =
((uint32_t) USART2 + 0x04);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) rxBuffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = RXBUFSIZE;
rxPacketLen = RXBUFSIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_Init(DMA1_Stream5, &DMA_InitStructure);
DMA_Cmd(DMA1_Stream5, ENABLE);
/* Enable the USARTx Interrupt */
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_KERNEL_INTERRUPT_PRIORITY;//higher value=lower priority
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init_GD(&NVIC_InitStructure);
}
}
}
/*******************************************************************************
* Function Name : uart_open
* Description : Open the UART port communication
* Input : - Uart: Select the USART or the UART peripheral
* : - BaudRate: Baud rate configuration
* : - DmaBufSize: DMA buffer size
* : - RxBufSize: Receive buffer size
* : - TxBufSize: Transmit buffer size
* : - HwCtrl: Hardware control options
* : - Gpio: GPIO used for hardware control
* Output : None
* Return : 0 if OK, -1 in case of error
*******************************************************************************/
int uart_open (const _Uart_Descriptor *Uart, u32 BaudRate, u8 DmaBufSize, u16 RxBufSize, u16 TxBufSize, u8 HwCtrl, const _Gpio_Descriptor *Gpio)
{
USART_InitTypeDef usart_init_structure;
DMA_InitTypeDef dma_init_structure;
NVIC_InitTypeDef NVIC_InitStructure;
/* Init control variables and bufers */
if (*Uart->Ctrl) _sys_free(*Uart->Ctrl);
if ((*Uart->Ctrl = _sys_malloc(sizeof(_Uart_Ctrl) + DmaBufSize + RxBufSize + TxBufSize)) == 0) return(-1);
memset(*Uart->Ctrl, 0, sizeof(_Uart_Ctrl));
(*Uart->Ctrl)->DmaBufPtr = (char *)*Uart->Ctrl + sizeof(_Uart_Ctrl);
(*Uart->Ctrl)->DmaBufSize = DmaBufSize;
(*Uart->Ctrl)->iDma = DmaBufSize;
(*Uart->Ctrl)->RxBufSize = RxBufSize;
(*Uart->Ctrl)->RxBufPtr = (*Uart->Ctrl)->DmaBufPtr + (*Uart->Ctrl)->DmaBufSize;
(*Uart->Ctrl)->TxBufSize = TxBufSize;
(*Uart->Ctrl)->TxBufPtr = (*Uart->Ctrl)->RxBufPtr + (*Uart->Ctrl)->RxBufSize;
(*Uart->Ctrl)->HwCtrl = HwCtrl;
(*Uart->Ctrl)->Gpio = Gpio;
#ifdef _UART_OS_SUPPORT
(*Uart->Ctrl)->Event = SYS_EVT_INCOMING_DATA;
(*Uart->Ctrl)->Task = sys_task_self();
#endif
/* Enable peripheral clock */
(*Uart->RCC_APBxPeriphClockCmd)(Uart->RCC_APBxPeriph, ENABLE);
/* Init GPIO */
gpio_set_function(Uart->TxGpio, Uart->GPIO_AF);
gpio_set_function(Uart->RxGpio, Uart->GPIO_AF);
gpio_set_mode(Uart->TxGpio, GPIO_MODE_AF, 0);
gpio_set_mode(Uart->RxGpio, GPIO_MODE_AF, 0);
if ((*Uart->Ctrl)->HwCtrl & (UART_HW_FLOW_CTRL_RX | UART_HALF_DUPLEX)) gpio_set_mode((*Uart->Ctrl)->Gpio, GPIO_FCT_OUT, 0);
/* Init UART peripheral */
USART_DeInit(Uart->UARTx);
USART_StructInit(&usart_init_structure);
usart_init_structure.USART_BaudRate = BaudRate;
if ((*Uart->Ctrl)->HwCtrl & UART_HW_FLOW_CTRL_TX) usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_CTS;
USART_Init(Uart->UARTx, &usart_init_structure);
/* Configure DMA (if used) */
if ((*Uart->Ctrl)->DmaBufSize)
{
DMA_DeInit(Uart->DMAy_Streamx);
DMA_StructInit(&dma_init_structure);
dma_init_structure.DMA_Channel = Uart->DMA_Channel;
dma_init_structure.DMA_PeripheralBaseAddr = (u32)&Uart->UARTx->DR;
dma_init_structure.DMA_Memory0BaseAddr = (u32)(*Uart->Ctrl)->DmaBufPtr;
dma_init_structure.DMA_BufferSize = (*Uart->Ctrl)->DmaBufSize;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_Mode = DMA_Mode_Circular;
dma_init_structure.DMA_Priority = DMA_Priority_Medium;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_Init(Uart->DMAy_Streamx, &dma_init_structure);
DMA_ITConfig(Uart->DMAy_Streamx, DMA_IT_TC | DMA_IT_HT, ENABLE);
DMA_Cmd(Uart->DMAy_Streamx, ENABLE);
NVIC_EnableIRQ(Uart->DMAx_IRQn);
//
//NVIC_SetPriority((IRQn_Type)Uart->DMAx_IRQn, (uint32_t)129);
NVIC_SetPriority((IRQn_Type)Uart->DMAx_IRQn, (1 << __NVIC_PRIO_BITS) -3);
//
USART_DMACmd(Uart->UARTx, USART_DMAReq_Rx, ENABLE);
USART_ITConfig(Uart->UARTx, USART_IT_IDLE, ENABLE);
}
else USART_ITConfig(Uart->UARTx, USART_IT_RXNE, ENABLE);
/* Enable IT and start peripheral */
//NVIC_InitStructure.NVIC_IRQChannel = Uart->IRQn; // we want to configure the USART1 interrupts
//NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;// this sets the priority group of the USART1 interrupts
//NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; // this sets the subpriority inside the group
//NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; // the USART1 interrupts are globally enabled
//NVIC_Init(&NVIC_InitStructure);
//
//NVIC_SetPriority((IRQn_Type)Uart->IRQn, (uint32_t)129);
NVIC_SetPriority((IRQn_Type)Uart->IRQn, (1 << __NVIC_PRIO_BITS) -4);
//
USART_ITConfig(Uart->UARTx, USART_IT_TC, ENABLE);
NVIC_EnableIRQ(Uart->IRQn);
USART_Cmd(Uart->UARTx, ENABLE);
while (!gpio_read(Uart->TxGpio));
return(0);
}
void adcInit(void)
{
ADC_CommonInitTypeDef ADC_CommonInitStructure;
ADC_InitTypeDef ADC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
ADC_CommonStructInit(&ADC_CommonInitStructure);
ADC_StructInit(&ADC_InitStructure);
DMA_StructInit(&DMA_InitStructure);
GPIO_StructInit(&GPIO_InitStructure);
///////////////////////////////////
RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_ADC12, ENABLE);
///////////////////////////////////
DMA_DeInit(DMA1_Channel1);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)adc1ConvertedValues;
//DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 2;
//DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
//DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
DMA_Cmd(DMA1_Channel1, ENABLE);
///////////////////////////////////
GPIO_InitStructure.GPIO_Pin = VBATT_PIN | DIFF_PRESSURE_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
//GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
//GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
//GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOC, &GPIO_InitStructure);
///////////////////////////////////
ADC_VoltageRegulatorCmd(ADC1, ENABLE);
delay(10);
ADC_SelectCalibrationMode(ADC1, ADC_CalibrationMode_Single);
ADC_StartCalibration(ADC1);
while(ADC_GetCalibrationStatus(ADC1) != RESET );
///////////////////////////////////
//ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
//ADC_CommonInitStructure.ADC_Clock = ADC_Clock_AsynClkMode;
//ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonInitStructure.ADC_DMAMode = ADC_DMAMode_Circular;
//ADC_CommonInitStructure.ADC_TwoSamplingDelay = 0;
ADC_CommonInit(ADC1, &ADC_CommonInitStructure);
///////////////////////////////////
ADC_InitStructure.ADC_ContinuousConvMode = ADC_ContinuousConvMode_Enable;
//ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
//ADC_InitStructure.ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0;
//ADC_InitStructure.ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None;
//ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
//ADC_InitStructure.ADC_OverrunMode = DISABLE;
//ADC_InitStructure.ADC_AutoInjMode = DISABLE;
ADC_InitStructure.ADC_NbrOfRegChannel = 2;
ADC_Init(ADC1, &ADC_InitStructure);
///////////////////////////////////
ADC_RegularChannelConfig(ADC1, VBATT_CHANNEL, 1, ADC_SampleTime_181Cycles5);
ADC_RegularChannelConfig(ADC1, DIFF_PRESSURE_CHANNEL, 2, ADC_SampleTime_181Cycles5);
ADC_Cmd(ADC1, ENABLE);
while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_RDY));
ADC_DMAConfig(ADC1, ADC_DMAMode_Circular);
ADC_DMACmd(ADC1, ENABLE);
ADC_StartConversion(ADC1);
}
void ADC_Conf(){
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
// GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2;
GPIO_Init(GPIOC, &GPIO_InitStructure);
// ADCの設定
ADC_CommonInitTypeDef ADC_CommonInitStructure;
ADC_CommonStructInit(&ADC_CommonInitStructure);
ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2;
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE);
// ADC1の設定
ADC_InitTypeDef ADC_InitStructure;
ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC3;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = nADC; // 変換回数
ADC_Init(ADC1, &ADC_InitStructure);
// ADC2の設定
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_Init(ADC2, &ADC_InitStructure);
ADC_DiscModeChannelCountConfig(ADC1, 1);
ADC_DiscModeCmd(ADC1, ENABLE);
ADC_DiscModeChannelCountConfig(ADC2, 1);
ADC_DiscModeCmd(ADC2, ENABLE);
// AD変換チャネルなどの設定
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_144Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 2, ADC_SampleTime_144Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 3, ADC_SampleTime_144Cycles);
ADC_RegularChannelConfig(ADC2, ADC_Channel_10, 1, ADC_SampleTime_144Cycles);
ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_144Cycles);
ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 3, ADC_SampleTime_144Cycles);
// タイマのカウンタの設定値を計算する
uint32_t clock;
RCC_ClocksTypeDef RCC_Clocks;
RCC_GetClocksFreq(&RCC_Clocks);
if(RCC_Clocks.HCLK_Frequency == RCC_Clocks.PCLKx_Frequency_autoADC)
clock = RCC_Clocks.PCLKx_Frequency_autoADC;
else
clock = RCC_Clocks.PCLKx_Frequency_autoADC * 2;
uint16_t preDMAC_trig = 2;
uint16_t ADC_trig = dt_preADC * clock + preDMAC_trig;
uint16_t postDMAC_trig = dt_postADC * clock + ADC_trig;
uint16_t ADC_period = dt_int * clock / nDMAC_ADC;
// エラーチェック
if(ADC_trig > ADC_period || postDMAC_trig > ADC_period) while(1);
// AD変換とポート出力制御用タイマの設定
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = ADC_period - 1;
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
// AD変換タイミング (CC3)
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = ADC_trig - 1;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_CtrlPWMOutputs(TIM1, ENABLE);
// AD変換前DMA転送タイミング (CC1)
TIM_OCStructInit(&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Disable;
TIM_OCInitStructure.TIM_Pulse = preDMAC_trig - 1;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
// AD変換後DMA転送タイミング (CC2)
TIM_OCInitStructure.TIM_Pulse = postDMAC_trig - 1;
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
// DMAC起動許可
TIM_DMACmd(TIM1, TIM_DMA_CC1, ENABLE);
TIM_DMACmd(TIM1, TIM_DMA_CC2, ENABLE);
// regular group変換後データ転送用DMACの設定
DMA_InitTypeDef DMA_InitStructure;
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = DMA_Channel_x_endADC_autoADC;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(ADC->CDR));
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)ADC_result;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = nDMAC_ADC; // 転送回数
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMAx_StreamY_endADC_autoADC, &DMA_InitStructure);
// ADCの有効化
ADC_Cmd(ADC1, ENABLE);
ADC_Cmd(ADC2, ENABLE);
// Enable DMA
DMA_Cmd(DMAx_StreamY_endADC_autoADC, ENABLE);
DMA_Cmd(DMAx_StreamY_preADC_OUT_autoADC, ENABLE);
DMA_Cmd(DMAx_StreamY_postADC_OUT_autoADC, ENABLE);
// タイマ動作開始
TIM_Cmd(TIM1, ENABLE);
}
void ADC_Configuration(void)
{
ADC1_Convertion_buff=malloc(ADC_BUFF_SIZE); //64 samples * 2 for interleaving, * 2bytes/sample==256
ADC_InitTypeDef ADC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/* PCLK2 is the APB2 clock */
/* ADCCLK = PCLK2/6 = 72/6 = 12MHz*/
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
/* Enable ADC1,2 clock so that we can talk to them */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
/*Enable the DMA1 clk*/
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Put everything back to power-on defaults */
ADC_DeInit(ADC1);
ADC_DeInit(ADC2);
/* ADC2 Configuration ------------------------------------------------------*/
/* ADC1 and ADC2 operate independently */
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
/* Enable the scan conversion so we do three at a time */
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
/* Don't do contimuous conversions - do them on demand */
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
/* Start conversin by software, not an external trigger */
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
/* Conversions are 12 bit - put them in the lower 12 bits of the result */
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
/* Say how many channels would be used by the sequencer */
ADC_InitStructure.ADC_NbrOfChannel = 1;
/* Now do the setup */
ADC_Init(ADC2, &ADC_InitStructure);
/* ADC2 injected channel configuration */
#if BOARD<3
ADC_InjectedSequencerLengthConfig(ADC2, 2);//two conversions
#else
ADC_InjectedSequencerLengthConfig(ADC2, 3);//three conversions on the version 3 pcb - thermistor on the sensor
#endif
ADC_InjectedChannelConfig(ADC2, PRESSURE_ADC_CHAN, 1, ADC_SampleTime_239Cycles5);
//ADC_InjectedChannelConfig(ADC2, 16, 3, ADC_SampleTime_239Cycles5);//on die temperature sensor - only on adc1 :-(
ADC_InjectedChannelConfig(ADC2, BATTERY_ADC_CHAN, 2, ADC_SampleTime_239Cycles5);
#if BOARD>=3
ADC_InjectedChannelConfig(ADC2, THERMISTOR_ADC_CHAN, 3, ADC_SampleTime_239Cycles5);
#endif
ADC_ExternalTrigInjectedConvConfig(ADC2, ADC_ExternalTrigInjecConv_None);//set sw injected channels
/* Set the analogue watchdog on the battery voltage conversion*/
ADC_AnalogWatchdogCmd(ADC2,ADC_AnalogWatchdog_SingleInjecEnable);
ADC_AnalogWatchdogThresholdsConfig(ADC2,0x0FFF,(uint16_t)((float)SAMPLING_FACTOR*MINIMUM_VOLTAGE));//watchdog fires on low voltage
ADC_AnalogWatchdogSingleChannelConfig(ADC2, BATTERY_ADC_CHAN);//set the watchdog to the battery voltage channel
ADC_ITConfig(ADC2, ADC_IT_AWD, ENABLE);//enable the analogue watchdog interrupt
/* Enable the die temperature sensing and vref internal inputs to adc1*/
//ADC_TempSensorVrefintCmd(ENABLE);
/* Enable ADC2 */
ADC_Cmd(ADC2, ENABLE);
/* Enable ADC2 reset calibaration register */
ADC_ResetCalibration(ADC2);
/* Check the end of ADC2 reset calibration register */
while(ADC_GetResetCalibrationStatus(ADC2));
/* Start ADC2 calibaration */
ADC_StartCalibration(ADC2);
/* Check the end of ADC2 calibration */
while(ADC_GetCalibrationStatus(ADC2));
readADC2(BATTERY_ADC_CHAN);//Have to flush this for some reason
/* ADC2 is now set up - move the ADC1 using DMA*/
/* DMA1 channel1(ADC1) configuration -------------------------------------------*/
DMA_DeInit(DMA1_Channel1);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)ADC1_Convertion_buff;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = ADC_BUFF_SIZE/2;//2bytes/sample
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel1, DMA_IT_TC | DMA_IT_HT, ENABLE);//interrupt on complete and half complete
DMA_ClearFlag(DMA1_FLAG_TC1|DMA1_FLAG_HT1); //make sure flags are clear
/* Enable DMA1 channel1 */
DMA_Cmd(DMA1_Channel1, ENABLE);
/* ADC1 configuration ------------------------------------------------------*/
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = 1;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel configuration */
ADC_RegularChannelConfig(ADC1, CRT_PPG_ADC_CHAN, 1, ADC_SampleTime_1Cycles5);/*239Cycles5);*/
/* Enable ADC1 DMA */
ADC_DMACmd(ADC1, ENABLE);
/* Enable ADC1 */
ADC_Cmd(ADC1, ENABLE);
/* Calibrate the ADC1*/
ADC_ResetCalibration(ADC1);
while (ADC_GetResetCalibrationStatus(ADC1));
ADC_StartCalibration(ADC1);
while (ADC_GetCalibrationStatus(ADC1));
ADC_SoftwareStartConvCmd(ADC1, ENABLE);
/* Enable the NVIC interrupt */
DMA_ISR_Config();
}
void CS43L22_Config() {
// configure STM32F4Discovery I2S pins
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Pin = STM32F4D_I2S_WS_PIN;
GPIO_Init(STM32F4D_I2S_WS_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(STM32F4D_I2S_WS_PORT, STM32F4D_I2S_WS_PINSRC, GPIO_AF_SPI3);
GPIO_InitStructure.GPIO_Pin = STM32F4D_I2S_CK_PIN;
GPIO_Init(STM32F4D_I2S_CK_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(STM32F4D_I2S_CK_PORT, STM32F4D_I2S_CK_PINSRC, GPIO_AF_SPI3);
GPIO_InitStructure.GPIO_Pin = STM32F4D_I2S_SD_PIN;
GPIO_Init(STM32F4D_I2S_SD_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(STM32F4D_I2S_SD_PORT, STM32F4D_I2S_SD_PINSRC, GPIO_AF_SPI3);
GPIO_InitStructure.GPIO_Pin = STM32F4D_I2S_MCLK_PIN;
GPIO_Init(STM32F4D_I2S_MCLK_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(STM32F4D_I2S_MCLK_PORT, STM32F4D_I2S_MCLK_PINSRC, GPIO_AF_SPI3);
// configure I2C pins to access the CS43L22 configuration registers
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Pin = CODEC_I2C_SCL_PIN;
GPIO_Init(CODEC_I2C_SCL_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(CODEC_I2C_SCL_PORT, GPIO_PinSource6, GPIO_AF_I2C1);
GPIO_InitStructure.GPIO_Pin = CODEC_I2C_SDA_PIN;
GPIO_Init(CODEC_I2C_SDA_PORT, &GPIO_InitStructure);
GPIO_PinAFConfig(CODEC_I2C_SDA_PORT, GPIO_PinSource9, GPIO_AF_I2C1);
// CS43L22 reset pin
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Pin = CODEC_RESET_PIN;
GPIO_Init(CODEC_RESET_PORT, &GPIO_InitStructure);
GPIO_ResetBits(CODEC_RESET_PORT, CODEC_RESET_PIN); // activate reset
// I2S initialisation
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
RCC_PLLI2SCmd(ENABLE); // new for STM32F4: enable I2S PLL
SPI_I2S_DeInit(SPI3);
I2S_InitTypeDef I2S_InitStructure;
I2S_StructInit(&I2S_InitStructure);
I2S_InitStructure.I2S_Standard = STM32F4D_I2S_STANDARD;
I2S_InitStructure.I2S_DataFormat = STM32F4D_I2S_DATA_FORMAT;
I2S_InitStructure.I2S_MCLKOutput = STM32F4D_I2S_MCLK_ENABLE ? I2S_MCLKOutput_Enable : I2S_MCLKOutput_Disable;
I2S_InitStructure.I2S_AudioFreq = (u16)(STM32F4D_I2S_AUDIO_FREQ);
I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; // configuration required as well?
I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
I2S_Init(SPI3, &I2S_InitStructure);
I2S_Cmd(SPI3, ENABLE);
// DMA Configuration for SPI Tx Event
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
DMA_InitTypeDef DMA_InitStructure;
DMA_StructInit(&DMA_InitStructure);
DMA_Cmd(DMA1_Stream5, DISABLE);
DMA_ClearFlag(DMA1_Stream5, DMA_FLAG_TCIF5 | DMA_FLAG_TEIF5 | DMA_FLAG_HTIF5 | DMA_FLAG_FEIF5);
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&SPI3->DR;
// DMA_InitStructure.DMA_MemoryBaseAddr = ...; // configured in CS43L22_Start
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
// DMA_InitStructure.DMA_BufferSize = ...; // configured in CS43L22_Start
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_InitStructure);
// DMA_Cmd(DMA1_Stream5, ENABLE); // done on CS43L22_Start
DMA_ITConfig(DMA1_Stream5, DMA_IT_TE | DMA_IT_FE, DISABLE);
// trigger interrupt when transfer half complete/complete
DMA_ITConfig(DMA1_Stream5, DMA_IT_HT | DMA_IT_TC, ENABLE);
// enable SPI interrupts to DMA
SPI_I2S_DMACmd(SPI3, SPI_I2S_DMAReq_Tx, ENABLE);
// Configure and enable DMA interrupt
/* Configure the DMA IRQ handler priority */
NVIC_SetPriority(DMA1_Stream5_IRQn, 0x0);
NVIC_EnableIRQ(DMA1_Stream5_IRQn);
// configure I2C
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
I2C_DeInit(CODEC_I2C);
I2C_InitTypeDef I2C_InitStructure;
I2C_StructInit(&I2C_InitStructure);
I2C_InitStructure.I2C_ClockSpeed = 100000;
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
I2C_InitStructure.I2C_OwnAddress1 = CORE_I2C_ADDRESS;
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_Cmd(CODEC_I2C, ENABLE);
I2C_Init(CODEC_I2C, &I2C_InitStructure);
codec_init();
}
void main(void)
#endif
{
uint32_t i;
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_TIMER1 | RST_CLK_PCLK_DMA),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTA), ENABLE);
/* Init NVIC */
SCB->AIRCR = 0x05FA0000 | ((uint32_t)0x500);
SCB->VTOR = 0x08000000;
/* Disable all interrupt */
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICER[0] = 0xFFFFFFFF;
/* Disable all DMA request */
MDR_DMA->CHNL_REQ_MASK_CLR = 0xFFFFFFFF;
MDR_DMA->CHNL_USEBURST_CLR = 0xFFFFFFFF;
/* Reset PORTB settings */
PORT_DeInit(MDR_PORTB);
/* Reset PORTF settings */
PORT_DeInit(MDR_PORTF);
/* Configure TIMER1 pins: CH1, CH2 */
/* Configure PORTA pins 1, 3 */
PORT_InitStructure.PORT_Pin = PORT_Pin_1;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = PORT_Pin_3;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
/* Init RAM */
Init_RAM (DstBuf, BufferSize);
/* Reset all TIMER1 settings */
TIMER_DeInit(MDR_TIMER1);
TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1);
/* TIM1 configuration ------------------------------------------------*/
/* Initializes the TIMERx Counter ------------------------------------*/
sTIM_CntInit.TIMER_Prescaler = 0x10;
sTIM_CntInit.TIMER_Period = 0x200;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit);
/* Initializes the TIMER1 Channel1 -------------------------------------*/
TIMER_ChnStructInit(&sTIM_ChnInit);
sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL1;
sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM;
sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format3;
TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit);
TIMER_SetChnCompare(MDR_TIMER1, TIMER_CHANNEL1, 0x100);
/* Initializes the TIMER1 Channel1 Output -------------------------------*/
TIMER_ChnOutStructInit(&sTIM_ChnOutInit);
sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL1;
sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted;
sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_REF;
sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Output;
TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit);
/* Initializes the TIMER1 Channel2 -------------------------------------*/
TIMER_ChnStructInit(&sTIM_ChnInit);
sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL2;
sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_CAPTURE;
TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit);
/* Initializes the TIMER1 Channel2 Output -------------------------------*/
TIMER_ChnOutStructInit(&sTIM_ChnOutInit);
sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL2;
sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted;
sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_Only_0;
sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Input;
TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit);
/* Enable TIMER1 DMA request */
TIMER_DMACmd(MDR_TIMER1,(TIMER_STATUS_CCR_CAP_CH2), ENABLE);
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* DMA_Channel_TIM1 configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)(&(MDR_TIMER1->CCR2));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)DstBuf;
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncHalfword;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic;
DMA_PriCtrlStr.DMA_CycleSize = BufferSize;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_1;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_TIM1, &DMA_InitStr);
/* Enable TIMER1 */
TIMER_Cmd(MDR_TIMER1,ENABLE);
/* Transfer complete */
while((DMA_GetFlagStatus(DMA_Channel_TIM1, DMA_FLAG_CHNL_ENA)))
{
}
/* Check the corectness of written dada */
for(i = 0; i < BufferSize; i++)
{
if (DstBuf[i] != MDR_TIMER1->CCR1)
{
TransferStatus &= FAILED;
break;
}
else
{
TransferStatus = PASSED;
}
}
/* TransferStatus = PASSED, if the data transmitted are correct */
/* TransferStatus = FAILED, if the data transmitted are not correct */
while(1)
{
}
}
static void max7456_send_dma(void* tx_buffer, void* rx_buffer, uint16_t buffer_size) {
DMA_InitTypeDef DMA_InitStructure;
#ifdef MAX7456_DMA_CHANNEL_RX
static uint16_t dummy[] = {0xffff};
#else
UNUSED(rx_buffer);
#endif
while (dma_transaction_in_progress); // Wait for prev DMA transaction
DMA_DeInit(MAX7456_DMA_CHANNEL_TX);
#ifdef MAX7456_DMA_CHANNEL_RX
DMA_DeInit(MAX7456_DMA_CHANNEL_RX);
#endif
// Common to both channels
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(MAX7456_SPI_INSTANCE->DR));
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_BufferSize = buffer_size;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
#ifdef MAX7456_DMA_CHANNEL_RX
// Rx Channel
#ifdef STM32F4
DMA_InitStructure.DMA_Memory0BaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
#else
DMA_InitStructure.DMA_MemoryBaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
#endif
DMA_InitStructure.DMA_MemoryInc = rx_buffer ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable;
DMA_Init(MAX7456_DMA_CHANNEL_RX, &DMA_InitStructure);
DMA_Cmd(MAX7456_DMA_CHANNEL_RX, ENABLE);
#endif
// Tx channel
#ifdef STM32F4
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)tx_buffer; //max7456_screen;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
#else
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)tx_buffer; //max7456_screen;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
#endif
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_Init(MAX7456_DMA_CHANNEL_TX, &DMA_InitStructure);
DMA_Cmd(MAX7456_DMA_CHANNEL_TX, ENABLE);
#ifdef MAX7456_DMA_CHANNEL_RX
DMA_ITConfig(MAX7456_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
#else
DMA_ITConfig(MAX7456_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE);
#endif
// Enable SPI TX/RX request
ENABLE_MAX7456;
dma_transaction_in_progress = 1;
SPI_I2S_DMACmd(MAX7456_SPI_INSTANCE,
#ifdef MAX7456_DMA_CHANNEL_RX
SPI_I2S_DMAReq_Rx |
#endif
SPI_I2S_DMAReq_Tx, ENABLE);
}
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
file startup_stm32f446xx.s) before to branch to application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f4xx.c file
*/
uint32_t address = 0, step = 0x00;
/* Configure QSPI GPIO */
QSPI_GPIO_Config();
/* Initialize DMA ----------------------------------------------------------*/
DMA_StructInit(&DMA_InitStructure);
DMA_DeInit(QSPI_DMA_STREAM);
/*DMA configuration*/
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&QUADSPI->DR ;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
/* Initialize QuadSPI ------------------------------------------------------*/
QSPI_StructInit(&QSPI_InitStructure);
QSPI_InitStructure.QSPI_SShift = QSPI_SShift_HalfCycleShift;
QSPI_InitStructure.QSPI_Prescaler = 0x01; /* 90 MHZ */
QSPI_InitStructure.QSPI_CKMode = QSPI_CKMode_Mode0;
QSPI_InitStructure.QSPI_CSHTime = QSPI_CSHTime_2Cycle;
QSPI_InitStructure.QSPI_FSize = 0x18;
QSPI_InitStructure.QSPI_FSelect = QSPI_FSelect_1;
QSPI_InitStructure.QSPI_DFlash = QSPI_DFlash_Disable;
QSPI_Init(&QSPI_InitStructure);
/* Initialize Command Config -----------------------------------------------*/
QSPI_ComConfig_StructInit(&QSPI_ComConfig_InitStructure);
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADSize = QSPI_ComConfig_ADSize_24bit;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_IMode = QSPI_ComConfig_IMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ABMode = QSPI_ComConfig_ABMode_NoAlternateByte;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DDRMode = QSPI_ComConfig_DDRMode_Disable;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_SIOOMode = QSPI_ComConfig_SIOOMode_Disable;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DHHC = QSPI_ComConfig_DHHC_Enable;
QSPI_ComConfig_StructInit(&QSPI_ComConfig_InitStructure);
QSPI_Cmd(ENABLE);
while(1)
{
switch(step)
{
case 0:
/* Enable write operations ---------------------------------------------*/
QSPI_Cmd(ENABLE);
QSPI_WriteEnable();
/* Erasing Sequence ----------------------------------------------------*/
QSPI_ComConfig_StructInit(&QSPI_ComConfig_InitStructure);
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADSize = QSPI_ComConfig_ADSize_24bit;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_IMode = QSPI_ComConfig_IMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADMode = QSPI_ComConfig_ADMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DMode = QSPI_ComConfig_DMode_NoData;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_FMode = QSPI_ComConfig_FMode_Indirect_Write;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_Ins = SECTOR_ERASE_CMD;
QSPI_ComConfig_Init(&QSPI_ComConfig_InitStructure);
/* Set sector address to erase */
QSPI_SetAddress(address);
while(QSPI_GetFlagStatus(QSPI_FLAG_TC) == RESET)
{}
step++;
break;
case 1:
/* Configure automatic polling mode to wait for end of erase -----------*/
QSPI_AutoPollingMemReady();
#if defined(__CC_ARM)
FlashAddr = (uint8_t *)(&Load$$QSPI$$Base);
MAXTransferSize = (uint32_t)(&Load$$QSPI$$Length);
#elif defined(__ICCARM__)
FlashAddr = (uint8_t *)(__section_begin(".qspi_init"));
MAXTransferSize = __section_size(".qspi_init");
#elif defined(__GNUC__)
FlashAddr = (uint8_t *)(&_qspi_init_base);
MAXTransferSize = (uint32_t)((uint8_t *)(&_qspi_init_length));
#endif
step++;
break;
case 2:
/* Enable write operations ---------------------------------------------*/
QSPI_WriteEnable();
QSPI_DMACmd(ENABLE);
/* Writing Sequence ----------------------------------------------------*/
QSPI_SetDataLength(MAXTransferSize);
QSPI_ComConfig_StructInit(&QSPI_ComConfig_InitStructure);
QSPI_ComConfig_InitStructure.QSPI_ComConfig_IMode = QSPI_ComConfig_IMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADMode = QSPI_ComConfig_ADMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DMode = QSPI_ComConfig_DMode_4Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_FMode = QSPI_ComConfig_FMode_Indirect_Write;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADSize = QSPI_ComConfig_ADSize_32bit;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_Ins = QUAD_IN_FAST_PROG_CMD;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DummyCycles = 0;
QSPI_ComConfig_Init(&QSPI_ComConfig_InitStructure);
/* DMA channel Tx Configuration */
DMA_InitStructure.DMA_BufferSize = MAXTransferSize;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)FlashAddr;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
DMA_Init(QSPI_DMA_STREAM, &DMA_InitStructure);
DMA_Cmd(QSPI_DMA_STREAM, ENABLE);
/* Wait for the end of Transfer */
while(DMA_GetFlagStatus(QSPI_DMA_STREAM, QSPI_DMA_FLAG_TC) == RESET)
{}
DMA_ClearFlag(QSPI_DMA_STREAM, QSPI_DMA_FLAG_TC);
QSPI_AbortRequest();
DMA_Cmd(QSPI_DMA_STREAM, DISABLE);
QSPI_DMACmd(DISABLE);
step++;
break;
case 3:
/* Configure automatic polling mode to wait for end of program ---------*/
QSPI_AutoPollingMemReady();
step++;
break;
case 4:
/* Reading Sequence ----------------------------------------------------*/
QSPI_TimeoutCounterCmd(DISABLE);
QSPI_MemoryMappedMode_SetTimeout(0);
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADSize = QSPI_ComConfig_ADSize_32bit;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_FMode = QSPI_ComConfig_FMode_Memory_Mapped;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_ADMode = QSPI_ComConfig_ADMode_4Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_IMode = QSPI_ComConfig_IMode_1Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DMode = QSPI_ComConfig_DMode_4Line;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_Ins = QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD;
QSPI_ComConfig_InitStructure.QSPI_ComConfig_DummyCycles = DUMMY_CLOCK_CYCLES_READ_QUAD;
QSPI_ComConfig_Init(&QSPI_ComConfig_InitStructure);
GpioToggle();
break;
default :
TransferStatus = FAILED;
break;
}
}
}
void telemetryInit(uint32_t baudrate)
{
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
GPIO_StructInit(&GPIO_InitStructure);
USART_StructInit(&USART_InitStructure);
DMA_StructInit(&DMA_InitStructure);
//RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
//RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
//RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
GPIO_InitStructure.GPIO_Pin = UART1_TX_PIN | UART1_RX_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
//GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PINSOURCE, GPIO_AF_USART1);
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PINSOURCE, GPIO_AF_USART1);
GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
// DMA TX Interrupt
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream7_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_InitStructure.USART_BaudRate = baudrate;
//USART_InitStructure.USART_WordLength = USART_WordLength_8b;
//USART_InitStructure.USART_StopBits = USART_StopBits_1;
//USART_InitStructure.USART_Parity = USART_Parity_No;
//USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
//USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_Init(USART1, &USART_InitStructure);
// Receive DMA into a circular buffer
DMA_DeInit(DMA2_Stream5);
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USART1->DR;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)rx1Buffer;
//DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = UART1_BUFFER_SIZE;
//DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
//DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
//DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
//DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
//DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream5, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream5, ENABLE);
USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
rx1DMAPos = DMA_GetCurrDataCounter(DMA2_Stream5);
// Transmit DMA
DMA_DeInit(DMA2_Stream7);
//DMA_InitStructure.DMA_Channel = DMA_Channel_4;
//DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USART1->DR;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)tx1Buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
//DMA_InitStructure.DMA_BufferSize = UART_BUFFER_SIZE;
//DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
//DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
//DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
//DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
//DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
//DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream7, &DMA_InitStructure);
DMA_SetCurrDataCounter(DMA2_Stream7, 0);
DMA_ITConfig(DMA2_Stream7, DMA_IT_TC, ENABLE);
USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);
USART_Cmd(USART1, ENABLE);
//evrRegisterListener(telemetryListenerCB);
}