#else static UINT32 const INFRA_DRV12 = 0xF0001830; static UINT32 const INFRA_DRV7 = 0xF0001804; static UINT32 const INFRA_DRV8 = 0xF0001808; #endif #define DPI_REG_OFFSET(r) offsetof(DPI_REGS, r) #define REG_ADDR(base, offset) (((BYTE *)(base)) + (offset)) #if !(defined(CONFIG_MT6577_FPGA) || defined(BUILD_UBOOT)) #define DPI_MIPI_API #endif const UINT32 BACKUP_DPI_REG_OFFSETS[] = { DPI_REG_OFFSET(INT_ENABLE), DPI_REG_OFFSET(SIZE), DPI_REG_OFFSET(CLK_CNTL), // DPI_REG_OFFSET(DITHER), DPI_REG_OFFSET(FB[0].ADDR), DPI_REG_OFFSET(FB[0].STEP), DPI_REG_OFFSET(FB[1].ADDR), DPI_REG_OFFSET(FB[1].STEP), DPI_REG_OFFSET(FB[2].ADDR), DPI_REG_OFFSET(FB[2].STEP), DPI_REG_OFFSET(OVL_CON), // DPI_REG_OFFSET(FBCD_LINE_W), DPI_REG_OFFSET(FIFO_TH), DPI_REG_OFFSET(FIFO_INC),
static PDPI_REGS const DPI_REG = (PDPI_REGS)(DISP_DPI_BASE); static BOOL s_isDpiPowerOn = FALSE; static DPI_REGS regBackup; static void (*dpiIntCallback)(DISP_INTERRUPT_EVENTS); #define DPI_MMSYS_CG1 ( DISP_DPI_ENGINE_SW_CG_BIT \ | DISP_DPI_IF_SW_CG_BIT ) #define DPI_REG_OFFSET(r) offsetof(DPI_REGS, r) #define REG_ADDR(base, offset) (((BYTE *)(base)) + (offset)) const UINT32 BACKUP_DPI_REG_OFFSETS[] = { DPI_REG_OFFSET(INT_ENABLE), DPI_REG_OFFSET(CON), DPI_REG_OFFSET(OUTPUT_SETTING), DPI_REG_OFFSET(SIZE), DPI_REG_OFFSET(TGEN_HWIDTH), DPI_REG_OFFSET(TGEN_HPORCH), DPI_REG_OFFSET(TGEN_VWIDTH), DPI_REG_OFFSET(TGEN_VPORCH), DPI_REG_OFFSET(BG_HCNTL), DPI_REG_OFFSET(BG_VCNTL), DPI_REG_OFFSET(BG_COLOR), DPI_REG_OFFSET(FIFO_CTL), DPI_REG_OFFSET(TMODE),
static PDPI_REGS const DPI_REG = (PDPI_REGS)(DPI_BASE); static PDSI_PHY_REGS const DSI_PHY_REG_DPI = (PDSI_PHY_REGS)(MIPI_CONFIG_BASE + 0x800); static BOOL s_isDpiPowerOn = FALSE; static DPI_REGS regBackup; static void (*dpiIntCallback)(DISP_INTERRUPT_EVENTS); #define DPI_REG_OFFSET(r) offsetof(DPI_REGS, r) #define REG_ADDR(base, offset) (((BYTE *)(base)) + (offset)) #if !(defined(CONFIG_MT6589_FPGA) || defined(BUILD_UBOOT)) //#define DPI_MIPI_API #endif const UINT32 BACKUP_DPI_REG_OFFSETS[] = { DPI_REG_OFFSET(INT_ENABLE), DPI_REG_OFFSET(SIZE), DPI_REG_OFFSET(CLK_CNTL), // DPI_REG_OFFSET(DITHER), DPI_REG_OFFSET(TGEN_HWIDTH), DPI_REG_OFFSET(TGEN_HPORCH), DPI_REG_OFFSET(TGEN_VWIDTH_LODD), DPI_REG_OFFSET(TGEN_VPORCH_LODD), DPI_REG_OFFSET(TGEN_VWIDTH_LEVEN), DPI_REG_OFFSET(TGEN_VPORCH_LEVEN), DPI_REG_OFFSET(TGEN_VWIDTH_RODD), DPI_REG_OFFSET(TGEN_VPORCH_RODD),
static PDPI_REGS const DPI_REG = (PDPI_REGS)(DPI_BASE); static PDSI_PHY_REGS const DSI_PHY_REG_DPI = (PDSI_PHY_REGS)(MIPI_CONFIG_BASE + 0x800); //static UINT32 const PLL_SOURCE = APMIXEDSYS_BASE + 0x44; static BOOL s_isDpiPowerOn = FALSE; static DPI_REGS regBackup; static void (*dpiIntCallback)(DISP_INTERRUPT_EVENTS); #define DPI_REG_OFFSET(r) offsetof(DPI_REGS, r) #define REG_ADDR(base, offset) (((BYTE *)(base)) + (offset)) extern LCM_PARAMS *lcm_params; extern LCM_DRIVER *lcm_drv; const UINT32 BACKUP_DPI_REG_OFFSETS[] = { DPI_REG_OFFSET(INT_ENABLE), DPI_REG_OFFSET(CNTL), DPI_REG_OFFSET(CLK_CNTL), DPI_REG_OFFSET(SIZE), DPI_REG_OFFSET(TGEN_HWIDTH), DPI_REG_OFFSET(TGEN_HPORCH), DPI_REG_OFFSET(TGEN_VWIDTH_LODD), DPI_REG_OFFSET(TGEN_VPORCH_LODD), DPI_REG_OFFSET(BG_HCNTL), DPI_REG_OFFSET(BG_VCNTL), DPI_REG_OFFSET(BG_COLOR), };